CN104067383B - 将贯穿基板通孔集成到集成电路的中段工序层中 - Google Patents

将贯穿基板通孔集成到集成电路的中段工序层中 Download PDF

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Publication number
CN104067383B
CN104067383B CN201380005315.9A CN201380005315A CN104067383B CN 104067383 B CN104067383 B CN 104067383B CN 201380005315 A CN201380005315 A CN 201380005315A CN 104067383 B CN104067383 B CN 104067383B
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China
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substrate
layer
substrate via
isolation layer
semiconductor die
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CN201380005315.9A
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English (en)
Chinese (zh)
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CN104067383A (zh
Inventor
V·拉马钱德兰
S·顾
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Qualcomm Inc
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Qualcomm Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0265—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias characterised by the sidewall insulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/213—Cross-sectional shapes or dispositions
    • H10W20/2134—TSVs extending from the semiconductor wafer into back-end-of-line layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
CN201380005315.9A 2012-01-13 2013-01-12 将贯穿基板通孔集成到集成电路的中段工序层中 Active CN104067383B (zh)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201261586463P 2012-01-13 2012-01-13
US61/586,463 2012-01-13
US201261671607P 2012-07-13 2012-07-13
US61/671,607 2012-07-13
US13/724,038 US8975729B2 (en) 2012-01-13 2012-12-21 Integrating through substrate vias into middle-of-line layers of integrated circuits
US13/724,038 2012-12-21
PCT/US2013/021342 WO2013106796A1 (en) 2012-01-13 2013-01-12 Integrating through substrate vias into middle-of-line layers of integrated circuits

Publications (2)

Publication Number Publication Date
CN104067383A CN104067383A (zh) 2014-09-24
CN104067383B true CN104067383B (zh) 2017-04-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380005315.9A Active CN104067383B (zh) 2012-01-13 2013-01-12 将贯穿基板通孔集成到集成电路的中段工序层中

Country Status (7)

Country Link
US (1) US8975729B2 (https=)
EP (2) EP2803081B1 (https=)
JP (1) JP6012763B2 (https=)
KR (1) KR101548664B1 (https=)
CN (1) CN104067383B (https=)
ES (1) ES2829898T3 (https=)
WO (1) WO2013106796A1 (https=)

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US9245790B2 (en) * 2013-01-23 2016-01-26 GlobalFoundries, Inc. Integrated circuits and methods of forming the same with multiple embedded interconnect connection to same through-semiconductor via
CN104637861A (zh) * 2013-11-11 2015-05-20 上海华虹宏力半导体制造有限公司 硅通孔工艺方法
US9620454B2 (en) * 2014-09-12 2017-04-11 Qualcomm Incorporated Middle-of-line (MOL) manufactured integrated circuits (ICs) employing local interconnects of metal lines using an elongated via, and related methods
US20160079167A1 (en) * 2014-09-12 2016-03-17 Qualcomm Incorporated Tie-off structures for middle-of-line (mol) manufactured integrated circuits, and related methods
US9653399B2 (en) 2015-02-13 2017-05-16 Qualcomm Incorporated Middle-of-line integration methods and semiconductor devices
KR102411064B1 (ko) * 2015-03-10 2022-06-21 삼성전자주식회사 관통전극을 갖는 반도체 소자 및 그의 제조방법
US10748906B2 (en) 2015-05-13 2020-08-18 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
KR102366804B1 (ko) 2015-05-13 2022-02-25 삼성전자주식회사 반도체 소자의 제조 방법
US9728501B2 (en) * 2015-12-21 2017-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming trenches
US9761509B2 (en) * 2015-12-29 2017-09-12 United Microelectronics Corp. Semiconductor device with throgh-substrate via and method for fabrication the semiconductor device
KR102495587B1 (ko) 2016-01-12 2023-02-03 삼성전자주식회사 관통 비아 구조체를 갖는 반도체 소자
US10199315B2 (en) 2016-08-29 2019-02-05 Globalfoundries Inc. Post zero via layer keep out zone over through silicon via reducing BEOL pumping effects
US10049981B2 (en) * 2016-09-08 2018-08-14 Taiwan Semiconductor Manufacturing Company Ltd. Through via structure, semiconductor device and manufacturing method thereof
US9768133B1 (en) * 2016-09-22 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package and method of forming the same
KR102406583B1 (ko) 2017-07-12 2022-06-09 삼성전자주식회사 반도체 장치
CN107958194B (zh) * 2017-08-17 2021-11-19 柳州梓博科技有限公司 光电传感装置及电子设备
US11987493B2 (en) 2018-10-31 2024-05-21 Hamamatsu Photonics K.K. Damascene interconnect structure, actuator device, and method of manufacturing damascene interconnect structure
EP3876266A4 (en) 2018-10-31 2022-08-17 Hamamatsu Photonics K.K. METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING DAMASZEN WIRING STRUCTURE, SEMICONDUCTOR SUBSTRATE AND DAMASZEN WIRING STRUCTURE
US11495559B2 (en) * 2020-04-27 2022-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits
US11355464B2 (en) * 2020-11-10 2022-06-07 Nanya Technology Corporation Semiconductor device structure with bottle-shaped through silicon via and method for forming the same
KR102856349B1 (ko) 2021-04-16 2025-09-04 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지

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US20070184654A1 (en) * 2006-02-03 2007-08-09 Salman Akram Methods for fabricating and filling conductive vias and conductive vias so formed
CN101308834A (zh) * 2007-05-16 2008-11-19 台湾积体电路制造股份有限公司 集成电路结构
US20110221063A1 (en) * 2010-03-12 2011-09-15 Renesas Electronics Corporation Manufacturing Method of Semiconductor Device

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EP0926726A1 (en) * 1997-12-16 1999-06-30 STMicroelectronics S.r.l. Fabrication process and electronic device having front-back through contacts for bonding onto boards
US20070184654A1 (en) * 2006-02-03 2007-08-09 Salman Akram Methods for fabricating and filling conductive vias and conductive vias so formed
CN101308834A (zh) * 2007-05-16 2008-11-19 台湾积体电路制造股份有限公司 集成电路结构
US20110221063A1 (en) * 2010-03-12 2011-09-15 Renesas Electronics Corporation Manufacturing Method of Semiconductor Device

Also Published As

Publication number Publication date
EP2803081A1 (en) 2014-11-19
JP6012763B2 (ja) 2016-10-25
US20130181330A1 (en) 2013-07-18
EP2803081B1 (en) 2020-08-12
KR20140117521A (ko) 2014-10-07
ES2829898T3 (es) 2021-06-02
EP3731265B1 (en) 2023-03-08
EP3731265A1 (en) 2020-10-28
JP2015505171A (ja) 2015-02-16
KR101548664B1 (ko) 2015-09-01
US8975729B2 (en) 2015-03-10
CN104067383A (zh) 2014-09-24
WO2013106796A1 (en) 2013-07-18

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