CN104064480A - 聚酰亚胺喷涂 - Google Patents

聚酰亚胺喷涂 Download PDF

Info

Publication number
CN104064480A
CN104064480A CN201310097916.9A CN201310097916A CN104064480A CN 104064480 A CN104064480 A CN 104064480A CN 201310097916 A CN201310097916 A CN 201310097916A CN 104064480 A CN104064480 A CN 104064480A
Authority
CN
China
Prior art keywords
polyimides
voltage device
tension apparatus
high tension
spraying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310097916.9A
Other languages
English (en)
Inventor
苏少爽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGXI CHUANGCHENG ELECTRONIC CO., LTD.
Original Assignee
Jiangxi Chuan Cheng Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangxi Chuan Cheng Semiconductor Co Ltd filed Critical Jiangxi Chuan Cheng Semiconductor Co Ltd
Priority to CN201310097916.9A priority Critical patent/CN104064480A/zh
Publication of CN104064480A publication Critical patent/CN104064480A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

一种高压器件表面保护方法，在高压器件芯片表面实施聚酰亚胺喷涂，然后进行塑料封装，以减小高压器件表面漏电进而提高高压器件特性。该高压器件表面保护方法包括：在高压器件芯片表面实施聚酰亚胺喷涂、以及实施聚酰亚胺喷涂时避免污染采用的等离子清洗。该方法包括一套完整的聚酰亚胺喷涂工艺。所述的聚酰亚胺喷涂工艺包括等离子清洗和聚酰亚胺喷涂厚度及固化条件。将完成引线焊接工序的高压器件工件，经过等离子清洗，然后在高压器件芯片表面实施聚酰亚胺喷涂，然后进行塑料封装，以减小高压器件表面漏电进而提高高压器件特性。

Description

聚酰亚胺喷涂
【技术领域】
本发明涉及一种采用聚酰亚胺喷涂改善高压器件性能的方法，更具体的说是一种在高压器件芯片表面实施聚酰亚胺喷涂，以减小高压器件表面漏电进而提高高压器件特性的方法。
【背景技术】
塑料封装是一种广泛应用的半导体封装技术，主要用于半导体分立器件如二极管、三极管、功率MOSFET和IGBT等，随着器件工作电压的升高，塑封材料常不能满足更高的要求，主要是绝缘性能。
随着器件对工作电压的更高要求，对塑封材料提出更高的要求，主要是抗水汽和绝缘性能，但是塑封材料的性能是有限的，且高性能塑封材料价格昂贵，不宜大量采用。
【发明内容】
本发明的一个目的是在高压器件芯片表面实施聚酰亚胺喷涂，以减小高压器件表面漏电进而提高高压器件性能，改善产品可靠性。
本发明的目的是通过以下技术方案实现的：在高压器件芯片表面实施聚酰亚胺喷涂，以减小高压器件表面漏电。
该方法包括一套完整的聚酰亚胺喷涂工艺。所述的聚酰亚胺喷涂工艺包括等离子清洗和聚酰亚胺喷涂厚度及固化条件。将完成引线焊接工序的高压器件工件，经过等离子清洗，然后在高压器件芯片表面实施聚酰亚胺喷涂，然后进行固化。
等离子清洗工艺如下：
N2气体冲洗3次，气体流量300sccm，每次时间3s
等离子清洗时间10s，气体流量300sccm，电极功率300W
N2气体冲洗3次，气体流量300sccm，每次时间3s
聚酰亚胺喷涂厚度及固化条件：
实验结果表明聚酰亚胺的作用有：
1.减小高压器件表面漏电进而提高高压器件特性
2.减少环境对器件的影响，还可以对a-粒子起屏蔽作用
3.减少或消除器件的软误差(soft error)。
4.减少应力、提高成品率。
本发明的优点在于：在高压器件芯片表面实施聚酰亚胺喷涂，以减小高压器件表面漏电进而提高高压器件性能，改善产品可靠性。
【附图说明】
图1是聚酰亚胺喷涂的器件结构示意图。
图2是传统塑料封装工艺流程图。
图3是采用聚酰亚胺喷涂工艺的封装工艺流程图。
【具体实施方式】
下面对本发明超声波回流焊焊接方法做出进一步的说明。
请参阅图3，为该发明采用聚酰亚胺喷涂工艺的封装工艺流程图，该流程在传统塑料封装工艺流程图的基础上增加等离子清洗和聚酰亚胺两个步骤。
等离子清洗工艺的详细过程为：
将完成引线焊接工序的高压器件工件放入等离子清洗腔内，抽真空至40毫托；
开N2气体流量300sccm时间3s，关N2气体抽真空至40毫托，如此冲洗3次；
开N2气体流量300sccm，电极功率300W，等离子清洗时间10s，关电极功率，关N2气体抽真空至40毫托；
开N2气体流量300sccm时间3s，关N2气体抽真空至40毫托。
聚酰亚胺喷涂工艺的详细过程为：
请参阅图1，为该发明采用聚酰亚胺喷涂的器件结构示意图，将上述完成等离子清洗工序的高压器件工件进行聚酰亚胺喷涂，聚酰亚胺厚度为500～800um；
在室温下平放40分钟～1小时，或红外灯照20～30分钟；
放入烘箱中升温至60～80度保持1小时；升温至100～120度保持1小时；升温至220～240度保持4小时以上；自然冷却至室温。
所述的超声波产生及控制系统包括超声波功率源和超声波功率控制系统， 超声波功率模块用于产生合适的超声波作用功率、合适的超声波作用时间。

Claims (3)

1.一种高压器件表面保护方法，在高压器件芯片表面实施聚酰亚胺喷涂，然后进行塑料封装，以减小高压器件表面漏电进而提高高压器件特性。
该高压器件表面保护方法包括：在高压器件芯片表面实施聚酰亚胺喷涂、以及实施聚酰亚胺喷涂时避免污染采用的等离子清洗。
该方法包括一套完整的聚酰亚胺喷涂工艺。所述的聚酰亚胺喷涂工艺包括等离子清洗和聚酰亚胺喷涂厚度及固化条件。
将完成引线焊接工序的高压器件工件，经过等离子清洗，然后在高压器件芯片表面实施聚酰亚胺喷涂，然后进行塑料封装，以减小高压器件表面漏电进而提高高压器件特性。
2.如权利要求1所述的高压器件表面保护方法，其特征在于：将完成引线焊接工序的高压器件工件，经过等离子清洗，然后在高压器件芯片表面实施聚酰亚胺喷涂，然后进行塑料封装。
3.如权利要求2所述聚酰亚胺喷涂，其特征在于：所述的聚酰亚胺喷涂厚度及固化条件能改善高压器件特性。
CN201310097916.9A 2013-03-22 2013-03-22 聚酰亚胺喷涂 Pending CN104064480A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310097916.9A CN104064480A (zh) 2013-03-22 2013-03-22 聚酰亚胺喷涂

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310097916.9A CN104064480A (zh) 2013-03-22 2013-03-22 聚酰亚胺喷涂

Publications (1)

Publication Number Publication Date
CN104064480A true CN104064480A (zh) 2014-09-24

Family

ID=51552138

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310097916.9A Pending CN104064480A (zh) 2013-03-22 2013-03-22 聚酰亚胺喷涂

Country Status (1)

Country Link
CN (1) CN104064480A (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1347357A (zh) * 1999-02-19 2002-05-01 尤纳克西斯巴尔策斯公司 制造零部件的方法、这种方法的应用、置于空气中的工件和真空处理箱
CN1649936A (zh) * 2002-05-30 2005-08-03 三井化学株式会社 粘合性树脂及使用该粘合性树脂的薄膜状粘合剂
JP2010065067A (ja) * 2008-09-08 2010-03-25 Tokyo Univ Of Agriculture & Technology 粒子およびその製造方法、ならびにゲル
CN102637650A (zh) * 2011-02-09 2012-08-15 富士通株式会社 半导体装置及其制造方法以及电源

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1347357A (zh) * 1999-02-19 2002-05-01 尤纳克西斯巴尔策斯公司 制造零部件的方法、这种方法的应用、置于空气中的工件和真空处理箱
CN1649936A (zh) * 2002-05-30 2005-08-03 三井化学株式会社 粘合性树脂及使用该粘合性树脂的薄膜状粘合剂
JP2010065067A (ja) * 2008-09-08 2010-03-25 Tokyo Univ Of Agriculture & Technology 粒子およびその製造方法、ならびにゲル
CN102637650A (zh) * 2011-02-09 2012-08-15 富士通株式会社 半导体装置及其制造方法以及电源

Similar Documents

Publication Publication Date Title
CN105226186B (zh) 柔性显示装置的制作方法及制得的柔性显示装置
US8492256B2 (en) Method of manufacturing semiconductor apparatus
TW200943394A (en) Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
JP2006253398A (ja) 半導体装置の製造方法
CN106531858A (zh) 紫外led封装方法
JP2013095809A5 (zh)
KR20110122511A (ko) 유기 발광 표시 장치 및 그 제조방법
CN104556734A (zh) 增加面板边缘强度的方法
CN105271792A (zh) 固化装置及固化方法
CN110429170B (zh) 一种用紫外光固化的芯片器件封装工艺
CN102638941A (zh) 一种线路板电子元器件的低压封装工艺
CN104064480A (zh) 聚酰亚胺喷涂
TWI508191B (zh) 半導體元件製造方法
CN103107100A (zh) 功率半导体器件的制造方法
CN105623592A (zh) 一种基于改性环氧树脂的柔性绝缘灌封胶
CN103794668A (zh) Ptfe双面涂层背板及其制备方法
JP6101507B2 (ja) 半導体装置の製造方法
TWI720418B (zh) 半導體發光單元及其封裝方法
CN103700737A (zh) 一种led封装方法
CN104910407A (zh) 空气介质的低温等离子体处理氟橡胶f275提高其粘接性能的方法
CN103231825A (zh) 一种太阳能电池锗衬底片的充氮包装方法
CN111192839A (zh) 黑陶瓷低熔玻璃外壳集成电路内部水汽含量控制方法
CN104451493A (zh) 一种铜合金表面处理方法
CN104037097B (zh) 一种塑封轴向二极管胶层涂敷方法
CN104388865A (zh) 一种钛合金表面处理方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
EXSB Decision made by sipo to initiate substantive examination
SE01 Entry into force of request for substantive examination
DD01 Delivery of document by public notice

Addressee: Liu Cuan

Document name: Notification that Application Deemed not to be Proposed

CB02 Change of applicant information

Address after: 343000 Jinggangshan economic and Technological Development Zone, Jiangxi, Ji'an, Jiangxi, China ()

Applicant after: JIANGXI CHUANGCHENG SEMICONDUCTOR CO., LTD.

Address before: 343000 Jinggangshan economic and Technological Development Zone, Jiangxi, Ji'an, Jiangxi, China ()

Applicant before: Jiangxi Chuan Cheng semiconductor Co., Ltd

COR Change of bibliographic data
C41 Transfer of patent application or patent right or utility model
DD01 Delivery of document by public notice

Addressee: Liu Cuan

Document name: Notification of Passing Examination on Formalities

TA01 Transfer of patent application right

Effective date of registration: 20160727

Address after: 343000 Jinggangshan export processing zone, Jiangxi, No. Torch Road, No. 192

Applicant after: JIANGXI CHUANGCHENG ELECTRONIC CO., LTD.

Address before: 343000 Jinggangshan economic and Technological Development Zone, Jiangxi, Ji'an, Jiangxi, China ()

Applicant before: JIANGXI CHUANGCHENG SEMICONDUCTOR CO., LTD.

WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140924