CN104054263B - 片上粗略延迟校准 - Google Patents

片上粗略延迟校准 Download PDF

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Publication number
CN104054263B
CN104054263B CN201380005672.5A CN201380005672A CN104054263B CN 104054263 B CN104054263 B CN 104054263B CN 201380005672 A CN201380005672 A CN 201380005672A CN 104054263 B CN104054263 B CN 104054263B
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CN
China
Prior art keywords
delay line
delay
chip
power supply
calibration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201380005672.5A
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English (en)
Chinese (zh)
Other versions
CN104054263A (zh
Inventor
W·J·陈
C-G·谭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
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Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN104054263A publication Critical patent/CN104054263A/zh
Application granted granted Critical
Publication of CN104054263B publication Critical patent/CN104054263B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Pulse Circuits (AREA)
CN201380005672.5A 2012-01-18 2013-01-17 片上粗略延迟校准 Expired - Fee Related CN104054263B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261587705P 2012-01-18 2012-01-18
US61/587,705 2012-01-18
US13/368,906 US8680908B2 (en) 2012-01-18 2012-02-08 On-chip coarse delay calibration
US13/368,906 2012-03-08
PCT/US2013/021836 WO2013109688A1 (en) 2012-01-18 2013-01-17 On-chip coarse delay calibration

Publications (2)

Publication Number Publication Date
CN104054263A CN104054263A (zh) 2014-09-17
CN104054263B true CN104054263B (zh) 2017-02-22

Family

ID=48779550

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380005672.5A Expired - Fee Related CN104054263B (zh) 2012-01-18 2013-01-17 片上粗略延迟校准

Country Status (6)

Country Link
US (1) US8680908B2 (enExample)
EP (1) EP2805416A1 (enExample)
JP (2) JP2015511427A (enExample)
KR (1) KR20140123956A (enExample)
CN (1) CN104054263B (enExample)
WO (1) WO2013109688A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140266290A1 (en) * 2013-03-14 2014-09-18 Bhavin Odedara Process detection circuit
CN104378088B (zh) * 2013-08-15 2017-06-09 瑞昱半导体股份有限公司 延迟时间差检测及调整装置与方法
US9503090B2 (en) 2014-08-19 2016-11-22 International Business Machines Corporation High speed level translator

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5796682A (en) * 1995-10-30 1998-08-18 Motorola, Inc. Method for measuring time and structure therefor
CN1862273A (zh) * 2006-01-09 2006-11-15 北京大学深圳研究生院 一种测试时钟信号抖动的片上系统及其方法
US20060273831A1 (en) * 2005-03-04 2006-12-07 Dragan Maksimovic Differential delay-line analog-to-digital converter
US20080238752A1 (en) * 2007-03-26 2008-10-02 Semiconductor Technology Academic Research Center Analog-to-digital (AD) converter and analog-to-digital conversion method
CN102142831A (zh) * 2010-01-29 2011-08-03 英飞凌科技股份有限公司 片上自校准延迟监控电路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199088A (ja) * 1991-02-25 1993-08-06 Toshiba Corp 遅延回路
US6166821A (en) * 1998-10-02 2000-12-26 Electronics For Imaging, Inc. Self calibrating pulse width modulator for use in electrostatic printing applications
US7595686B2 (en) 2001-11-09 2009-09-29 The Regents Of The University Of Colorado Digital controller for high-frequency switching power supplies
JP2007110686A (ja) * 2005-09-14 2007-04-26 Advantest Corp デジタル回路、半導体デバイス及びクロック調整方法
US7750706B1 (en) * 2006-07-21 2010-07-06 Marvell International Ltd. Circuits, architectures, apparatuses, systems, and methods for low voltage clock delay generation
JP2011169594A (ja) * 2008-06-13 2011-09-01 Advantest Corp マルチストローブ回路およびそのキャリブレーション方法および試験装置
US20130002274A1 (en) * 2010-03-29 2013-01-03 Nec Corporation Aging degradation diagnosis circuit and aging degradation diagnosis method for semiconductor integrated circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5796682A (en) * 1995-10-30 1998-08-18 Motorola, Inc. Method for measuring time and structure therefor
US20060273831A1 (en) * 2005-03-04 2006-12-07 Dragan Maksimovic Differential delay-line analog-to-digital converter
CN1862273A (zh) * 2006-01-09 2006-11-15 北京大学深圳研究生院 一种测试时钟信号抖动的片上系统及其方法
US20080238752A1 (en) * 2007-03-26 2008-10-02 Semiconductor Technology Academic Research Center Analog-to-digital (AD) converter and analog-to-digital conversion method
CN102142831A (zh) * 2010-01-29 2011-08-03 英飞凌科技股份有限公司 片上自校准延迟监控电路

Also Published As

Publication number Publication date
US20130181759A1 (en) 2013-07-18
JP2018152567A (ja) 2018-09-27
US8680908B2 (en) 2014-03-25
KR20140123956A (ko) 2014-10-23
WO2013109688A1 (en) 2013-07-25
JP2015511427A (ja) 2015-04-16
CN104054263A (zh) 2014-09-17
EP2805416A1 (en) 2014-11-26

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C10 Entry into substantive examination
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CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170222

Termination date: 20210117