KR20140123956A - 온-칩 코오스 지연 교정 - Google Patents

온-칩 코오스 지연 교정 Download PDF

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Publication number
KR20140123956A
KR20140123956A KR1020147022900A KR20147022900A KR20140123956A KR 20140123956 A KR20140123956 A KR 20140123956A KR 1020147022900 A KR1020147022900 A KR 1020147022900A KR 20147022900 A KR20147022900 A KR 20147022900A KR 20140123956 A KR20140123956 A KR 20140123956A
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KR
South Korea
Prior art keywords
delay line
chip
delay
power
calibrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020147022900A
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English (en)
Korean (ko)
Inventor
윌슨 제이. 첸
치우-구안 탄
Original Assignee
퀄컴 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20140123956A publication Critical patent/KR20140123956A/ko
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Pulse Circuits (AREA)
KR1020147022900A 2012-01-18 2013-01-17 온-칩 코오스 지연 교정 Ceased KR20140123956A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261587705P 2012-01-18 2012-01-18
US61/587,705 2012-01-18
US13/368,906 US8680908B2 (en) 2012-01-18 2012-02-08 On-chip coarse delay calibration
US13/368,906 2012-03-08
PCT/US2013/021836 WO2013109688A1 (en) 2012-01-18 2013-01-17 On-chip coarse delay calibration

Publications (1)

Publication Number Publication Date
KR20140123956A true KR20140123956A (ko) 2014-10-23

Family

ID=48779550

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020147022900A Ceased KR20140123956A (ko) 2012-01-18 2013-01-17 온-칩 코오스 지연 교정

Country Status (6)

Country Link
US (1) US8680908B2 (enExample)
EP (1) EP2805416A1 (enExample)
JP (2) JP2015511427A (enExample)
KR (1) KR20140123956A (enExample)
CN (1) CN104054263B (enExample)
WO (1) WO2013109688A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140266290A1 (en) * 2013-03-14 2014-09-18 Bhavin Odedara Process detection circuit
CN104378088B (zh) * 2013-08-15 2017-06-09 瑞昱半导体股份有限公司 延迟时间差检测及调整装置与方法
US9503090B2 (en) 2014-08-19 2016-11-22 International Business Machines Corporation High speed level translator

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199088A (ja) * 1991-02-25 1993-08-06 Toshiba Corp 遅延回路
US5796682A (en) * 1995-10-30 1998-08-18 Motorola, Inc. Method for measuring time and structure therefor
US6166821A (en) * 1998-10-02 2000-12-26 Electronics For Imaging, Inc. Self calibrating pulse width modulator for use in electrostatic printing applications
US7595686B2 (en) 2001-11-09 2009-09-29 The Regents Of The University Of Colorado Digital controller for high-frequency switching power supplies
US7315270B2 (en) 2005-03-04 2008-01-01 The Regents Of The University Of Colorado Differential delay-line analog-to-digital converter
JP2007110686A (ja) * 2005-09-14 2007-04-26 Advantest Corp デジタル回路、半導体デバイス及びクロック調整方法
CN1862273B (zh) * 2006-01-09 2010-04-21 北京大学深圳研究生院 一种测试时钟信号抖动的片上系统
US7750706B1 (en) * 2006-07-21 2010-07-06 Marvell International Ltd. Circuits, architectures, apparatuses, systems, and methods for low voltage clock delay generation
JP4271244B2 (ja) 2007-03-26 2009-06-03 株式会社半導体理工学研究センター アナログ・デジタル(ad)変換器及びアナログ・デジタル変換方法
JP2011169594A (ja) * 2008-06-13 2011-09-01 Advantest Corp マルチストローブ回路およびそのキャリブレーション方法および試験装置
US8228106B2 (en) * 2010-01-29 2012-07-24 Intel Mobile Communications GmbH On-chip self calibrating delay monitoring circuitry
US20130002274A1 (en) * 2010-03-29 2013-01-03 Nec Corporation Aging degradation diagnosis circuit and aging degradation diagnosis method for semiconductor integrated circuit

Also Published As

Publication number Publication date
US20130181759A1 (en) 2013-07-18
JP2018152567A (ja) 2018-09-27
US8680908B2 (en) 2014-03-25
WO2013109688A1 (en) 2013-07-25
JP2015511427A (ja) 2015-04-16
CN104054263A (zh) 2014-09-17
EP2805416A1 (en) 2014-11-26
CN104054263B (zh) 2017-02-22

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