CN103840832A - Current rudder type digital-to-analogue conversion circuit with burr inhibiting ability - Google Patents

Current rudder type digital-to-analogue conversion circuit with burr inhibiting ability Download PDF

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CN103840832A
CN103840832A CN201410060641.6A CN201410060641A CN103840832A CN 103840832 A CN103840832 A CN 103840832A CN 201410060641 A CN201410060641 A CN 201410060641A CN 103840832 A CN103840832 A CN 103840832A
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current
output
circuit
pipe
current source
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CN103840832B (en
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王志利
张宁
谢加雄
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Abstract

The invention discloses a current rudder type digital-to-analogue conversion circuit with the burr inhibiting ability. The current rudder type digital-to-analogue conversion circuit comprises a register, a decoder, a latch, a current source array and an output circuit. According to the digital-to-analogue conversion circuit, two-end output is carried out in a complementary mode, a plurality of differential output current sources are connected in parallel to form the current source array, and the decoder controls the state of each current source gating switch of the current source array according to different input data of the digital-to-analogue conversion circuit, and further controls output currents to flow to the differential output end A or the differential output end B so that output values can correspond to the input data in a one-to-one mode; the output circuit is connected with the differential output of the current source array, and the output of the current source array is connected with the load after being mirrored through a current mirror one or more times. The digital-to-analogue conversion circuit can effectively lower current burrs of the output end of a DAC, and can be directly combined and used together with other current source structures under the circumstance of not modifying the whole structure of the circuit.

Description

There is the current steer type D/A converting circuit that burr suppresses ability
Technical field
The present invention relates to a kind of current steer type D/A converting circuit, particularly relate to a kind of current steer type D/A converting circuit that burr suppresses ability that has.
Background technology
Along with the fast development of digital television techniques, at a high speed, the DAC(Digital to analog converter of high-resolution, digital to analog converter) become essential.The plurality of advantages such as wherein, current steer type DAC is fast with its speed, the linearity is high, efficiency is high are used widely in the video system such as HDTV (High-Definition Television), digital TV set-top box.
The basic structure of current steer type DAC as shown in Figure 1, current steer type DAC(Current Steering DAC) by module compositions such as register, decoder, latch and current source array, input data are input current source array through register and decoder and after by clock synchronous, select to control the switch of each current unit, make the output stream of current unit to IA end or IB end, and then drive external loading.
For current source array, conventional unitary current source circuit as shown in Figure 2.VB is bias voltage, conventional M1 makes mirror image reference current, and M2 and M3 are MOS switch, and SWA and SWB are the complementary control signal of decoder output, in guaranteeing at one time, M2 and M3 only have a conducting, and then select current direction IOA or the IOB of current source to be directly used in driving external loading.
Above-mentioned electric current is simple in structure, but SWA and SWB are in the process changing, because can causing, parasitic capacitance coupling etc. in the load being connected with IOA and IOB, produces large current spikes, this often the dynamic parameter on whole DAC and static parameter all can have impact, therefore seek novel circuit structure and become necessary.
Summary of the invention
The deficiency existing for overcoming above-mentioned prior art, the present invention's object is to provide has the current steer type D/A converting circuit that burr suppresses ability, it can reduce the output end current burr of DAC effectively, and can in the integrally-built situation of modification circuits not, directly merge with other current source structures and together with use.
For reaching above-mentioned and other object, the present invention proposes a kind of current steer type D/A converting circuit that burr suppresses ability that has, comprise register, decoder, latch, current source array, this D/A converting circuit also comprises an output circuit, this D/A converting circuit is with complementary form both-end output, form this current source array by the parallel connection of multichannel difference output current source, this decoder is controlled the state of the each current source gating switch of this current source array according to the difference of these D/A converting circuit input data, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, this output circuit connects the difference output of this current source array, the output of this current source array is connected to load after one or many current mirror mirror image.
Further, this output circuit comprises the current mirroring circuit of two 1:m, is connected to respectively the difference output end of this current source array.
Further, the current mirroring circuit of each 1:m comprises a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe and the 4th PMOS pipe, the one PMOS pipe drain electrode connects the output of this current source array, its source electrode and the drain electrode of the 2nd PMOS pipe are joined, the 3rd PMOS pipe drain electrode output connects load, its source electrode and the drain electrode of the 4th PMOS pipe are joined, the 4th PMOS pipe source electrode and the 2nd PMOS pipe source electrode are connected to power positive end, this the first gate pmos utmost point is extremely connected with the 3rd gate pmos, and connect bias voltage, this the second gate pmos utmost point, the 4th gate pmos utmost point is connected with a PMOS pipe drain electrode, and connect the output of this current source array.
Further, this output circuit comprises the current mirroring circuit of two 1:k and the current mirroring circuit of two 1:m, the reference connection of the current mirroring circuit of each 1:k is in the difference output end of this current lens array, the benchmark of the current mirroring circuit of each 1:m is connected to the mirror image output of the current mirroring circuit of corresponding 1:k, and the mirror image output of the current mirroring circuit of each 1:m connects load.
Further, the current mirroring circuit of each 1:k comprises a NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe and the 4th NMOS pipe, the one NMOS pipe drain electrode connects the output of this current source array, its source electrode and the drain electrode of the 2nd NMOS pipe are joined, the 3rd NMOS pipe drain electrode output connects the current mirroring circuit of 1:m, its source electrode and the drain electrode of the 4th NMOS pipe are joined, the 4th NMOS pipe source electrode and the 2nd NMOS pipe source electrode are connected to power supply negative terminal, the one NMOS tube grid is connected with the 3rd NMOS tube grid, the 2nd NMOS tube grid, the 4th NMOS tube grid is connected with a NMOS pipe drain electrode, and connect the output of this current source array.
Further, the current mirroring circuit of each 1:m comprises a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe and the 4th PMOS pipe, the one PMOS pipe drain electrode connects the 3rd NMOS pipe drain electrode, its source electrode and the drain electrode of the 2nd PMOS pipe are joined, the 3rd PMOS pipe drain electrode output connects load, its source electrode and the drain electrode of the 4th PMOS pipe are joined, the 4th PMOS pipe source electrode is connected with the 2nd PMOS pipe source electrode, this the first gate pmos utmost point is extremely connected with the 3rd gate pmos, and connect bias voltage, this the second gate pmos utmost point is extremely connected with the 4th gate pmos, and connect the 3rd NMOS pipe drain electrode.
Further, this current source array is nmos type current source array, be formed in parallel by n identical unit current source, each unit current source comprises 6 NMOS pipes, NMOS pipe (M1-1) and NMOS pipe (M2-1) form cascode(cascode or common-emitter common-base) current mirror, NMOS pipe (M3-1) and NMOS pipe (M4-1) are gating switch, its source electrode connects the cascode current mirror of NMOS pipe (M1-1) and NMOS pipe (M2-1) formation, grid meets respectively output SWB1 and the SWA1 of decoder, output SWA1 and SWB1 by decoder determine current direction branch road A or the branch road B in current source, NMOS pipe (M5-1) and NMOS(M6-1) source electrode and drain electrode are all by short circuit, its grid meets respectively output SWA1 and the SWB1 of decoder, source electrode connects respectively the drain electrode of gating switch (M3-1) and gating switch (M4-1), drain electrode connects this output circuit, export respectively the difference output of this current source array.
Compared with prior art, a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention forms current source array by the parallel connection of multichannel difference output current source, control the state of each current source gating switch according to the difference of DAC input data by decoder, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, and the output of current source array is exported after the current mirror isolation of output circuit again, realize the object of the output end current burr of effective reduction DAC, and the present invention can directly be merged with other current source structures in the integrally-built situation of modification circuits not and together with use.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the current steer type DAC of prior art;
Fig. 2 is the circuit diagram of the unit current source of the current steer type DAC of prior art;
Fig. 3 is the configuration diagram of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention;
Fig. 4 is the current source array 33 of the first preferred embodiment and the circuit diagram of output circuit 34 of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention;
Fig. 5 is the current source array 33 of the second preferred embodiment and the circuit diagram of output circuit 34 of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention.
Fig. 6 is the simulation result contrast schematic diagram that the present invention contrasts traditional circuit.
Embodiment
Below, by specific instantiation accompanying drawings embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by content disclosed in the present specification.The present invention also can be implemented or be applied by other different instantiation, and the every details in this specification also can be based on different viewpoints and application, carries out various modifications and change not deviating under spirit of the present invention.
Fig. 3 is the configuration diagram of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention.As shown in Figure 3, a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention, comprise register 30, decoder 31, latch 32, current source array 33 and output circuit 34, this current steer type D/A converting circuit is with complementary form both-end output, circuit forms current source array 33 by the parallel connection of multichannel difference output current source, decoder 31 is controlled the state of each current source gating switch according to the difference of DAC input data, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, be the input data (digital signal) of D/A converting circuit input current source arrays 33 through register 30 and decoder 31 and after by clock synchronous, select to control the switch of the each current unit of current source array, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, output circuit 34 connects the difference output of current source array 33, and the output of current source array 33 is connected to load after one or many current mirror mirror image.In preferred embodiment of the present invention, current source array 33 comprises nmos type current source array and two kinds of structures of pmos type current source array.
Fig. 4 is the current source array 33 of the first preferred embodiment and the circuit diagram of output circuit 34 of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention.In the present invention's the first preferred embodiment, current source array 33 is nmos type current source array, and it is formed in parallel by n identical unit current source, and unitary current source structure is not unique here, only illustrates with structure in scheming at this.Each unit current source produces mirror image output current by two reference circuits that comprise NMOS pipe M1, M2 and M3, the image current benchmark of this current mirroring circuit is Iref, the unit current source forming take NMOS pipe M1-1-M6-1 is as example, the output signal that SWA1 and SWB1 are decoder.Wherein NMOS pipe M1-1 and NMOS pipe M2-1 form the accurate cascode current mirror of double-basis based on M1-M3, NMOS pipe M3-1 and NMOS pipe M4-1 are gating switch, its source electrode meets NMOS pipe M1-1 and NMOS pipe M2-1 forms cascode current mirror, grid meets respectively output SWB1 and the SWA1 of decoder, determines current direction branch road A or the branch road B in current source by output SWA1 and the SWB1 of decoder, the source electrode of NMOS pipe M5-1 and M6-1 and drain electrode are all by short circuit, its grid meets respectively output SWA1 and the SWB1 of decoder, source electrode connects respectively the drain electrode of gating switch M3-1 and M4-1, drain electrode connects output circuit 34, the difference of output current source array 33 output IA and IB respectively, M5-1 and M6-1 are for reducing the output current burr that switch coupling causes, for example, if when previous moment SWA1=1 and SWB1=0, M5-1 conducting and M3-1 cut-off, the M5-1 of drain-source short circuit stores some electric charges to deposit the form of electric capacity, if current time SWA1=0 and SWB1=1, M5-1 ends and M3-1 conducting, what the M5-1 of drain-source short circuit formed deposit the electric charge of storing on electric capacity discharges through M3-1, this discharging current can supplement the current break that M3-1 conducting causes, otherwise in M5-1 cut-off and M3-1 conducting need to change M5-1 conducting into and when M3-1 cut-off, the charging current when M5-1 of the drain-source short circuit of cut-off is converted to conducting absorbs M3-1 conducting and is converted to the current break while cut-off, so at A, the current spikes of B node can reduce.IA and IB are the difference output of current source array.Output circuit 34 comprises two parts, is respectively PMOS pipe M4-M7(and is followed successively by first to fourth PMOS pipe) and the current mirror that forms of PMOS pipe M8-M11, VBias is bias voltage.Here,, because DAC is difference output, two-part circuit structure is identical; Meanwhile, the ratio of current mirror is 1:m, can effectively reduce the power consumption of circuit.Wherein, m is more than or equal to 1 integer.Circuit output IOA is used for being connected load with IOB.It should be noted that at this, although the current source array in the present invention's the first preferred embodiment is nmos type current source array, those skilled in the art are not difficult to draw corresponding pmos type current source array according to this current source array, and the present invention does not repeat them here.
Fig. 5 is the current source array 33 of the second preferred embodiment and the circuit diagram of output circuit 34 of a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention.In the present invention's the second preferred embodiment, current source array 33 current source array for being formed by PMOS pipe, unitary current source structure is not unique yet here, only take shown in scheming as example.SWA and SWB are the switch controlling signal of decoder output, and IA and IB are the parallel connection output of current source array 33.The differential output circuit 34 that metal-oxide-semiconductor M2-M9 and metal-oxide-semiconductor M10-M17 are DAC, this two parts circuit is identical, wherein, M2-M5(is followed successively by first to fourth NMOS pipe) with M10-M13 be NMOS pipe, the current mirroring circuit that forms 1:k is connected to the difference output end of current lens array 33, M6-M9(is followed successively by first to fourth NMOS pipe) with M14-M17 be PMOS pipe, the current mirroring circuit that forms 1:m is connected to the current mirroring circuit of two 1:k, the current mirroring circuit output IOA of 1:m is used for being connected load with IOB, and VBias is bias voltage.In work, electric current I A is connected load respectively with IB after twice current mirror mirror image of 1:k and 1:m.Wherein k and m are the integer that is more than or equal to 1.
Contrast traditional DAC structure, in the present invention, the output of current source array can be played effective inhibitory action to the current spikes of output after current mirror isolation.Fig. 6 is the simulation result contrast schematic diagram that the present invention contrasts traditional circuit, visible by contrasting, and the present invention's the current steer type D/A converting circuit with burr inhibition ability plays effective inhibitory action to current spikes.
In sum, a kind of current steer type D/A converting circuit with burr inhibition ability of the present invention forms current source array by the parallel connection of multichannel difference output current source, control the state of each current source gating switch according to the difference of DAC input data by decoder, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, and the output of current source array is exported after the current mirror isolation of output circuit again, realize the object of the output end current burr of effective reduction DAC, and the present invention can directly be merged with other current source structures in the integrally-built situation of modification circuits not and together with use.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any those skilled in the art all can, under spirit of the present invention and category, modify and change above-described embodiment.Therefore, the scope of the present invention, should be as listed in claims.

Claims (7)

1. one kind has the current steer type D/A converting circuit that burr suppresses ability, comprise register, decoder, latch, current source array, it is characterized in that: this D/A converting circuit also comprises an output circuit, this D/A converting circuit is with complementary form both-end output, form this current source array by the parallel connection of multichannel difference output current source, this decoder is controlled the state of the each current source gating switch of this current source array according to the difference of these D/A converting circuit input data, and then control output current flows to difference output A end or B end, make output valve corresponding one by one with input data, this output circuit connects the difference output of this current source array, the output of this current source array is connected to load after one or many current mirror mirror image.
2. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 1, is characterized in that: this output circuit comprises the current mirroring circuit of two 1:m, is connected to respectively the difference output end of this current source array.
3. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 2, it is characterized in that: the current mirroring circuit of each 1:m comprises a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe and the 4th PMOS pipe, the one PMOS pipe drain electrode connects the output of this current source array, its source electrode and the drain electrode of the 2nd PMOS pipe are joined, the 3rd PMOS pipe drain electrode output connects load, its source electrode and the drain electrode of the 4th PMOS pipe are joined, the 4th PMOS pipe source electrode and the 2nd PMOS pipe source electrode are connected to power positive end, this the first gate pmos utmost point is extremely connected with the 3rd gate pmos, and connect bias voltage, this the second gate pmos utmost point, the 4th gate pmos utmost point is connected with a PMOS pipe drain electrode, and connect the output of this current source array.
4. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 1, it is characterized in that: this output circuit comprises the current mirroring circuit of two 1:k and the current mirroring circuit of two 1:m, the reference connection of the current mirroring circuit of each 1:k is in the difference output end of this current lens array, the benchmark of the current mirroring circuit of each 1:m is connected to the mirror image output of the current mirroring circuit of corresponding 1:k, and the mirror image output of the current mirroring circuit of each 1:m connects load.
5. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 4, it is characterized in that: the current mirroring circuit of each 1:k comprises a NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe and the 4th NMOS pipe, the one NMOS pipe drain electrode connects the output of this current source array, its source electrode and the drain electrode of the 2nd NMOS pipe are joined, the 3rd NMOS pipe drain electrode output connects the current mirroring circuit of 1:m, its source electrode and the drain electrode of the 4th NMOS pipe are joined, the 4th NMOS pipe source electrode and the 2nd NMOS pipe source electrode are connected to power supply negative terminal, the one NMOS tube grid is connected with the 3rd NMOS tube grid, the 2nd NMOS tube grid, the 4th NMOS tube grid is connected with a NMOS pipe drain electrode, and connect the output of this current source array.
6. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 5, it is characterized in that: the current mirroring circuit of each 1:m comprises a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe and the 4th PMOS pipe, the one PMOS pipe drain electrode connects the 3rd NMOS pipe drain electrode, its source electrode and the drain electrode of the 2nd PMOS pipe are joined, the 3rd PMOS pipe drain electrode output connects load, its source electrode and the drain electrode of the 4th PMOS pipe are joined, the 4th PMOS pipe source electrode is connected with the 2nd PMOS pipe source electrode, this the first gate pmos utmost point is extremely connected with the 3rd gate pmos, and connect bias voltage, this the second gate pmos utmost point is extremely connected with the 4th gate pmos, and connect the 3rd NMOS pipe drain electrode.
7. a kind of current steer type D/A converting circuit that burr suppresses ability that has as claimed in claim 1, it is characterized in that: this current source array is nmos type current source array, be formed in parallel by n identical unit current source, each unit current source comprises 6 NMOS pipes, NMOS pipe (M1-1) and NMOS pipe (M2-1) form cascode current mirror, NMOS pipe (M3-1) and NMOS pipe (M4-1) are gating switch, its source electrode connects the cascode current mirror of NMOS pipe (M1-1) and NMOS pipe (M2-1) formation, grid connects respectively the output (SWB1 and SWA1) of decoder, output SWA1 and SWB1 by decoder determine current direction branch road A or the branch road B in current source, NMOS pipe (M5-1) and NMOS(M6-1) source electrode and drain electrode are all by short circuit, its grid connects respectively the output (SWA1 and SWB1) of decoder, source electrode connects respectively the drain electrode of gating switch (M3-1) and gating switch (M4-1), drain electrode connects this output circuit, export respectively the difference output of this current source array.
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105162469A (en) * 2015-03-24 2015-12-16 清华大学 Synchronous latch register
CN106888016B (en) * 2015-12-15 2018-12-04 深圳市中兴微电子技术有限公司 A kind of current-steering digital-to-analog converter and current steer digital-to-analogue method for transformation
WO2019080911A1 (en) * 2017-10-25 2019-05-02 深圳锐越微技术有限公司 Soc baseband chip, and mismatch calibration circuit for current-steering digital-to-analog converter of same
WO2020097870A1 (en) * 2018-11-15 2020-05-22 北京比特大陆科技有限公司 Current distribution circuit and storage device
CN112039527A (en) * 2020-09-07 2020-12-04 成都海光微电子技术有限公司 Digital-to-analog conversion circuit and all-digital phase-locked loop
CN112787671A (en) * 2019-10-23 2021-05-11 华润微集成电路(无锡)有限公司 Current steering DAC circuit
CN113726340A (en) * 2019-01-10 2021-11-30 中芯国际集成电路制造(上海)有限公司 SAR-DAC device and working method thereof
CN113726336A (en) * 2021-09-03 2021-11-30 龙骧鑫睿(厦门)科技有限公司 Low-power-consumption current source array suitable for current steering DAC

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030001765A1 (en) * 2001-06-22 2003-01-02 Bright William J. Correction circuit for beta mismatch between thermometer encoded and R-2R ladder segments of a current steering DAC
CN102103387A (en) * 2009-12-18 2011-06-22 上海华虹集成电路有限责任公司 Voltage stabilizing circuit adaptive to current balance

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030001765A1 (en) * 2001-06-22 2003-01-02 Bright William J. Correction circuit for beta mismatch between thermometer encoded and R-2R ladder segments of a current steering DAC
CN102103387A (en) * 2009-12-18 2011-06-22 上海华虹集成电路有限责任公司 Voltage stabilizing circuit adaptive to current balance

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
尤国平: "10位高速数模转换器的研究与设计", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105162469A (en) * 2015-03-24 2015-12-16 清华大学 Synchronous latch register
CN106888016B (en) * 2015-12-15 2018-12-04 深圳市中兴微电子技术有限公司 A kind of current-steering digital-to-analog converter and current steer digital-to-analogue method for transformation
WO2019080911A1 (en) * 2017-10-25 2019-05-02 深圳锐越微技术有限公司 Soc baseband chip, and mismatch calibration circuit for current-steering digital-to-analog converter of same
US10804918B2 (en) 2017-10-25 2020-10-13 Radiawave Technologies Co., Ltd. SOC baseband chip and mismatch calibration circuit for a current steering digital-to-analog converter thereof
WO2020097870A1 (en) * 2018-11-15 2020-05-22 北京比特大陆科技有限公司 Current distribution circuit and storage device
CN112805656A (en) * 2018-11-15 2021-05-14 北京比特大陆科技有限公司 Current distribution circuit and storage device
CN113726340A (en) * 2019-01-10 2021-11-30 中芯国际集成电路制造(上海)有限公司 SAR-DAC device and working method thereof
CN113726340B (en) * 2019-01-10 2023-07-14 中芯国际集成电路制造(上海)有限公司 SAR-DAC device and working method thereof
CN112787671A (en) * 2019-10-23 2021-05-11 华润微集成电路(无锡)有限公司 Current steering DAC circuit
CN112787671B (en) * 2019-10-23 2024-02-06 华润微集成电路(无锡)有限公司 Current steering DAC circuit
CN112039527A (en) * 2020-09-07 2020-12-04 成都海光微电子技术有限公司 Digital-to-analog conversion circuit and all-digital phase-locked loop
CN113726336A (en) * 2021-09-03 2021-11-30 龙骧鑫睿(厦门)科技有限公司 Low-power-consumption current source array suitable for current steering DAC

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