CN103824917A - LED manufacturing method, LED and chip - Google Patents
LED manufacturing method, LED and chip Download PDFInfo
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- CN103824917A CN103824917A CN201410065734.8A CN201410065734A CN103824917A CN 103824917 A CN103824917 A CN 103824917A CN 201410065734 A CN201410065734 A CN 201410065734A CN 103824917 A CN103824917 A CN 103824917A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention provides an LED manufacturing method, an LED and a chip. The LED manufacturing method comprises the steps that a buffer layer is grown on a substrate; a non-doped gallium nitride layer and an N-type gallium nitride layer are sequentially grown on the buffer layer; at least one quantum well structure is grown on the N-type gallium nitride layer; an electron barrier layer is grown on the quantum well structure which is grown lastly; at least one insertion layer is grown on the electron barrier layer, wherein the insertion layer is composed of a P-type gallium nitride layer and an indium aluminum gallium nitrogen layer, and the indium aluminum gallium nitrogen layer is grown on the P-type gallium nitride layer; the P-type gallium nitride layer is grown on the insertion layer which is grown lastly. The manufactured LED is provided with the insertion layer with high carrier mobility, holes can fully migrate and diffuse in the insertion layer, as a result, the injection efficiency of the holes can be improved, the working voltage is effectively lowered, the light-emitting efficiency of the LED is improved, the distribution uniformity of the holes in the P-type layer is improved, emitted light is more uniform, currents in the layer can fully diffuse, and the antistatic ability of a device is effectively improved.
Description
Technical field
The present invention relates to light-emitting diode (Light-Emitting Diode is called for short LED) field, relate in particular to a kind of LED preparation method, LED and chip of aluminium gallium nitrogen (InAlGaN) insert layer with high carrier mobility.
Background technology
III-V family semi-conducting material has obtained application widely in fields such as luminous lighting, solar cell and high power devices, especially the semiconductor material with wide forbidden band take gallium nitride (GaN) as representative, it is the third generation semi-conducting material after silicon (Si) and GaAs (GaAs), be subject to the extensive concern of scientific research circle and industrial circle, and GaN manufactures blue green light LED topmost material, start to carry out all sidedly in industrial circle.
At present, the preparation method of gallium nitride based LED is by being only prepared from as sapphire or silicon substrate growing epitaxial layers in foreign substrate, but in preparation process, easily cause epitaxial loayer to produce dislocation, so can limit the injection in hole, when the injectability in hole has in limited time, can cause gallium nitride based LED luminous efficiency to reduce, and because hole itself exists mobility low, the shortcomings such as diffusion length is short, make hole migrate to the efficiency of quantum well active area from p type island region very low, be that hole is limited at p type island region extended capability, so can cause the antistatic effect of traditional gallium nitride based LED slightly low, Human Body Model can only arrive 2000V left and right, in strong static environment, easily puncture, simultaneously, because hole two-dimensional expansion ability is poor, while causing LED work, current transfer is not equally distributed, may form a current channel, can cause the higher problem of device operating voltage, also therefore affected luminous efficiency.
Summary of the invention
The invention provides a kind of LED preparation method, by further introduce insert layer in existing LED, solve in prior art because the injectability in hole is limited by the high carrier mobility of this insert layer, cause LED luminous efficiency low and because hole is in the poor defect of p type island region extended capability, improved the antistatic effect of prepared LED.
The LED that the present invention also provides above-mentioned LED preparation method to make, has high carrier mobility insert layer by introducing, has effectively improved the antistatic effect of device.
The present invention also provides the chip that comprises above-mentioned LED, and chip operating voltage reduces, and luminosity increases.
First aspect, the invention provides a kind of LED preparation method, comprising:
On substrate, generate resilient coating by source metal and ammonia gas react;
On described resilient coating, grow successively gallium nitride (GaN) layer and the n type gallium nitride (N-GaN) layer of non-doping;
At least one quantum well structure of growing on described N-GaN layer, wherein, described quantum well structure is made up of quantum barrier layer and quantum well layer, and described quantum well layer is grown on described quantum barrier layer;
The electronic barrier layer of growing on the described quantum well structure in the end generating;
At least one deck insert layer of growing on described electronic barrier layer, wherein, described insert layer is made up of P type gallium nitride (P-GaN) layer and aluminium gallium nitrogen (InAlGaN) layer, and described InAlGaN layer growth is on described P-GaN layer;
The P-GaN layer of growing in the described insert layer in the end generating.
In a concrete scheme, the temperature of controlling reaction environment is 500-550 ℃, pressure is 200-600mbar, pass into source metal and ammonia, on substrate, form the resilient coating that thickness is 10-100nm, in specific embodiment, described substrate can be sapphire, graphic sapphire, silicon, carborundum, zinc oxide, any one in the conventional backing material such as glass and copper, described source metal is one or more of alkylates of group IIIA metal, as gallium, the alkylates of aluminium and indium etc., it can be for example triethyl-gallium, trimethyl gallium, one or more in trimethyl aluminium and trimethyl indium, described ammonia is used for providing nitrogenous source, according to selected source metal, the corresponding resilient coating generating can be GaN, InN, AlN etc. or mixture.The operation of described production buffer layer can be used the conventional consersion unit in this area, can be for example metal organic chemical vapor deposition (metal-organic chemical vapor deposition, be called for short: MOCVD) equipment, molecular beam epitaxy (Molecular beam epitaxy, be called for short: MBE) equipment, hydride gas-phase epitaxy (Hydride vapor phase epitaxy, be called for short: HVPE) equipment etc., the present invention is not particularly limited (being also applicable in other step of the present invention program).The time that passes into source metal and ammonia in course of reaction can specifically be set according to source metal and ammonia intake per minute, when source metal and ammonia intake per minute hour, suitably increase the time that passes into of source metal and ammonia, so that the thickness of the final resilient coating generating is within the scope of 5-100nm.
Embodiment of the present invention, resilient coating has generated, and controls 800～1100 ℃ of temperature, and pressure is 200-600mbar, passes into gallium source compound and NH
3, on described resilient coating, forming thickness is the GaN layer of the non-doping of 500～2000nm, wherein, gallium source compound can be triethyl-gallium or trimethyl gallium, and then, controlling temperature is 1000～1100 ℃, pressure is 200-600mbar, maintains and passes into gallium source compound and NH
3, and mix N-type impurity, the doping content of described N-type impurity is 1x10
17～5x10
19cm
-3, on the GaN of described non-doping layer, forming thickness is the N-GaN layer of 1000～3000nm.In this process, due to suitable temperature and pressure environment, resilient coating can occur to decompose and polymerization, can spread and move at substrate surface, formation has equally distributed nucleus structure (describe on available " nucleus island "), the gallium source compound now passing into and NH3 make the nucleus island of resilient coating grow up and merge, and generate the GaN layer of non-doping.
Doping is common practise and the means in this area, and N-type impurity can provide conduction electrons for what mix in preparation LED, thereby improves a class impurity of conductive characteristic, and the N-type impurity generally mixing can be silicon or silane.
According to embodiment of the present invention, complete after the arranging of non-Doped GaN layer and N-GaN layer, can carry out according to following steps the growth of quantum well structure, step 1: controlling temperature is 800～900 ℃, pressure is 200-600mbar, pass into gallium source compound and ammonia, growing GaN quantum barrier layer on described N-GaN layer.Grow described GaN quantum barrier layer on described N-GaN layer time, can mix N-type impurity and form N-GaN quantum barrier layer, also can not mix N-type impurity, form the GaN quantum barrier layer of non-doping.Wherein, in the present invention, no matter which kind of quantum barrier layer, the thickness of quantum barrier layer is all 5-25nm, and quantum barrier layer is not limited to just GaN quantum barrier layer in the present invention, can also be AlGaN quantum barrier layer or InGaN quantum barrier layer, step 2: controlling temperature is 700～800 ℃, pressure is 200-600mbar, pass into gallium source compound, indium source compound and ammonia, wherein indium source compound can be triethylindium, trimethyl indium, growing gallium nitride indium (InGaN) quantum well layer on described GaN quantum barrier layer, the InGaN quantum well layer that described InGaN quantum well layer is non-doping, wherein, in the present invention, no matter which kind of quantum well layer, the thickness of quantum well layer is all 1-5nm, in described InGaN quantum well layer composition, based on stoichiometry, the molar content of indium (In) is A, and 0<A<1, , the molar percentage of In in the molar content representation unit mole InGaN of In in InGaN quantum well layer composition.Described quantum barrier layer and a quantum well structure that thickness is 6-30nm of described quantum well layer composition, it should be noted that, the thickness of quantum barrier layer is traditionally with building wide expression, the thickness of quantum well layer represents with trap is wide traditionally, the thickness custom of a quantum well structure represents with periodic thickness, periodic thickness by trap wide add on base wide.In the present invention, the quantity of described quantum well structure can be 1-50, obtain 1 described quantum well structure by above-mentioned steps 1 and step 2, in the time that the quantity of described quantum well structure is 2, step 3: repeat once described step 1 and step 2 and make the 2nd quantum well structure, quantum well structure of regrowth on the described quantum well layer generating in step 2, if multiple quantum well structures, according to quantity repeating step 1 and the step 2 of quantum well, described quantum well structure during at least 2, forms the structure of GaN/InGaN Multiple Quantum Well.
In embodiment of the present invention, complete after the generation of quantum well structure, controlling temperature is 800～900 ℃, pressure is 200-600mbar, pass into gallium source compound and ammonia, GaN layer described in regrowth one deck on the described quantum well layer of the described quantum well structure in the end generating,, in the time that described quantum well structure is multi-quantum pit structure, one deck GaN layer of growing on the quantum well layer of quantum well structure in the end generating, in this GaN layer, can mix impurity and also can not mix impurity, concrete can be referring to the described GaN layer generating in step 1, then controlling temperature is 800-1000 ℃, pressure is 200-600mbar, pass into gallium source compound, aluminum source compound, indium source compound and ammonia, wherein, aluminum source compound can be triethyl aluminum, trimethyl aluminium, in the end continued growth one deck InAlGaN electronic barrier layer on the described GaN layer of growth, described InAlGaN electronic blocking layer thickness is 10-100nm, in described InAlGaN electronic barrier layer composition, the molar content of In is M, the molar content of aluminium (Al) is N, the molar content of gallium (Ga) is 1-M-N, wherein, 0<M<1, 0<N<1.
In embodiment of the present invention, on InAlGaN electronic barrier layer, can generate at least one deck insert layer by steps A and step B having grown, steps A: control temperature is 900-1100 ℃, pressure is 200-600mbar, pass into gallium source compound, p type impurity and ammonia, the described P-GaN layer of growing on described InAlGaN electronic barrier layer, in the present invention, p type impurity is assorted different from N-type: p type impurity can provide hole for what mix in preparation LED, thereby improve a class impurity of conductive characteristic, general p type impurity can be magnesium, the doping content of p type impurity is 1 × 10
18cm
-3～5 × 10
20cm
-3, described P-GaN layer thickness is 10-200nm, then perform step B: the temperature of controlling reaction environment is 900-1100 ℃, pressure is 200-600mbar, pass into gallium source compound, aluminum source compound, indium source compound, p type impurity and ammonia, the InAlGaN layer of growing on described P-GaN layer, described InAlGaN layer thickness is 1-5nm, and the doping content of the p type impurity of described InAlGaN layer is 1 × 10
18cm
-3～5 × 10
20cm
-3in described InAlGaN layer composition, the molar content of In is M, the molar content of Al is N, the molar content of Ga is 1-M-N, wherein, 0<M<1,0<N<1, described P-GaN layer and described InAlGaN layer form described insert layer.
Specific embodiment of the invention scheme, can generate individual layer P-GaN/InAlGaN insert layer by steps A and step B, also can be multilayer, the number of plies scope of described insert layer is 1-20 layer, in the time that described insert layer is 2 layers, perform step C: repeat steps A and step B, when described insert layer is multilayer, according to the number of plies of insert layer successively repeating step A and step B, form { P-GaN/InAlGaN} superlattice structure.
In such scheme, finally, temperature control is 900-1100 ℃, pressure is 200-600mbar, pass into gallium source compound, p type impurity and ammonia, the a layer thickness of growing on the described InAlGaN layer in the end generating is the P-GaN layer of 10-200nm, that is: when described insert layer is individual layer, on the InAlGaN of described insert layer layer, cover one deck P-GaN layer, in the time that described insert layer is multilayer, on the described InAlGaN layer in the end generating, cover one deck P-GaN layer, in described P-GaN layer, the doping content of p type impurity is 1 × 10
18cm
-3～5 × 10
20cm
-3.
In described P-GaN/InAlGaN insert layer provided by the invention, InAlGaN layer is for having high carrier mobility layer, hole can fully be moved and spread at this layer, form good hole-conductive layer, and there is high carrier mobility layer and can improve the injection efficiency in hole, hole injection efficiency improves can effectively reduce operating voltage, there is high carrier mobility layer and can also improve the distributing homogeneity of hole at P type layer, thereby make luminous more even, and traditional P type layer easily forms current channel, limit the raising of luminous efficiency, the existence of this high carrier mobility layer can address this problem well, having in addition high carrier mobility layer makes the electric current can be abundant this layer of diffusion, can effectively improve the antistatic effect of device.
Apart from special instruction, in the present invention, for example, while forming doped layer (N-GaN layer, P-GaN layer), the foreign atom number that doping content contains in representing every cubic centimetre, implement can to use this area to prepare the various kinds of equipment that LED is conventional in each growth course of the present invention reative cell is provided, for example MOCVD equipment, MBE equipment and HVPE equipment etc., wherein thereby MOCVD equipment is to utilize metal organic chemical vapor deposition technology metallo-organic compound to be carried out on substrate to the equipment of vapour deposition preparation LED in pyrolysis mode, MBE equipment is to utilize molecular beam epitaxy technique to prepare the equipment of LED, HVPE equipment is to utilize hydride gas-phase epitaxy technology to prepare the equipment of LED, in specific implementation process, can and need to determine corresponding equipment according to actual conditions.
The present invention also provides a kind of LED, and it prepares according to above-mentioned either method.
The present invention further provides a kind of chip, comprising: the LED that at least one is above-mentioned.
The invention provides a kind of improved LED preparation method, the LED of preparation has high carrier mobility insert layer, hole can fully be moved and spread at this layer, therefore can improve the injection efficiency in hole, thereby effectively reduce operating voltage, LED luminous efficiency strengthens, and improve the distributing homogeneity of hole at P type layer, make luminous more evenly, electric current can spread fully at this layer, has effectively improved the antistatic effect of device.
Accompanying drawing explanation
The structural representation of the LED that Fig. 1 provides for the embodiment of the present invention one;
The structural representation of the LED that Fig. 2 provides for the embodiment of the present invention two.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment mono-
In the present embodiment, in the LED being prepared from by following LED preparation method, insert layer is individual layer insert layer, quantum well structure is multi-quantum pit structure, each layer that in preparation process, generates can be referring to Fig. 1, the structural representation of the LED that Fig. 1 provides for the embodiment of the present invention one, the consersion unit of selecting in the present embodiment is MOCVD, and the substrate of selecting is silicon substrate.
1, controlling MOCVD reaction chamber temperature is 520 ℃, pressure is 600mbar, pass into trimethyl gallium (150mL/min) and NH3(60L/min), setting growth time is 3 minutes (in the present embodiment, the time that passes into of each material is growth time), on silicon substrate (Si) 101, react, the GaN resilient coating 102 that formation thickness is 25nm.
2, controlling temperature is 1050 ℃, and pressure is 200mbar, passes into trimethyl gallium (280mL/min) and ammonia (65L/min), and setting growth time is 30 minutes, the GaN layer 103 of the non-doping that a layer thickness of growing on GaN resilient coating 102 is 1500nm.
3, temperature maintains 1050 ℃, and pressure maintains 200mbar, passes into trimethyl gallium (300mL/min) and ammonia (65L/min), setting growth time is 40 minutes, and mix silane, and the N-GaN layer 104 that growth a layer thickness is 1500nm, in N-GaN layer 104, the doping content of silane is 1 × 10
19cm
-3;
4, controlling reaction chamber temperature is 840 ℃, and pressure is 300mbar, passes into triethyl-gallium (360mL/min) and ammonia (40L/min), mixes Si impurity, and Si doping content is 1 × 10
18cm
-3, set growth time and be 2 points 30 seconds, the GaN quantum barrier layer 105 of the one deck of growing on N-GaN layer 104 doping, the thickness of GaN quantum barrier layer 105 is 12nm.
5, controlling reaction chamber temperature is 760 ℃, pressure is 300mbar, pass into triethyl-gallium (120mL/min), trimethyl indium (400mL/min) and ammonia (40L/min), set growth time be 1 point 30 seconds, grow on the above-mentioned GaN quantum barrier layer 105 InGaN quantum well layer 106 of the non-doping of one deck, the thickness of InGaN quantum well layer 106 is 3nm, and in InGaN quantum well layer 106, the molar content of In is about 10%.GaN quantum barrier layer 105 and InGaN quantum well layer 106 form the quantum well structure X that thickness is 15nm.
6, repeat the 4th step and 8 circulations of the 5th step, form the multi-quantum pit structure Y that comprises 9 GaN/InGaN quantum well.
7, controlling reaction chamber temperature is 840 ℃, pressure is 300mbar, pass into triethyl-gallium (360mL/min) and ammonia (40L/min), setting growth time is 1 minute, the GaN layer 107 of the non-doping of one deck of growing on the InGaN quantum well layer 106 of the 9th the GaN/InGaN quantum well structure generating.
8, controlling temperature is 900 ℃, pressure is 200mbar, pass into trimethyl gallium (120mL/min), trimethyl aluminium (60mL/min), trimethyl indium (60mL/min) and ammonia (20L/min), set growth time 2 minutes, one deck InAlGaN electronic barrier layer 108 of growing on the GaN of non-doping layer 107,, in InAlGaN electronic barrier layer 108, the molar content of Al is 15%, In molar content is that the thickness of 1%, InAlGaN electronic barrier layer 108 is 15nm.
9, growth P-type GaN on the basis of InAlGaN electronic barrier layer, controlling temperature is 980 ℃, pressure is 200mbar, pass into trimethyl gallium (120mL/min), two luxuriant magnesium (400mL/min) and ammonia (65L/min), setting growth time is 8min, the P-GaN layer 109 of growing on InAlGaN electronic barrier layer 108, the thickness of P-GaN layer 109 is 80nm, and the doping content of Mg is 2.3 × 10
20cm
-3.
10, control temperature and reduce to 900 ℃, pressure is 200mbar, pass into triethyl-gallium (340mL/min), trimethyl aluminium (20mL/min), trimethyl indium (200mL/min), two luxuriant magnesium (50mL/min) and ammonia (20L/min), setting growth time is 1 minute, the InAlGaN layer 1010 of growing on P-GaN layer 109, the molar content that in InAlGaN layer 1010, the molar content of In is 10%, Al is that the doping content of 15%, Mg is 2 × 10
19cm
-3, the thickness of InAlGaN layer 1010 is about 3nm, and P-GaN layer 109 and InAlGaN layer 1010 form individual layer high carrier mobility insert layer M.
11, repeat the 9th step, that is, regrowth one deck P-GaN layer 109 on InAlGaN layer 1010, prepared by the LED of this individual layer high carrier mobility insert layer.
The LED that embodiment mono-is prepared from is made into 350 μ m × 350 μ m chips, passes into the electric current of 20mA, and recording operating voltage is 2.95V, and luminosity is 32mW.
As a comparison, employing obtains LED according to existing preparation method and is made into 350 μ m × 350 μ m chips, passes into the electric current of 20mA, records operating voltage and is about 3.1V, and luminosity is about 29mW.
The LED preparation method that the present embodiment provides, the LED of preparation has high carrier mobility insert layer, hole can fully be moved and spread at this layer, form good hole-conductive layer, therefore can improve the injection efficiency in hole, in the time that improving, hole injection efficiency can effectively reduce operating voltage, high carrier mobility insert layer can improve the distributing homogeneity of hole at P type layer simultaneously, make luminous more even, and traditional p-type layer easily forms current channel, limit the raising of luminous efficiency, the existence of this high carrier mobility layer can solve the problem of luminous efficiency well, in addition, electric current can spread fully in high carrier mobility insert layer, effectively improve the antistatic effect of device.
Embodiment bis-
In the present embodiment, in the LED being prepared from by following LED preparation method, insert layer is multilayer insert layer, be that insert layer is superlattice inserting structure, each layer that in preparation process, generates can be referring to Fig. 2, the structural representation of the LED that Fig. 1 provides for the embodiment of the present invention two, the consersion unit of selecting in the present embodiment is MOCVD, and the substrate of selecting is silicon substrate.
1, controlling MOCVD reaction chamber temperature is 520 ℃, pressure is 600mbar, pass into trimethyl gallium (150mL/min) and NH3(60L/min), setting growth time is 3 minutes (in the present embodiment, the time that passes into of each material is growth time), on silicon substrate (Si) 201, react, the GaN resilient coating 202 that formation thickness is 25nm.
2, controlling temperature is 1050 ℃, passes into trimethyl gallium (280mL/min) and ammonia (65L/min), and setting growth time is 30 minutes, and pressure maintenance 200mbar is the GaN layer 203 of the non-doping of 1500nm in GaN resilient coating 202 a layer thickness of growing.
3, temperature maintains 1050 ℃, and pressure maintains 200mbar, passes into trimethyl gallium (300mL/min) and ammonia (65L/min), setting growth time is 40 minutes, and mix silane, and the N-GaN layer 204 that growth a layer thickness is 1500nm, in N-GaN layer 204, the doping content of silane is 1 × 10
19cm
-3.
4, controlling temperature is 840 ℃, and pressure is 300mbar, passes into triethyl-gallium (360mL/min) and ammonia (40L/min), mixes Si impurity, and Si doping content is 1 × 10
18cm
-3, set growth time and be 2 points 30 seconds, the GaN quantum barrier layer 205 of the one deck of growing on N-GaN layer 204 doping, the thickness of GaN quantum barrier layer 205 is 12nm.
5, controlling temperature is 760 ℃, pressure maintains 300mbar, pass into triethyl-gallium (120mL/min), trimethyl indium (400mL/min) and ammonia (40L/min), set growth time be 1 point 30 seconds, grow on the above-mentioned GaN quantum barrier layer 205 InGaN quantum well layer 206 of the non-doping of one deck, the thickness of InGaN quantum well layer 206 is 3nm, and in InGaN quantum well layer 206, the molar content of In is about 10%.GaN quantum barrier layer 205 and InGaN quantum well layer 206 form the quantum well structure X that a thickness is 15nm.
6, repeat the 4th step and 8 circulations of the 5th step, form the multi-quantum pit structure Y that comprises 9 GaN/InGaN quantum well.
7, controlling reaction chamber temperature is 840 ℃, pressure is 300mbar, pass into triethyl-gallium (360mL/min) and ammonia (40L/min), setting growth time is 1 minute, the GaN layer 207 of the non-doping of one deck of growing on the InGaN quantum well layer 206 of the 9th the GaN/InGaN quantum well structure generating.
8, controlling temperature is 900 ℃, pressure is 200mbar, pass into trimethyl gallium (120mL/min), trimethyl aluminium (60mL/min), trimethyl indium (60mL/min) and ammonia (20L/min), set growth time 2 minutes, one deck InAlGaN electronic barrier layer 208 of growing on the GaN of non-doping layer 207, the molar content that in InAlGaN electronic barrier layer 208, the molar content of Al is 15%, In is that the thickness of 1%, InAlGaN electronic barrier layer 208 is 15nm.
9, growth P-type GaN on the basis of InAlGaN electronic barrier layer, it is 980 ℃ by temperature control, pressure is 200mbar, pass into trimethyl gallium (60mL/min), two luxuriant magnesium (200mL/min) and ammonia (65L/min), setting growth time is 4min, the P-GaN layer 209 of growing on InAlGaN electronic barrier layer 208, the thickness of P-GaN layer 209 is 20nm, and the doping content of Mg is 2.3 × 10
20cm
-3.
10, it is 900 ℃ by temperature control, pressure is 200mbar, pass into triethyl-gallium (340mL/min), trimethyl aluminium (20mL/min), trimethyl indium (200mL/min), two luxuriant magnesium (50mL/min) and ammonia (20L/min), setting growth time is 1 minute, the InAlGaN layer 2010 of growing on P-GaN layer 209, the molar content that in InAlGaN layer 2010, the molar content of In is 10%, Al is that the doping content of 15%, Mg is 2 × 10
19cm
-3, the thickness of InAlGaN layer 2010 is about 3nm, and P-GaN layer 209 and InAlGaN layer 2010 form individual layer high carrier mobility insert layer M.
11, repeat 8 circulations of 9-10 step, form the superlattice high carrier mobility insert layer structure N that comprises 9 layers of GaN/InAlGaN.
12, continue to repeat the 9th step, regrowth one deck P-GaN layer 209 on the InAlGaN layer 2010 of the 9th layer of GaN/InAlGaN insert layer, this superlattice high carrier mobility insert layer LED structure completes.
Be made into 350 μ m × 350 μ m chips by implementing two LED that are prepared from, pass into the electric current of 20mA, recording operating voltage is 2.90V, and luminosity is 35mW.
As a comparison, the LED that adopts existing preparation method to obtain is made into 350 μ m × 350 μ m chips, passes into the electric current of 20mA, and recording operating voltage is 3.1V, and luminosity is 29mW.
The LED preparation method that the present embodiment provides, the LED of preparation has high carrier mobility insert layer, hole can fully be moved and spread at this layer, form good hole-conductive layer, therefore can improve the injection efficiency in hole, in the time that improving, hole injection efficiency can effectively reduce operating voltage, high carrier mobility insert layer can improve the distributing homogeneity of hole at P type layer simultaneously, make luminous more even, and traditional p-type layer easily forms current channel, limit the raising of luminous efficiency, the existence of this high carrier mobility layer can solve the problem of luminous efficiency well, in addition, electric current can spread fully in high carrier mobility insert layer, effectively improve the antistatic effect of device.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (10)
1. a LED preparation method, is characterized in that, comprising:
On substrate, generate resilient coating by source metal and ammonia gas react;
On described resilient coating, grow successively gallium nitride layer and the n type gallium nitride layer of non-doping;
At least one quantum well structure of growing layer by layer at described n type gallium nitride, wherein, described quantum well structure is made up of quantum barrier layer and quantum well layer, and described quantum well layer is grown on described quantum barrier layer;
The electronic barrier layer of growing on the described quantum well structure generating;
At least one deck insert layer of growing on described electronic barrier layer, described at least one deck insert layer is made up of P type gallium nitride layer and aluminium gallium nitrogen layer, and makes aluminium gallium nitrogen layer growth on described P type gallium nitride layer;
Growing P-type gallium nitride layer in the described insert layer generating.
2. LED preparation method according to claim 1, is characterized in that, describedly on substrate, generates resilient coating by source metal and ammonia gas react, comprising:
Control the temperature 500-550 ℃ of reaction environment, pressure is 200-600mbar, passes into source metal and ammonia, forms the resilient coating that thickness is 5-100nm on described substrate, and wherein, described source metal is one or more of alkyl compound of group IIIA metal.
3. LED preparation method according to claim 1 and 2, is characterized in that, gallium nitride layer and the n type gallium nitride layer of the described non-doping of growing successively on described resilient coating, comprising:
800～1100 ℃ of the temperature of control reaction environment, pressure is 200-600mbar, passes into gallium source compound and NH3, forms the gallium nitride layer that thickness is the non-doping of 500～2000nm on described resilient coating;
Control 1000～1100 ℃ of temperature, pressure is 200-600mbar, maintains and passes into gallium source compound and NH
3, and mix N-type impurity, the doping content of described N-type impurity is 1x10
17～5x10
19cm
-3, on the gallium nitride layer of described non-doping, forming thickness is the n type gallium nitride layer of 1000～3000nm.
4. LED preparation method according to claim 1, is characterized in that, described at least one quantum well structure of growing on described n type gallium nitride layer, comprising:
800～900 ℃ of step 1, control temperature, pressure is 200-600mbar, passes into gallium source compound and ammonia, growing gallium nitride quantum barrier layer on described n type gallium nitride layer, and the thickness of this gallium nitride quantum barrier layer is 5-25nm;
Step 2, adjust the temperature to 700～800 ℃, pressure is 200-600mbar, pass into gallium source compound, indium source compound and ammonia, growing gallium nitride indium quantum well layer on described gallium nitride quantum barrier layer, based on the stoichiometric relationship of described indium gallium nitride quantum well layer composition, wherein the molar content of indium is A, and 0<A<1, described indium gallium nitride quantum well layer thickness is 1-5nm, described gallium nitride quantum barrier layer and a quantum well structure that thickness is 6-30nm of described indium gallium nitride quantum well layer composition;
The quantity of the described quantum well structure that step 3, basis are determined repeats above-mentioned steps 1 and step 2, and the quantity of described quantum well structure is 1-50.
5. according to the LED preparation method described in claim 1 or 4, it is characterized in that, the electronic barrier layer of growing on the described described quantum well structure generating, comprising:
Control 800～900 ℃ of temperature, pressure is 200-600mbar, passes into gallium source compound and ammonia, gallium nitride layer described in regrowth one deck on the described quantum well layer of the described quantum well structure in the end generating; Then
Control temperature 800-1000 ℃, pressure is 200-600mbar, pass into gallium source compound, aluminum source compound, indium source compound and ammonia, make continued growth one deck aluminium gallium nitrogen electronic barrier layer on described gallium nitride layer, described aluminium gallium nitrogen electronic blocking layer thickness is 10-100nm, in described aluminium gallium nitrogen electronic barrier layer composition, the molar content of indium is M, the molar content of aluminium is N, the molar content of gallium is 1-M-N, wherein, 0<M<1,0<N<1.
6. LED preparation method according to claim 1, is characterized in that, the described at least one deck insert layer of growing on described electronic barrier layer, comprising:
Steps A, control temperature 900-1100 ℃, pressure is 200-600mbar, passes into gallium source compound, p type impurity and ammonia, the described P type gallium nitride layer of growing on described electronic barrier layer;
Step B, control temperature are at 900-1100 ℃, and pressure is 200-600mbar, passes into gallium source compound, aluminum source compound, indium source compound, p type impurity and ammonia, the described aluminium gallium nitrogen layer of growing on described P type gallium nitride layer;
Step C, according to number of plies repeating step A and the B of definite insert layer, the number of plies of described insert layer is 1-20 layer.
7. according to the LED preparation method described in claim 1 or 6, it is characterized in that,
The P type gallium nitride layer thickness that forms insert layer is 10-200nm, and wherein the doping content of p type impurity is 1 × 10
18cm
-3～5 × 10
20cm
-3.
8. according to the LED preparation method described in claim 1 or 6, it is characterized in that,
The aluminium gallium nitrogen layer thickness of insert layer is 1-5nm, and wherein the doping content of p type impurity is 1 × 10
18cm
-3～5 × 10
20cm
-3, and in described aluminium gallium nitrogen layer composition, the molar content of indium is M, and the molar content of aluminium is N, and the molar content of gallium is 1-M-N, wherein, 0<M<1,0<N<1.
9. a LED who prepares according to the LED preparation method described in claim 1～8 any one.
10. a chip, is characterized in that, comprises at least one LED claimed in claim 9.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105762248A (en) * | 2016-05-16 | 2016-07-13 | 安徽三安光电有限公司 | Light-emitting diode and preparation method thereof |
| CN105789392A (en) * | 2016-04-28 | 2016-07-20 | 聚灿光电科技股份有限公司 | GaN-based LED epitaxial structure and manufacturing method thereof |
| CN106784179A (en) * | 2016-12-06 | 2017-05-31 | 圆融光电科技股份有限公司 | A kind of LED preparation methods, LED and chip |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6995403B2 (en) * | 2003-09-03 | 2006-02-07 | United Epitaxy Company, Ltd. | Light emitting device |
| CN102544285A (en) * | 2012-01-16 | 2012-07-04 | 北京大学 | Nitride light-emitting device for improving light-emitting efficiency by electron barrier layer |
| CN102969417A (en) * | 2012-11-01 | 2013-03-13 | 扬州中科半导体照明有限公司 | Green nitride light-emitting diode (LED) epitaxial wafer and growth method thereof |
| CN103050592A (en) * | 2013-01-06 | 2013-04-17 | 湘能华磊光电股份有限公司 | LED (Light Emitting Diode) epitaxial structure with P (Positive) type superlattice and preparation method thereof |
-
2014
- 2014-02-25 CN CN201410065734.8A patent/CN103824917B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6995403B2 (en) * | 2003-09-03 | 2006-02-07 | United Epitaxy Company, Ltd. | Light emitting device |
| CN102544285A (en) * | 2012-01-16 | 2012-07-04 | 北京大学 | Nitride light-emitting device for improving light-emitting efficiency by electron barrier layer |
| CN102969417A (en) * | 2012-11-01 | 2013-03-13 | 扬州中科半导体照明有限公司 | Green nitride light-emitting diode (LED) epitaxial wafer and growth method thereof |
| CN103050592A (en) * | 2013-01-06 | 2013-04-17 | 湘能华磊光电股份有限公司 | LED (Light Emitting Diode) epitaxial structure with P (Positive) type superlattice and preparation method thereof |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105789392A (en) * | 2016-04-28 | 2016-07-20 | 聚灿光电科技股份有限公司 | GaN-based LED epitaxial structure and manufacturing method thereof |
| CN105762248A (en) * | 2016-05-16 | 2016-07-13 | 安徽三安光电有限公司 | Light-emitting diode and preparation method thereof |
| CN106784179A (en) * | 2016-12-06 | 2017-05-31 | 圆融光电科技股份有限公司 | A kind of LED preparation methods, LED and chip |
| CN106784179B (en) * | 2016-12-06 | 2019-05-14 | 圆融光电科技股份有限公司 | A kind of LED preparation method, LED and chip |
| CN108735864A (en) * | 2018-05-28 | 2018-11-02 | 华灿光电（浙江）有限公司 | A kind of preparation method of LED epitaxial slice |
| CN108735864B (en) * | 2018-05-28 | 2019-08-23 | 华灿光电（浙江）有限公司 | A kind of preparation method of LED epitaxial slice |
| CN110635007A (en) * | 2019-09-12 | 2019-12-31 | 佛山市国星半导体技术有限公司 | Antistatic epitaxial structure and preparation method thereof |
| CN111081836A (en) * | 2020-01-21 | 2020-04-28 | 福建兆元光电有限公司 | Light emitting diode and method for manufacturing the same |
| CN115347097A (en) * | 2022-10-18 | 2022-11-15 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer and preparation method thereof |
| CN115347097B (en) * | 2022-10-18 | 2023-03-14 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer and preparation method thereof |
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