CN103688355B - 使用硅穿孔的集成电路设计 - Google Patents
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- CN103688355B CN103688355B CN201280032257.4A CN201280032257A CN103688355B CN 103688355 B CN103688355 B CN 103688355B CN 201280032257 A CN201280032257 A CN 201280032257A CN 103688355 B CN103688355 B CN 103688355B
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- H—ELECTRICITY
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/170,020 | 2011-06-27 | ||
| US13/170,020 US8560982B2 (en) | 2011-06-27 | 2011-06-27 | Integrated circuit design using through silicon vias |
| PCT/US2012/021416 WO2013002844A1 (en) | 2011-06-27 | 2012-01-16 | Integrated circuit design using through silicon vias |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103688355A CN103688355A (zh) | 2014-03-26 |
| CN103688355B true CN103688355B (zh) | 2016-06-01 |
Family
ID=45607357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201280032257.4A Active CN103688355B (zh) | 2011-06-27 | 2012-01-16 | 使用硅穿孔的集成电路设计 |
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| US8264065B2 (en) * | 2009-10-23 | 2012-09-11 | Synopsys, Inc. | ESD/antenna diodes for through-silicon vias |
| US8766459B2 (en) * | 2010-05-03 | 2014-07-01 | Georgia Tech Research Corporation | CMUT devices and fabrication methods |
| US8604619B2 (en) * | 2011-08-31 | 2013-12-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through silicon via keep out zone formation along different crystal orientations |
| US20130132023A1 (en) * | 2011-11-17 | 2013-05-23 | Advanced Micro Devices, Inc. | Structure for characterizing through-silicon vias and methods thereof |
| US8664768B2 (en) * | 2012-05-03 | 2014-03-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interposer having a defined through via pattern |
| US9026872B2 (en) * | 2012-08-16 | 2015-05-05 | Xilinx, Inc. | Flexible sized die for use in multi-die integrated circuit |
| US9997443B2 (en) | 2013-02-25 | 2018-06-12 | Infineon Technologies Ag | Through vias and methods of formation thereof |
| US8957504B2 (en) | 2013-03-15 | 2015-02-17 | IP Enval Consultant Inc. | Integrated structure with a silicon-through via |
| US8952500B2 (en) | 2013-03-15 | 2015-02-10 | IPEnval Consultant Inc. | Semiconductor device |
| US9030025B2 (en) | 2013-03-15 | 2015-05-12 | IPEnval Consultant Inc. | Integrated circuit layout |
| US9547034B2 (en) | 2013-07-03 | 2017-01-17 | Xilinx, Inc. | Monolithic integrated circuit die having modular die regions stitched together |
| US10610512B2 (en) | 2014-06-26 | 2020-04-07 | Island Breeze Systems Ca, Llc | MDI related products and methods of use |
| US10713406B2 (en) * | 2015-11-30 | 2020-07-14 | The Regents Of The University Of California | Multi-die IC layout methods with awareness of mix and match die integration |
| CN105866665B (zh) * | 2016-03-31 | 2019-04-05 | 复旦大学 | 面向高性能SoC FPGA的功能遍历测试方法 |
| US10497677B1 (en) | 2017-02-09 | 2019-12-03 | Xilinx, Inc. | ESD protection in a stacked integrated circuit assembly |
| US10671792B2 (en) * | 2018-07-29 | 2020-06-02 | International Business Machines Corporation | Identifying and resolving issues with plated through vias in voltage divider regions |
| US10700041B2 (en) * | 2018-09-21 | 2020-06-30 | Facebook Technologies, Llc | Stacking of three-dimensional circuits including through-silicon-vias |
| US11114429B2 (en) | 2019-04-23 | 2021-09-07 | Xilinx, Inc. | Integrated circuit device with electrostatic discharge (ESD) protection |
| JP7462269B2 (ja) | 2020-05-19 | 2024-04-05 | パナソニックIpマネジメント株式会社 | 半導体装置及び半導体装置の製造方法 |
| JP7434118B2 (ja) * | 2020-09-11 | 2024-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| CN116344441B (zh) * | 2023-02-03 | 2024-01-12 | 深圳华芯星半导体有限公司 | 一种芯片封装方法及计算机可读存储介质 |
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| CN101794327A (zh) * | 2009-01-30 | 2010-08-04 | 新思科技有限公司 | 执行三维集成电路设计的rlc建模和提取的方法和设备 |
| CN102074544A (zh) * | 2009-10-22 | 2011-05-25 | 台湾积体电路制造股份有限公司 | 具有虚拟结构的硅通孔及其形成方法 |
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| JP2004342724A (ja) * | 2003-05-14 | 2004-12-02 | Sony Corp | 半導体装置およびその製造方法 |
| US6913990B2 (en) * | 2003-07-28 | 2005-07-05 | Infineon Technologies Ag | Method of forming isolation dummy fill structures |
| US7763965B2 (en) | 2007-09-25 | 2010-07-27 | International Business Machines Corporation | Stress relief structures for silicon interposers |
| JP5099780B2 (ja) * | 2008-01-18 | 2012-12-19 | 独立行政法人産業技術総合研究所 | 3次元集積回路 |
| US8082537B1 (en) | 2009-01-28 | 2011-12-20 | Xilinx, Inc. | Method and apparatus for implementing spatially programmable through die vias in an integrated circuit |
| US20100257495A1 (en) * | 2009-04-06 | 2010-10-07 | Chan-Liang Wu | 3D-IC Verification Method |
| US8362622B2 (en) | 2009-04-24 | 2013-01-29 | Synopsys, Inc. | Method and apparatus for placing transistors in proximity to through-silicon vias |
| US9343463B2 (en) | 2009-09-29 | 2016-05-17 | Headway Technologies, Inc. | Method of high density memory fabrication |
| US8264065B2 (en) | 2009-10-23 | 2012-09-11 | Synopsys, Inc. | ESD/antenna diodes for through-silicon vias |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101794327A (zh) * | 2009-01-30 | 2010-08-04 | 新思科技有限公司 | 执行三维集成电路设计的rlc建模和提取的方法和设备 |
| CN102074544A (zh) * | 2009-10-22 | 2011-05-25 | 台湾积体电路制造股份有限公司 | 具有虚拟结构的硅通孔及其形成方法 |
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| EP2724371A1 (en) | 2014-04-30 |
| CN103688355A (zh) | 2014-03-26 |
| JP2014523645A (ja) | 2014-09-11 |
| JP6009556B2 (ja) | 2016-10-19 |
| WO2013002844A1 (en) | 2013-01-03 |
| US20120331435A1 (en) | 2012-12-27 |
| KR20140039227A (ko) | 2014-04-01 |
| EP2724371B1 (en) | 2017-08-30 |
| KR101770877B1 (ko) | 2017-08-23 |
| US8560982B2 (en) | 2013-10-15 |
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