CN103594350A - 一种减小界面层生长的方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 25
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 23
- 239000010703 silicon Substances 0.000 claims abstract description 23
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 45
- 238000000137 annealing Methods 0.000 claims description 13
- 239000011241 protective layer Substances 0.000 claims description 12
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 241000931526 Acer campestre Species 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000002513 implantation Methods 0.000 claims description 5
- 230000003287 optical effect Effects 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 150000002500 ions Chemical class 0.000 abstract 1
- 230000008569 process Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 238000005224 laser annealing Methods 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 239000012190 activator Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
本发明公开了一种减小界面层生长的方法,依次包括如下步骤:(1)在硅衬底上生长SiO2界面层;(2)在SiO2界面层上沉积高k栅介质层;(3)在高k栅介质层上沉积金属栅电极;(4)在金属栅电极上沉积一层氮化硅保护层;(5)离子注入形成源区和漏区;(6)对硅衬底进行预加热;(7)采用激光脉冲对源区和漏区进行退火;(8)去除氮化硅保护层,完成器件的制作。
Description
技术领域
本发明涉及半导体制造技术领域,尤其涉及一种减小界面层生长的方法。
背景技术
纳米集成电路以“高k/金属栅”技术为核心,对于具有高k/金属栅结构的MOS器件,足够小的等效氧化层厚度(EOT)是保障MOS器件微缩及性能提高的必要条件。一般情况下,在高k栅介质层和硅衬底之间会有一层厚度在0.5~1纳米的SiO2界面层。为提高高k栅介质与硅衬底间界面的质量,SiO2界面层通常采用高温热氧化的方法生长。此外,为满足纳米技术MOS器件尺寸按比例缩小的要求,我们希望介电常数较低的SiO2界面层的厚度要尽量的小,以达到降低整个栅结构EOT的目的。
在MOS半导体器件的制造过程中,为使器件的源漏杂质激活,需要在进行高温退火工艺,退火温度高达900~1050℃左右。在此过程中,退火环境中的氧会由于高温作用扩散进具有高k/金属栅结构的MOS器件中,与硅衬底反应生成SiO2,从而在硅衬底与栅介质形成厚度变厚的SiO2界面层。该界面层会导致MOS器件栅结构EOT的增加,并最终影响到器件的整体性能。
此外,采用高温退火的方式还不利于生长效率的提高,因为为了达到高温退火的温度,必须在高温炉中控制温度缓慢的上升,而且退火之后,还必须等待高温的下降。这个温度上升和下降的过程需要耗费大量的时间。
发明内容
本发明针对上述问题,提出了一种采用激光退火的工艺来使得器件的源漏杂质激活,同时又不会在硅衬底和栅介质之间生成SiO2界面层;这样就既能达到退火激活杂质的目的,由能减小界面层的厚度增加。
本发明提出的减小界面层生长的方法,依次包括如下步骤:
(1)在硅衬底上生长SiO2界面层;
(2)在SiO2界面层上沉积高k栅介质层;
(3)在高k栅介质层上沉积金属栅电极;
(4)在金属栅电极上沉积一层氮化硅保护层;
(5)离子注入形成源区和漏区;
(6)对硅衬底进行预加热;
(7)采用激光脉冲对源区和漏区进行退火;
(8)去除氮化硅保护层,完成器件的制作。
其中,生成的SiO2界面层厚度为0.3-0.9纳米;
其中,高k栅介质为Al2O3、ZrO2、La2O3、Ta2O5或HfO2。
其中,对硅衬底的预加热温度为330-500摄氏度;
其中,激光脉冲能量密度阈值为400mJ/cm2,退火时间为40-75纳米,激光波长介于193-308nm之间。
具体实施方式
实施例1
本发明提出的减小界面层生长的方法,依次包括如下步骤:
(1)在硅衬底上生长SiO2界面层;
(2)在SiO2界面层上沉积高k栅介质层;
(3)在高k栅介质层上沉积金属栅电极;
(4)在金属栅电极上沉积一层氮化硅保护层;
(5)离子注入形成源区和漏区;
(6)对硅衬底进行预加热;
(7)采用激光脉冲对源区和漏区进行退火;
(8)去除氮化硅保护层,完成器件的制作。
其中,生成的SiO2界面层厚度为0.3-0.9纳米;
其中,高k栅介质为Al2O3、ZrO2、La2O3、Ta2O5或HfO2。
其中,对硅衬底的预加热温度为330-500摄氏度;
其中,激光脉冲能量密度阈值为400mJ/cm2,退火时间为40-75纳米,激光波长介于193-308nm之间。
本发明提供的减小界面层生长的方法,通过氮化硅保护层对金属栅电极和SiO2界面层的保护,使得对衬底预加热时,由于氮化硅保护层的阻挡作用,减小了氧进入到SiO2界面层与硅衬底之间,因而SiO2界面层的厚度几乎没有增加。而且最重要的是,在对源区和漏区进行退火杂质激活的过程中,由于采用时间非常短暂的激光退火工艺,因此退火时间非常短,同时激光退火时还先对衬底进行了预加热,因而无需很大的激光退火能量即可完成退火。
实施例2
本发明提出的减小界面层生长的方法,依次包括如下步骤:
(1)在硅衬底上生长SiO2界面层;
(2)在SiO2界面层上沉积高k栅介质层;
(3)在高k栅介质层上沉积金属栅电极;
(4)在金属栅电极上沉积一层氮化硅保护层;
(5)离子注入形成源区和漏区;
(6)对硅衬底进行预加热;
(7)采用激光脉冲对源区和漏区进行退火;
(8)去除氮化硅保护层,完成器件的制作。
其中,生成的SiO2界面层厚度为0.5纳米;
其中,高k栅介质为Al2O3;
其中,对硅衬底的预加热温度为380摄氏度;
其中,激光脉冲能量密度阈值为400mJ/cm2,退火时间为50纳米,激光波长介于193-308nm之间。
实施例3
本发明提出的减小界面层生长的方法,依次包括如下步骤:
(1)在硅衬底上生长SiO2界面层;
(2)在SiO2界面层上沉积高k栅介质层;
(3)在高k栅介质层上沉积金属栅电极;
(4)在金属栅电极上沉积一层氮化硅保护层;
(5)离子注入形成源区和漏区;
(6)对硅衬底进行预加热;
(7)采用激光脉冲对源区和漏区进行退火;
(8)去除氮化硅保护层,完成器件的制作。
其中,生成的SiO2界面层厚度为0.8纳米;
其中,高k栅介质为La2O3或HfO2。
其中,对硅衬底的预加热温度为400摄氏度;
其中,激光脉冲能量密度阈值为400mJ/cm2,退火时间为60纳米,激光波长介于193-308nm之间。
至此已对本发明做了详细的说明,但前文的描述的实施例仅仅只是本发明的优选实施例,其并非用于限定本发明。本领域技术人员在不脱离本发明精神的前提下,可对本发明做任何的修改,而本发明的保护范围由所附的权利要求来限定。
Claims (2)
1.一种减小界面层生长的方法,依次包括如下步骤:
(1)在硅衬底上生长SiO2界面层;
(2)在SiO2界面层上沉积高k栅介质层;
(3)在高k栅介质层上沉积金属栅电极;
(4)在金属栅电极上沉积一层氮化硅保护层;
(5)离子注入形成源区和漏区;
(6)对硅衬底进行预加热;
(7)采用激光脉冲对源区和漏区进行退火;
(8)去除氮化硅保护层。
2.如权利要求1所述的方法,其特征在于:
其中,生成的SiO2界面层厚度为0.3-0.9纳米;高k栅介质为Al2O3、ZrO2、La2O3、Ta2O5或HfO2;对硅衬底的预加热温度为330-500摄氏度;激光脉冲能量密度阈值为400mJ/cm2,退火时间为40-75纳米,激光波长介于193-308nm之间。
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US20060088969A1 (en) * | 2004-10-25 | 2006-04-27 | Texas Instruments Incorporated | Solid phase epitaxy recrystallization by laser annealing |
US20090001371A1 (en) * | 2007-06-29 | 2009-01-01 | Anthony Mowry | Blocking pre-amorphization of a gate electrode of a transistor |
CN101930979A (zh) * | 2009-06-26 | 2010-12-29 | 中国科学院微电子研究所 | 控制器件阈值电压的CMOSFETs结构及其制造方法 |
CN102034684A (zh) * | 2010-10-18 | 2011-04-27 | 清华大学 | 硅片激光退火中多梯度温度场的装置和方法 |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US20060088969A1 (en) * | 2004-10-25 | 2006-04-27 | Texas Instruments Incorporated | Solid phase epitaxy recrystallization by laser annealing |
US20090001371A1 (en) * | 2007-06-29 | 2009-01-01 | Anthony Mowry | Blocking pre-amorphization of a gate electrode of a transistor |
CN101930979A (zh) * | 2009-06-26 | 2010-12-29 | 中国科学院微电子研究所 | 控制器件阈值电压的CMOSFETs结构及其制造方法 |
CN102034684A (zh) * | 2010-10-18 | 2011-04-27 | 清华大学 | 硅片激光退火中多梯度温度场的装置和方法 |
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