CN103578528A - 五晶体管sram单元 - Google Patents
五晶体管sram单元 Download PDFInfo
- Publication number
- CN103578528A CN103578528A CN201310326123.XA CN201310326123A CN103578528A CN 103578528 A CN103578528 A CN 103578528A CN 201310326123 A CN201310326123 A CN 201310326123A CN 103578528 A CN103578528 A CN 103578528A
- Authority
- CN
- China
- Prior art keywords
- transistor
- channel transistor
- phase inverter
- voltage
- port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 22
- 230000008878 coupling Effects 0.000 claims description 6
- 238000010168 coupling process Methods 0.000 claims description 6
- 238000005859 coupling reaction Methods 0.000 claims description 6
- 230000004044 response Effects 0.000 claims description 5
- 230000005669 field effect Effects 0.000 claims description 3
- 230000003068 static effect Effects 0.000 abstract description 7
- 230000000295 complement effect Effects 0.000 abstract description 4
- 230000009467 reduction Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 12
- 238000003860 storage Methods 0.000 description 12
- 230000008859 change Effects 0.000 description 9
- 230000007704 transition Effects 0.000 description 9
- 230000006870 function Effects 0.000 description 8
- 230000009466 transformation Effects 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 6
- 230000007423 decrease Effects 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013016 damping Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
- G11C11/4125—Cells incorporating circuit means for protecting against loss of information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/561,469 | 2012-07-30 | ||
US13/561,469 US9418727B2 (en) | 2012-07-30 | 2012-07-30 | Five transistor SRAM cell |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103578528A true CN103578528A (zh) | 2014-02-12 |
CN103578528B CN103578528B (zh) | 2016-12-28 |
Family
ID=48771257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310326123.XA Expired - Fee Related CN103578528B (zh) | 2012-07-30 | 2013-07-30 | 五晶体管sram单元 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9418727B2 (zh) |
EP (1) | EP2693439B1 (zh) |
KR (1) | KR101579958B1 (zh) |
CN (1) | CN103578528B (zh) |
TW (1) | TWI534802B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109684665A (zh) * | 2018-11-21 | 2019-04-26 | 浙江大学城市学院 | 基于FinFET的三值SRAM单元电路及控制方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110103137A1 (en) * | 2008-05-13 | 2011-05-05 | Silicon Basis Ltd | Source controlled sram |
TW201118873A (en) * | 2009-11-17 | 2011-06-01 | Hsiuping Inst Technology | Single port SRAM having a lower power voltage in writing operation |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894434A (en) | 1995-12-22 | 1999-04-13 | Texas Instruments Incorporated | MOS static memory array |
US5877976A (en) * | 1997-10-28 | 1999-03-02 | International Business Machines Corporation | Memory system having a vertical bitline topology and method therefor |
US6044010A (en) | 1998-10-05 | 2000-03-28 | National Semiconductor Corporation | Five transistor SRAM cell |
US6205049B1 (en) | 1999-08-26 | 2001-03-20 | Integrated Device Technology, Inc. | Five-transistor SRAM cell |
JP3906166B2 (ja) | 2003-02-25 | 2007-04-18 | 株式会社東芝 | 半導体記憶装置 |
-
2012
- 2012-07-30 US US13/561,469 patent/US9418727B2/en active Active
-
2013
- 2013-07-09 EP EP13003473.9A patent/EP2693439B1/en active Active
- 2013-07-11 TW TW102124884A patent/TWI534802B/zh not_active IP Right Cessation
- 2013-07-29 KR KR1020130089420A patent/KR101579958B1/ko active IP Right Grant
- 2013-07-30 CN CN201310326123.XA patent/CN103578528B/zh not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110103137A1 (en) * | 2008-05-13 | 2011-05-05 | Silicon Basis Ltd | Source controlled sram |
TW201118873A (en) * | 2009-11-17 | 2011-06-01 | Hsiuping Inst Technology | Single port SRAM having a lower power voltage in writing operation |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109684665A (zh) * | 2018-11-21 | 2019-04-26 | 浙江大学城市学院 | 基于FinFET的三值SRAM单元电路及控制方法 |
CN109684665B (zh) * | 2018-11-21 | 2024-02-02 | 浙江大学城市学院 | 基于FinFET的三值SRAM单元电路及控制方法 |
Also Published As
Publication number | Publication date |
---|---|
TW201419278A (zh) | 2014-05-16 |
CN103578528B (zh) | 2016-12-28 |
TWI534802B (zh) | 2016-05-21 |
US9418727B2 (en) | 2016-08-16 |
EP2693439A1 (en) | 2014-02-05 |
KR20140016187A (ko) | 2014-02-07 |
US20140029333A1 (en) | 2014-01-30 |
KR101579958B1 (ko) | 2015-12-23 |
EP2693439B1 (en) | 2019-06-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7101216B2 (ja) | Feram-dramハイブリッドメモリ | |
KR100824798B1 (ko) | 에지 서브 어레이에 전체 데이터 패턴을 기입할 수 있는 오픈 비트 라인 구조를 가지는 메모리 코어, 이를 구비한 반도체 메모리 장치, 및 에지 서브 어레이 테스트 방법 | |
US20140198560A1 (en) | Memory cell and memory device having the same | |
US9019782B2 (en) | Dual rail memory architecture | |
US8817562B2 (en) | Devices and methods for controlling memory cell pre-charge operations | |
KR20150063740A (ko) | 반도체 메모리 장치의 비트라인 센싱 방법 | |
US7889576B2 (en) | Semiconductor storage device | |
US8988920B2 (en) | Semiconductor memory device | |
CN115223609A (zh) | 存储器时钟驱动器、存储器器件及其操作方法 | |
US20090213641A1 (en) | Memory with active mode back-bias voltage control and method of operating same | |
US9013914B2 (en) | Semiconductor memory device and method for controlling semiconductor memory device | |
JP2014078305A (ja) | 半導体記憶装置 | |
CN101840728B (zh) | 一种双端sram单元 | |
US8400821B2 (en) | Semiconductor storage device | |
CN103578528A (zh) | 五晶体管sram单元 | |
TWI699764B (zh) | 記憶體寫入裝置及方法 | |
US20200227102A1 (en) | Word line decoder memory architecture | |
KR20220056022A (ko) | 정적 램 메모리 장치 및 이의 동작 방법 | |
CN112786090B (zh) | 储存器写入装置及方法 | |
US9324412B2 (en) | Memory architecture | |
KR100687877B1 (ko) | 액티브 코아전압 드라이버 제어회로 | |
KR102020553B1 (ko) | 반도체 메모리 장치의 센스앰프 소스 노드 제어회로 및 그에 따른 센스앰프 소스 노드 제어방법 | |
TW201928971A (zh) | 記憶體裝置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 1191724 Country of ref document: HK |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20170309 Address after: Singapore Singapore Patentee after: Avago Technologies Fiber IP Singapore Pte. Ltd. Address before: American California Patentee before: Zyray Wireless Inc. |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20181019 Address after: Singapore Singapore Patentee after: Annwa high tech Limited by Share Ltd Address before: Singapore Singapore Patentee before: Avago Technologies Fiber IP Singapore Pte. Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20161228 Termination date: 20180730 |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: WD Ref document number: 1191724 Country of ref document: HK |