CN103491714B

CN103491714B - Circuit board line processing method

Info

Publication number: CN103491714B
Application number: CN201210190623.0A
Authority: CN
Inventors: 郭长峰; 冷科; 丰捷; 廖辉
Original assignee: Shennan Circuit Co Ltd
Current assignee: Shennan Circuit Co Ltd
Priority date: 2012-06-11
Filing date: 2012-06-11
Publication date: 2016-08-03
Anticipated expiration: 2032-06-11
Also published as: CN103491714A

Abstract

The embodiment of the invention discloses circuit board line processing method.Wherein, a kind of circuit board line processing method includes: use egative film to be exposed the first conducting medium layer region after wiring board pad pasting processing so that on the first conducting medium layer region of wiring board to be etched go out circuit obtain etching corresponding to the first thickness and compensate width；Use egative film to be exposed the second conducting medium layer region after wiring board pad pasting processing, make on the second conducting medium layer region of wiring board to be etched go out circuit obtain etching corresponding to the 3rd thickness and compensate width；Wiring board after all exposing the first conducting medium layer region and the second conducting medium layer region carries out development treatment, and is etched the wiring board after development treatment processing, to form circuit at the first conducting medium layer region and the second conducting medium layer region.Embodiment of the present invention scheme is conducive to simplifying the circuit work flow of the wiring board that need to process different-thickness circuit, shortens work flow, reduces cost and scrappage.

Description

Circuit board circuit processing method

Technical Field

The invention relates to the technical field of circuit board processing, in particular to a circuit board circuit processing method.

Background

The circuit board with inconsistent copper thickness is one of the common Printed Circuit Boards (PCBs), such as one of which is called a male and female circuit board, where the difference in copper thickness on both sides of the male and female circuit board is typically above 1 Ounce (OZ). The surface of the male-female circuit board with the thicker copper layer can be called a male surface, and the surface with the thinner copper layer can be called a female surface. At present, the conventional method for processing the circuits of the cathode-anode circuit board generally processes the circuits on both sides of the cathode-anode circuit board by a single-side multiple etching method. Practice shows that the single-sided multiple etching leads to a longer processing flow, high cost and relatively high rejection rate.

Disclosure of Invention

The embodiment of the invention provides a circuit board circuit processing method, aiming at simplifying the circuit processing flow of a circuit board which needs to process circuits with different thicknesses, shortening the processing flow and reducing the cost and the rejection rate.

In one aspect, an embodiment of the present invention provides a circuit board processing method, where a first conductive dielectric layer region on a circuit board has a first thickness, a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the method including:

pasting a film on a first conductive medium layer region of the circuit board;

exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the first thickness;

pasting a film on a second conductive medium layer region of the circuit board;

exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness;

and developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed, and etching the circuit board after the development treatment so as to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

Optionally, if the first conductive dielectric layer region of the circuit board is further subjected to etching surface mounting, the exposing process is performed on the first conductive dielectric layer region after the film is applied to the circuit board by using a negative plate, so that the circuit to be etched on the first conductive dielectric layer region of the circuit board obtains an etching compensation width corresponding to the first thickness, including: and exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area of the circuit board is pasted on the surface of the circuit board, and the etching compensation width corresponding to the first thickness is obtained.

Optionally, if the second conductive dielectric layer region of the circuit board is further subjected to etching surface mounting, the exposing process is performed on the second conductive dielectric layer region after the film is applied to the circuit board by using the negative film, so that the circuit to be etched on the second conductive dielectric layer region of the circuit board obtains an etching compensation width corresponding to the third thickness, including: and exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the third thickness, and the surface to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a fourth thickness, wherein the etching compensation width corresponding to the fourth thickness is greater than the etching compensation width corresponding to the first thickness, and the etching compensation width corresponding to the fourth thickness is smaller than the etching compensation width corresponding to the third thickness.

Optionally, the difference between the fourth thickness and the first thickness is less than or equal to 0.35 ounces, and the difference between the fourth thickness and the first thickness is greater than or equal to 0.25 ounces.

Optionally, the difference between the first thickness and the second thickness is less than or equal to 4 ounces.

Optionally, the difference between the third thickness and the first thickness is less than or equal to 0.6 ounces, and the difference between the third thickness and the first thickness is greater than or equal to 0.4 ounces.

Optionally, the first conductive medium layer region is a continuous conductive medium layer region, the first conductive medium layer region is located on the first surface of the circuit board, the second conductive medium layer region is a continuous conductive medium layer region, and the first conductive medium layer region is located on the first surface or the second surface of the circuit board; or the second conductive medium layer region comprises a plurality of discrete conductive medium layer sub-regions, and the plurality of discrete conductive medium layer sub-regions included in the second conductive medium layer region are positioned on the same surface or different surfaces of the circuit board.

Optionally, the second conductive medium layer region is a continuous conductive medium layer region, and the first conductive medium layer region includes a plurality of discrete conductive medium layer sub-regions, where the plurality of discrete conductive medium layer sub-regions included in the first conductive medium layer region are located on the same surface or different surfaces of the circuit board.

In another aspect of the embodiments of the present invention, another method for processing a circuit of a circuit board is further provided, where a first conductive dielectric layer region on the circuit board has a first thickness, a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, and the method includes:

pasting a film on a first conductive medium layer region of the circuit board;

carrying out first development treatment on the circuit board subjected to the exposure of the first conductive medium layer region;

pasting a film on the second conductive medium layer area of the circuit board after the first development treatment;

carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer region;

and etching the circuit board subjected to the second development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

In another aspect, an embodiment of the present invention provides a method for processing a circuit board, where a first conductive dielectric layer region on the circuit board has a first thickness, and a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the method including:

pasting a film on a second conductive medium layer region of the circuit board;

pasting a film on the first conductive medium layer area of the circuit board subjected to the second development treatment;

and etching the circuit board subjected to the first development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

As can be seen from the above, in the circuit processing scheme of the circuit board provided in the embodiment of the present invention, if the first conductive dielectric layer region on the circuit board has a first thickness and the second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the first conductive dielectric layer region and the second conductive dielectric layer region of the circuit board are pasted with a film; exposing a first conductive medium layer area and a second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness, and a circuit to be etched on the second conductive medium layer area obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness; and developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed, and etching the circuit board after the development treatment so as to form circuits in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is favorably shortened, and the cost and the rejection rate are reduced.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1-a is a schematic flow chart of a circuit board processing method according to an embodiment of the present invention;

FIG. 1-b is a schematic diagram of a circuit board circuit according to an embodiment of the present invention;

FIG. 1-c is a schematic diagram of a circuit board circuit according to an embodiment of the present invention;

FIG. 2 is a schematic flow chart of another circuit board circuit processing method according to an embodiment of the present invention;

fig. 3 is a schematic flow chart of another circuit board circuit processing method according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The following examples are provided to explain the details of the present invention.

The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In one embodiment of the present invention, a method for processing a circuit of a circuit board, the method includes: pasting a film on the first conductive medium layer area of the circuit board; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a first thickness; pasting a film on a second conductive medium layer area of the circuit board; exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness; and developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed, and etching the circuit board after the development treatment so as to form circuits in the first conductive medium layer area and the second conductive medium layer area.

Referring to fig. 1-a, a method for processing a circuit board according to an embodiment of the present invention may include the following steps:

101, pasting a film on a first conductive medium layer area of the circuit board; and exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the first thickness.

The first conductive medium layer region of the circuit board has a first thickness (namely, the conductive medium layer of the first conductive medium layer region has the first thickness), and the second conductive medium layer region of the circuit board has a second thickness (namely, the conductive medium layer of the second conductive medium layer region has the second thickness), wherein the first thickness is larger than the second thickness. The conductive dielectric layer in the embodiment of the present invention is, for example, a copper layer, an alloy conductive dielectric layer, or other conductive dielectric layers that have a conductive function and can be used for manufacturing a circuit and/or a surface mount. In some embodiments of the invention, the difference between the first thickness and the second thickness is, for example, less than or equal to 4 ounces. Of course, other ranges of differences between the first thickness and the second thickness are possible.

In practical application, because the non-circuit part without the protection of the anti-etching film on the conductive medium layer of the circuit board can be etched during circuit etching, and the edge of the circuit part with the protection of the anti-etching film on the conductive medium layer of the circuit board can also be etched to a certain extent, in order to enable the circuit width of the circuit pattern finally etched to meet the tolerance requirement, a negative film design can be used for carrying out certain etching compensation on the circuits to be etched on the first conductive medium layer area and the second conductive medium layer area of the circuit board, so that the circuits to be etched on the first conductive medium layer area and the second conductive medium layer area of the circuit board respectively obtain certain etching compensation widths, and thus, the circuit pattern with the circuit width meeting the tolerance requirement can be conveniently etched during subsequent circuit etching.

The conductive dielectric layers with different thicknesses correspond to different etching compensation widths, generally speaking, the thicker the conductive dielectric layer, the larger the etching compensation width corresponding to the conductive dielectric layer, and the circuit and the surface patch correspond to different etching compensation widths respectively under the same thickness. For better understanding of the implementation, the etching compensation widths corresponding to the lines and the surface pastes on the conductive dielectric layer with several thicknesses are listed in table 1, wherein the thickness of the conductive dielectric layer is ounces and the etching compensation width is mil in table 1.

TABLE 1

As can be seen from table 1, if the thickness of the conductive dielectric layer is 1 ounce, the etching compensation width of the corresponding line is 0.8mil, and the etching compensation width of the surface patch is 2mil, and if the thickness of the conductive dielectric layer is 2 ounces, the etching compensation width of the corresponding line is 1.4mil, and the etching compensation width of the surface patch is 2.5mil, and so on. It should be noted that the etching compensation widths corresponding to different thicknesses illustrated in table 1 are only examples, and may be adjusted according to specific scenarios in practical applications.

102, pasting a film on a second conductive medium layer area of the circuit board; exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness; and the etching compensation width corresponding to the third thickness is greater than that corresponding to the first thickness.

In some embodiments of the present invention, the first conductive medium layer region may be a continuous conductive medium layer region, the first conductive medium layer region is located on the first surface of the circuit board, and the second conductive medium layer region is also a continuous conductive medium layer region, the second conductive medium layer region is located on the first surface or the second surface of the circuit board;

in other embodiments of the present invention, the first conductive medium layer region may be a continuous conductive medium layer region, the first conductive medium layer region is located on the first surface of the circuit board, and the second conductive medium layer region may include a plurality of discrete conductive medium layer sub-regions, and the plurality of discrete conductive medium layer sub-regions included in the second conductive medium layer region are located on the same surface or different surfaces of the circuit board.

It will be appreciated that although there may be multiple regions of conductive medium of different thicknesses on a surface of a circuit board, and a region of conductive medium of the same thickness may also include multiple discrete sub-regions of conductive medium, the combination of the multiple regions of conductive medium on a surface will generally form a continuous conductive medium on the surface.

In other embodiments of the present invention, the second conductive medium layer region is a continuous conductive medium layer region, and the first conductive medium layer region includes a plurality of discrete conductive medium layer sub-regions, wherein the plurality of discrete conductive medium layer sub-regions included in the first conductive medium layer region are located on the same surface or different surfaces of the circuit board.

It is understood that, in this embodiment, there is no necessarily any order between step 101 and step 102, and step 102 may be executed later than step 101, or may be executed before step 101, or may be executed synchronously with step 101 or interspersed with step 101. For example, a first conductive medium layer region and a second conductive medium layer region of a circuit board may be first filmed, then the first conductive medium layer region after the filming of the circuit board may be exposed by using a negative film, and then the second conductive medium layer region after the filming of the circuit board may be exposed by using a negative film. Other execution order modes are not illustrated here.

In some embodiments of the invention, the difference between the third thickness and the first thickness is, for example, less than or equal to 0.6 ounces, and the difference between the third thickness and the first thickness is, for example, greater than or equal to 0.4 ounces. Although other ranges of differences between the third thickness and the first thickness are possible.

And 103, developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed.

It is understood that, for a scene in which the first conductive medium layer region or the second conductive medium layer region includes a plurality of conductive medium layer sub-regions, one or more of the conductive medium layer sub-regions may also be subjected to film pasting, exposure, and development respectively, and the operation sequence of the film pasting, exposure, and development is not limited.

And 104, etching the developed circuit board to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

In some embodiments of the present invention, after the circuits are formed on the first conductive dielectric layer region and the second conductive dielectric layer region of the circuit board, the film removing process may be further performed on these regions, or the film removing process may not be performed, but the etching resistant film on the circuits is retained.

In some embodiments of the present invention, if the first conductive dielectric layer region of the circuit board needs to be etched to have a surface attached, the step of exposing the first conductive dielectric layer region after the film is attached to the circuit board by using a negative film so that the circuit to be etched on the first conductive dielectric layer region of the circuit board obtains an etching compensation width corresponding to the first thickness may include: and exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area of the circuit board and the surface are pasted to obtain the etching compensation width corresponding to the first thickness.

In some embodiments of the present invention, if the etched surface of the second conductive dielectric layer region of the circuit board is to be attached, the step of exposing the second conductive dielectric layer region after the film is attached to the circuit board by using a negative film to enable the circuit to be etched on the second conductive dielectric layer region of the circuit board to obtain an etching compensation width corresponding to a third thickness may include: and exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, and a surface to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a fourth thickness, wherein the etching compensation width corresponding to the fourth thickness is greater than the etching compensation width corresponding to the first thickness, and the etching compensation width corresponding to the fourth thickness is less than the etching compensation width corresponding to the third thickness. In some embodiments of the invention, the difference between the fourth thickness and the first thickness is, for example, less than or equal to 0.35 ounces, and the difference between the fourth thickness and the first thickness is greater than or equal to 0.25 ounces. Of course, other ranges of differences between the fourth thickness and the first thickness are possible.

Referring to fig. 1-b and fig. 1-c, fig. 1-b and fig. 1-c show two processing modes of the circuit board circuit by way of example, wherein fig. 1-b exemplifies that the first conductive dielectric layer region and the second conductive dielectric layer region are located on different surfaces of the circuit board, fig. 1-c exemplifies that the first conductive dielectric layer region and the second conductive dielectric layer region are located on the same surface of the circuit board, and circuit patterns are processed on the negative side and the positive side of the circuit board by means of double-sided film pasting, exposure, development and one-time etching.

As can be seen from the above, in the circuit processing scheme of the circuit board of this embodiment, if the first conductive dielectric layer region on the circuit board has a first thickness and the second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the first conductive dielectric layer region and the second conductive dielectric layer region of the circuit board are filmed; exposing a first conductive medium layer area and a second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness, and a circuit to be etched on the second conductive medium layer area obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness; and developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed, and etching the circuit board after the development treatment so as to form circuits in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

In another embodiment of the method for processing a circuit board of the present invention, a first conductive dielectric layer region on the circuit board has a first thickness, a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the method comprising: pasting a film on a first conductive medium layer area of the circuit board; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board subjected to the exposure of the first conductive medium layer area; pasting a film on a second conductive medium layer area of the circuit board subjected to the first development treatment; exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness; carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area; and etching the circuit board subjected to the second development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

Referring to fig. 2, another method for processing a circuit board according to an embodiment of the present invention may include the following steps:

step 201, pasting a film on the first conductive medium layer region of the circuit board, and performing exposure processing on the first conductive medium layer region after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer region of the circuit board obtains an etching compensation width corresponding to the first thickness.

In practical application, because the non-circuit part without the protection of the anti-etching film on the conductive dielectric layer of the circuit board can be etched during circuit etching, and the edge of the circuit part with the protection of the anti-etching film on the conductive dielectric layer of the circuit board can also be etched to a certain extent, in order that the circuit width of the circuit pattern finally etched meets the tolerance requirement, certain etching compensation can be performed on the circuits to be etched on the first conductive dielectric layer area and the second conductive dielectric layer area of the circuit board through negative film design, so that the circuits to be etched on the first conductive dielectric layer area and the second conductive dielectric layer area of the circuit board respectively obtain certain etching compensation widths, and thus, the circuit pattern with the circuit width meeting the tolerance requirement can be conveniently etched during subsequent circuit etching.

The conductive dielectric layers with different thicknesses correspond to different etching compensation widths, generally speaking, the thicker the conductive dielectric layer, the larger the etching compensation width corresponding to the conductive dielectric layer, and the circuit and the surface patch correspond to different etching compensation widths respectively under the same thickness.

Step 202, performing first development treatment on the circuit board exposed in the first conductive medium layer area;

step 203, pasting a film on the second conductive medium layer region of the circuit board after the first development treatment, and exposing the second conductive medium layer region of the circuit board after the film pasting by using a negative film, so that the circuit to be etched on the second conductive medium layer region of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness.

In some embodiments of the present invention, the first conductive medium layer region may be a continuous conductive medium layer region, the first conductive medium layer region is located on the first surface of the circuit board, and the second conductive medium layer region is also a continuous conductive medium layer region, the first conductive medium layer region is located on the first surface or the second surface of the circuit board;

Step 204, carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area;

step 205, etching the circuit board after the second development process is performed to form a circuit in the first conductive dielectric layer region and the second conductive dielectric layer region.

As can be seen from the above, in the circuit processing scheme of the circuit board of this embodiment, if a first conductive dielectric layer region on the circuit board has a first thickness and a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the first conductive dielectric layer region of the circuit board is firstly filmed; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board after the first conductive medium layer area is exposed; then, a second conductive medium layer area of the circuit board after the first development treatment is pasted with a film, and the second conductive medium layer area after the first development treatment is subjected to exposure treatment by using a negative film, so that a circuit to be etched on the second conductive medium layer area obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness; and carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area, and carrying out etching treatment on the circuit board subjected to the second development treatment so as to form a circuit in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

In another embodiment of the method for processing a circuit board of the present invention, a first conductive dielectric layer region on the circuit board has a first thickness, a second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the method comprising: pasting a film on a second conductive medium layer area of the circuit board; exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness; carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area; pasting a film on the first conductive medium layer area of the circuit board subjected to the second development treatment; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board after the first conductive medium layer area is exposed; and etching the circuit board subjected to the first development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

Referring to fig. 3, another circuit board processing method provided by the embodiment of the present invention may include the following steps:

step 301, pasting a film on a second conductive medium layer area of the circuit board; exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness;

The conductive dielectric layers with different thicknesses correspond to different etching compensation widths, the thicker the conductive dielectric layer, the larger the etching compensation width corresponding to the conductive dielectric layer with the thicker the conductive dielectric layer, and the circuit and the surface patch respectively correspond to different etching compensation widths under the same thickness.

Step 302, performing second development treatment on the circuit board after the second conductive medium layer area is exposed;

step 303, pasting a film on the first conductive medium layer region of the circuit board subjected to the second development treatment, and exposing the first conductive medium layer region subjected to film pasting of the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer region of the circuit board obtains an etching compensation width corresponding to the first thickness;

Step 304, performing a first development treatment on the circuit board after the first conductive medium layer area is exposed;

step 305, etching the circuit board after the first development treatment is performed, so as to form a circuit in the first conductive medium layer area and the second conductive medium layer area.

As can be seen from the above, in the circuit processing scheme of the circuit board of this embodiment, if the first conductive dielectric layer region on the circuit board has the first thickness, and the second conductive dielectric layer region on the circuit board has the second thickness, and the first thickness is greater than the second thickness, the second conductive dielectric layer region of the circuit board is firstly subjected to film pasting, and the second conductive dielectric layer region subjected to film pasting of the circuit board is subjected to exposure processing by using a negative, so that the circuit to be etched on the second conductive dielectric layer region obtains the etching compensation width corresponding to the third thickness, where the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness; carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area; then, pasting a film on the first conductive medium layer area of the circuit board subjected to the second development treatment; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board after the first conductive medium layer area is exposed; and etching the circuit board after the first development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In summary, in the circuit board circuit processing scheme provided in the embodiment of the present invention, if the first conductive dielectric layer region on the circuit board has a first thickness and the second conductive dielectric layer region on the circuit board has a second thickness, and the first thickness is greater than the second thickness, the first conductive dielectric layer region and the second conductive dielectric layer region of the circuit board are pasted with a film; exposing a first conductive medium layer area and a second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness, and a circuit to be etched on the second conductive medium layer area obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness; and developing the circuit board after the first conductive medium layer area and the second conductive medium layer area are exposed, and etching the circuit board after the development treatment so as to form circuits in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

In addition, in another circuit processing scheme of the circuit board provided in the embodiment of the present invention, if a first conductive dielectric layer region on the circuit board has a first thickness and a second conductive dielectric layer region on the circuit board has a second thickness, wherein the first thickness is greater than the second thickness, the first conductive dielectric layer region of the circuit board may be firstly filmed; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board after the first conductive medium layer area is exposed; then, a second conductive medium layer area of the circuit board after the first development treatment is pasted with a film, and the second conductive medium layer area after the first development treatment is subjected to exposure treatment by using a negative film, so that a circuit to be etched on the second conductive medium layer area obtains an etching compensation width corresponding to a third thickness, wherein the etching compensation width corresponding to the third thickness is larger than the etching compensation width corresponding to the first thickness; and carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area, and carrying out etching treatment on the circuit board subjected to the second development treatment so as to form a circuit in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

In addition, in another circuit processing scheme of the circuit board provided in the embodiment of the present invention, if a first conductive dielectric layer region on the circuit board has a first thickness and a second conductive dielectric layer region on the circuit board has a second thickness, where the first thickness is greater than the second thickness, the second conductive dielectric layer region of the circuit board may be first subjected to film pasting, and a negative is used to perform exposure processing on the second conductive dielectric layer region subjected to film pasting of the circuit board, so that a circuit to be etched on the second conductive dielectric layer region obtains an etching compensation width corresponding to a third thickness, where the etching compensation width corresponding to the third thickness is greater than the etching compensation width corresponding to the first thickness; carrying out second development treatment on the circuit board subjected to the exposure of the second conductive medium layer area; then, pasting a film on the first conductive medium layer area of the circuit board subjected to the second development treatment; exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area obtains an etching compensation width corresponding to a first thickness; carrying out first development treatment on the circuit board after the first conductive medium layer area is exposed; and etching the circuit board after the first development treatment to form a circuit in the first conductive medium layer area and the second conductive medium layer area. Because an unconventional etching compensation mode is adopted, the width for etching compensation of a thinner area of the conductive dielectric layer of the circuit board is larger than the width for etching compensation of a thicker area of the conductive dielectric layer, and then the circuit etching of the circuit board with different thicknesses is completed by one-time etching, so that the processing flow of the circuit board with different thicknesses is simplified, the processing flow is shortened, and the cost and the rejection rate are reduced.

The circuit board circuit processing method provided by the embodiment of the invention is described in detail, a specific example is applied in the description to explain the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A circuit board circuit processing method is characterized in that a first conductive medium layer area on a circuit board has a first thickness, a second conductive medium layer area on the circuit board has a second thickness, and the first thickness is larger than the second thickness, and the method comprises the following steps:

pasting a film on a first conductive medium layer region of the circuit board;

pasting a film on a second conductive medium layer region of the circuit board;

wherein the etching compensation width is the width of the remained sticking film;

2. The method of claim 1,

if the first conductive medium layer area of the circuit board needs to be etched to form a surface paste, the first conductive medium layer area after the film is pasted on the circuit board is exposed by using a negative plate, so that the circuit to be etched on the first conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the first thickness, and the method comprises the following steps: and exposing the first conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that the circuit to be etched on the first conductive medium layer area of the circuit board is pasted on the surface of the circuit board, and the etching compensation width corresponding to the first thickness is obtained.

3. The method according to any one of claims 1 to 2,

if the second conductive medium layer area of the circuit board needs to be etched to form a surface paste, the second conductive medium layer area after the film is pasted on the circuit board is exposed by using the negative film, so that the circuit to be etched on the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the third thickness, and the method comprises the following steps: and exposing the second conductive medium layer area after the film is pasted on the circuit board by using a negative film, so that a circuit to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to the third thickness, and the surface to be etched in the second conductive medium layer area of the circuit board obtains an etching compensation width corresponding to a fourth thickness, wherein the etching compensation width corresponding to the fourth thickness is greater than the etching compensation width corresponding to the first thickness, and the etching compensation width corresponding to the fourth thickness is smaller than the etching compensation width corresponding to the third thickness.

4. The method of claim 3 wherein the difference between the fourth thickness and the first thickness is less than or equal to 0.35 ounces and the difference between the fourth thickness and the first thickness is greater than or equal to 0.25 ounces.

5. The method according to any one of claims 1 to 2 and 4,

the difference between the first thickness and the second thickness is less than or equal to 4 ounces.

6. The method of any one of claims 1-2, 4, wherein the difference between the third thickness and the first thickness is less than or equal to 0.6 ounces, and the difference between the third thickness and the first thickness is greater than or equal to 0.4 ounces.

7. The method according to any one of claims 1 to 2 and 4,

the first conductive medium layer area is a continuous conductive medium layer area, the first conductive medium layer area is positioned on the first surface of the circuit board, the second conductive medium layer area is a continuous conductive medium layer area, and the second conductive medium layer area is positioned on the first surface or the second surface of the circuit board; or the second conductive medium layer region comprises a plurality of discrete conductive medium layer sub-regions, and the plurality of discrete conductive medium layer sub-regions comprised by the second conductive medium layer region are positioned on the same surface or different surfaces of the circuit board;

or,

the second conductive medium layer region is a continuous conductive medium layer region, the first conductive medium layer region comprises a plurality of discrete conductive medium layer sub-regions, and the plurality of discrete conductive medium layer sub-regions included in the first conductive medium layer region are located on the same surface or different surfaces of the circuit board.

8. A circuit board circuit processing method is characterized in that a first conductive medium layer area on a circuit board has a first thickness, a second conductive medium layer area on the circuit board has a second thickness, and the first thickness is larger than the second thickness, and the method comprises the following steps:

pasting a film on a first conductive medium layer region of the circuit board;

9. The method of claim 8 wherein the difference between the third thickness and the first thickness is less than or equal to 0.6 ounces and the difference between the third thickness and the first thickness is greater than or equal to 0.4 ounces.

10. A circuit board circuit processing method is characterized in that a first conductive medium layer area on a circuit board has a first thickness, a second conductive medium layer area on the circuit board has a second thickness, and the first thickness is larger than the second thickness, and the method comprises the following steps:

pasting a film on a second conductive medium layer region of the circuit board;