CN103345291B - Constant current source capable of adjusting positive and negative temperature coefficients and adjustment method thereof - Google Patents

Abstract

The invention discloses a constant current source capable of adjusting positive and negative temperature coefficients and an adjustment method thereof. The constant current source comprises a first constant current source body (A1), a second constant current source body (A2) and a weighted subtraction operational circuit (A3). The temperature coefficient of the first constant current source body (A1) and the temperature coefficient of the second constant current source body (A2) are opposite in positive and negative polarities, an output end of the first constant current source body (A1) and an output end of the second constant current source body (A2) are connected to a minuend input end of the weighted subtraction operational circuit (A3) and a subtrahend input end of the weighted subtraction operational circuit (A3) respectively, and constant currents adjustable in the positive and negative temperature coefficients are outputted through the weighted subtraction operational circuit (A3) by means of adjustment of weighting coefficients of the first constant current source body (A1) and the second constant current source body (A2). The constant current source can conveniently adjust obtained arbitrary positive and negative temperature coefficients.

Description

The constant current source of adjustable Positive and Negative Coefficient Temperature and control method thereof

Technical field

The present invention relates to a kind of constant current source of adjustable Positive and Negative Coefficient Temperature, and the control method of this constant current source.

Background technology

The desirable constant current source of tradition is defined as the electric current not with voltage and temperature variation, and current value has zero-temperature coefficient.

What the start-up circuit in the traditional self-excited push-pull type transducer circuit shown in Fig. 1 adopted is resistive element, namely the first resistance R101 in figure, the starting current flowing through resistance so almost remains unchanged, this scheme can cause self-excited push-pull type transducer to have the difficult and shortcoming of high temperature short circuit easy burn-out of cold-starting, and makes starting current have negative temperature characteristic just can to solve the cold-starting difficulty and the shortcoming of high temperature short circuit easy burn-out brought by temperature.

Number of patent application is 201110200894.5 disclose and a kind ofly replace starting resistance element in self-excited push-pull type transducer with having negative temperature characteristic constant current source, as shown in Fig. 2-1, in order to improve the negative temperature coefficient size of constant current source, in this patented claim, employ not easy of integration and expensive thermistor.

In order to solve thermistor shortcoming not easy of integration, number of patent application is that to have put forward a kind of application in 201310044913.9 stronger, and provide a kind of embodiment circuit that can improve constant current source negative temperature coefficient, solve the problem that traditional negative temperature coefficient constant current source (as shown in Fig. 2-2) temperature coefficient is smaller, but the method improving constant current source negative temperature coefficient size is not unique, and in this patented claim, only relate to the method and embodiment that improve electric current negative temperature coefficient size, do not relate to the method and embodiment that how to improve electric current positive temperature coefficient (PTC) size.

In view of each device in integrated circuit technology all has temperature coefficient, but temperature coefficient is not very large, if so need the larger temperature coefficient characteristics parameter of acquisition just to need could realize obtaining by ad hoc approach the object of specified temp figure parameters.

Summary of the invention

First object of the present invention is to provide a kind of constant current source of adjustable Positive and Negative Coefficient Temperature, the current source of required Positive and Negative Coefficient Temperature arbitrarily just can be obtained by simply calculating proportioning, not only improve the shortcoming that thermistor is not easy of integration, method involved in the present invention not only just can improve the negative temperature coefficient of electric current simultaneously, also can improve the positive temperature coefficient (PTC) of electric current, and the present invention has wide, the practical advantage of applicability simultaneously.

Second object of the present invention is to provide the control method of above-mentioned adjustable Positive and Negative Coefficient Temperature constant current source.

The technical scheme that the present invention realizes above-mentioned first object is:

A constant current source for adjustable Positive and Negative Coefficient Temperature, is characterized in that: described adjustable Positive and Negative Coefficient Temperature constant current source comprises the first constant current source, the second constant current source and weighting subtraction computing circuit; The temperature coefficient of described first constant current source and the second constant current source is on the contrary positive and negative, the output terminal of described first constant current source and the second constant current source is connected respectively to minuend input end and the subtracting input of weighting subtraction computing circuit, described weighting subtraction computing circuit passes through the weighting coefficient of adjustment first constant current source and the second constant current source, exports the steady current that Positive and Negative Coefficient Temperature is adjustable.

As one of the preferred embodiment of the present invention, described first constant current source and the second constant current source are current mirroring circuit, this current mirroring circuit is by a left side, right PMOS, left, right NMOS tube and the first resistance composition, wherein, a described left side, the source electrode of right PMOS is connected and connects power end, grid is connected and is connected to the drain electrode of right PMOS, a described left side, the grid of right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube connects earth terminal, the source electrode of right NMOS tube is connected to earth terminal by the first resistance, described left PMOS is connected with the drain electrode of left NMOS tube, described right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit,

Described weighting subtraction computing circuit is by first, second PMOS and first, second, 3rd, 4th NMOS tube composition, wherein, described first, the source electrode of the second PMOS is connected and connects power end, described first, the source electrode of the second NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the first NMOS tube, described 3rd, the source electrode of the 4th NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, described first PMOS is connected with the drain electrode of the first NMOS tube, described second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of described 4th NMOS tube is as the output terminal of weighting subtraction computing circuit,

The output terminal of described first constant current source is connected to the grid of the second PMOS, and the output terminal of described second constant current source is connected to the grid of the first PMOS; Described first constant current source is positive and negative contrary with the temperature coefficient of the first resistance of the second constant current source; The weighting coefficient of described first constant current source is flow through described second PMOS and the ratio of electric current of the first resistance flowing through the first constant current source, and the weighting coefficient of described second constant current source is then for flowing through described second NMOS tube and the ratio of electric current of the first resistance flowing through the second constant current source.

In one of upper preferred implementation, first resistance of described first constant current source is N trap diffusion resistance, and the first resistance of described second constant current source is polysilicon resistance, or, described first constant current source first resistance is polysilicon resistance, and the first resistance of described second constant current source is N trap diffusion resistance.

As the preferred embodiment of the present invention two, described first constant current source and the second constant current source are constant-current source circuit, this constant-current source circuit is by the first operational amplifier, 3rd, four, five, six PMOS, 5th NMOS tube and the second resistance composition, wherein, the in-phase input end access reference voltage of described first operational amplifier, inverting input is connected with the source electrode of the 5th NMOS tube, output terminal is connected to the grid of the 5th NMOS tube, the source electrode of described 5th NMOS tube connects earth terminal by the second resistance, drain electrode is connected to the drain electrode of the 5th PMOS, described 5th, the grid of six PMOS is connected and is connected to the drain electrode of the 5th PMOS, the source electrode of the 5th PMOS is connected with the drain electrode of the 3rd PMOS and is connected to the 3rd, the grid of four PMOS, described 3rd, the source electrode of four PMOS is connected and connects power end, the drain electrode of the 4th PMOS is connected with the source electrode of the 6th PMOS, the drain electrode of described 6th PMOS is as the output terminal of constant-current source circuit,

Described weighting subtraction computing circuit is by the 6th, seven, eight, nine, ten, 11, 12, 13 NMOS tube compositions, the described 6th, the grid of seven NMOS tube is connected and is connected to the drain electrode of the 6th NMOS tube, and the source electrode of the 6th NMOS tube is connected with the drain electrode of the tenth NMOS tube, and the described tenth, the grid of 11 NMOS tube is connected and is connected to the drain electrode of the tenth NMOS tube, and the drain electrode of the 11 NMOS tube is connected with the source electrode of the 7th NMOS tube, and the described 8th, the grid of nine NMOS tube is connected and is connected to the drain electrode of the 8th NMOS tube, and the source electrode of the 8th NMOS tube is connected with the drain electrode of the 12 NMOS tube, and the described 12, the grid of 13 NMOS tube is connected and is connected to the drain electrode of the 12 NMOS tube, and the drain electrode of the 13 NMOS tube is connected with the source electrode of the 9th NMOS tube, and the described tenth, 11, 12, the source electrode of 13 NMOS tube is connected and connects earth terminal, and the described 7th, the drain electrode of eight NMOS tube is connected, and the drain electrode of described 9th NMOS tube is as the output terminal of weighting subtraction computing circuit,

The output terminal of described first constant current source is connected to the 7th, the drain junction of eight NMOS tube, and the output terminal of described second constant current source is connected to the drain electrode of the 6th NMOS tube, and described first constant current source is positive and negative contrary with the temperature coefficient of the second resistance of the second constant current source; The weighting coefficient of described first constant current source is the 4th PMOS that flows through described first constant current source and the ratio of electric current of the 3rd PMOS flowing through described first constant current source, and the weighting coefficient of described second constant current source is then for flowing through described 11 NMOS tube and the ratio of electric current of the 3rd PMOS flowing through described second constant current source.

Above-mentioned preferred implementation two in, first resistance of described first constant current source is N trap diffusion resistance, and the first resistance of described second constant current source is polysilicon resistance, or, first resistance of described first constant current source is polysilicon resistance, and the first resistance of described second constant current source is N trap diffusion resistance.

As the preferred embodiment of the present invention three, described first constant current source is negative temperature parameter current source circuit, and described second constant current source is the current mirroring circuit with positive temperature coefficient (PTC); Or described first constant current source is the current mirroring circuit with positive temperature coefficient (PTC), and described second constant current source is negative temperature parameter current source circuit;

Wherein, described negative temperature parameter current source circuit is by the 7th PMOS, 3rd resistance, first triode, second triode and the 4th resistance composition, the source electrode of described 7th PMOS connects power end, grid is connected with drain electrode and this tie point one road is connected to the collector of the second triode, the 3rd resistance of separately leading up to is connected to the base stage of the second triode, the base stage of described second triode is connected with the collector of the first triode, emitter is connected with the base stage of the first triode, the base stage of described first triode is connected with the emitter of the first triode by the 4th resistance, and the tie point of the emitter of the first triode and the 4th resistance connects earth terminal, the grid of described 7th PMOS is as the output terminal of negative temperature parameter current source circuit,

Described current mirroring circuit is by a left side, right PMOS, left, right NMOS tube and the first resistance composition, wherein, a described left side, the source electrode of right PMOS is connected and connects power end, grid is connected and is connected to the drain electrode of right PMOS, a described left side, the grid of right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube connects earth terminal, the source electrode of right NMOS tube is connected to earth terminal by the first resistance, described left PMOS is connected with the drain electrode of left NMOS tube, described right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit, wherein, described first resistance has negative temperature coefficient,

Described weighting subtraction computing circuit is by first, second PMOS and first, second, 3rd, 4th NMOS tube composition, wherein, described first, the source electrode of the second PMOS is connected and connects power end, described first, the source electrode of the second NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the first NMOS tube, described 3rd, the source electrode of the 4th NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, described first PMOS is connected with the drain electrode of the first NMOS tube, described second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of described 4th NMOS tube is as the output terminal of weighting subtraction computing circuit, described second, the grid of one PMOS is respectively as the minuend input end of weighting subtraction computing circuit and subtracting input.

The present invention also can do following improvement: described adjustable Positive and Negative Coefficient Temperature constant current source also comprises current amplification circuit; The input end of described current amplification circuit is connected with the output terminal of weighting subtraction computing circuit, and the output terminal of current amplification circuit is as the output terminal of adjustable Positive and Negative Coefficient Temperature constant current source.

As a kind of embodiment of current amplification circuit of the present invention, described current amplification circuit is image current source circuit.

As the preferred implementation of current amplification circuit of the present invention, described current amplification circuit comprises the 7th, eight PMOS, 14, 15, 16 NMOS tube, second operational amplifier and the 5th, six resistance, described 14, the grid of 15 NMOS tube is connected and is connected to the drain electrode of the 14 NMOS tube, source electrode is connected and connects earth terminal, described 15 NMOS tube is connected with the drain electrode of the 7th PMOS and is connected to the 7th, the grid of eight PMOS, described 7th, the source electrode of eight PMOS is connected and connects power end, drain electrode one tunnel of described 8th PMOS is connected to the in-phase input end of the second operational amplifier, the 5th resistance of separately leading up to connects earth terminal, the inverting input of described second operational amplifier is connected to the source electrode of the 16 NMOS tube, output terminal is connected to the grid of the 16 NMOS tube, the source electrode of described 16 NMOS tube connects earth terminal by the 6th resistance, the drain electrode of described 14 NMOS tube is as the input end of current amplification circuit, the drain electrode of described 16 NMOS tube is as the output terminal of current amplification circuit.

As shown in figure 3-1, principle of the present invention is electric current (the Complementary to Absolute Temperature by less negative temperature coefficient, CTAT) electric current (Proportional to Absolute Temperature, PATA) of less positive temperature coefficient (PTC) is deducted to obtain the electric current I of larger negative temperature coefficient _{cTAT_O}, in like manner, the electric current that also can deduct less negative temperature coefficient by the electric current of less positive temperature coefficient (PTC) obtains larger positive temperature coefficient (PTC) electric current I _{pATA_O}.

Fig. 3-2 shows the constant current source that the present invention obtains any negative temperature coefficient, and it passes through negative temperature parameter current I _cTATwith positive temperature coefficient (PTC) electricity I _pATAbe weighted combination, to obtain the electric current I of larger negative temperature coefficient _{cTAT_O}.Below the principle of this constant current source is described:

The temperature coefficient computing formula of electric current is:

$\mathrm{TCI}=\frac{\mathrm{\ΔI}}{\stackrel{\‾}{I}\×\mathrm{\ΔT}}=\frac{1}{I}\frac{\∂I}{I\∂T}\·\·\·\left(1\right)$

Δ I is the maximum current difference within the scope of total temperature, for current average within the scope of total temperature, Δ T is temperature range.

Electric current I _cTATtemperature coefficient be TCI _cTAT, and electric current I _pATAtemperature coefficient be TCI _pTAT.

The method of the invention for improving the Positive and Negative Coefficient Temperature of electric current, by using negative temperature parameter current I _cTATdeduct positive temperature coefficient (PTC) electric current I _pATAjust can improve the negative temperature coefficient of electric current, and if the negative temperature coefficient of specifying will be obtained just can will be obtained by the weighted array of different qualities electric current in two, in like manner, also can improve positive temperature coefficient (PTC).

As can be seen from formula (1), when the temperature coefficient of electric current I is TCI, so the temperature coefficient of K*I is constant, still can be TCI, and wherein COEFFICIENT K is enlargement factor.

Just introduce this method being realized different temperature coefficients electric current by weighting below.

The straight line representative that Fig. 4 neutral line rises has the electric current of any positive temperature coefficient (PTC), and the straight line representative linearly declined has the electric current of negative temperature coefficient.

If we want to obtain temperature coefficient is now TCI _{cTAT_O}electric current I _{cTAT_O}, T _midfor T _minto T _maxbetween medium temperature, medium temperature T _midunder transient current be I _{cTAT_OTmid}, can pass through I _cTATwith I _pTATbe weighted to obtain, below specific practice, have detailed introduction.

Schematic diagram according to Fig. 3, can obtain medium temperature T by following formula _midlower electric current is I _{cTAT_OTmid}.

I _{CTAT_OTmid}＝mI _{CTAT_Tmid}-nI _{PTAT_Tmid}············································（2）

M and n is wherein weighting coefficient.

I can be obtained according to formula (1) _{cTAT_O}temperature coefficient TCI _{cTAT_O}computing formula as follows:

$\mathrm{TC}{I}_{\mathrm{CTAT}\_O}=\frac{m\×\mathrm{\Δ}{I}_1+n\×\mathrm{\Δ}{I}_2}{{\stackrel{\‾}{I}}_O\×\mathrm{\ΔT}}\·\·\·\left(3\right)$

Negative temperature in Fig. 4 is all ideal linearity, medium temperature T _midlower electric current is the current average within the scope of total temperature, so i can be used _{cTAT_OTmid}substitute.

${\mathrm{TCI}}_{\mathrm{CTAT}\_O}=\frac{m\×{\mathrm{\ΔI}}_1+n\×{\mathrm{\ΔI}}_2}{{\stackrel{\‾}{I}}_O\×\mathrm{\ΔT}}=\frac{m\×{\mathrm{\ΔI}}_1}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}\×\mathrm{\ΔT}}+\frac{n\×{\mathrm{\ΔI}}_2}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}\×\mathrm{\ΔT}}\·\·\·\left(4\right)$

And wherein part formula can obtain abbreviation, as follows:

$\frac{m\×{\mathrm{\ΔI}}_1}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}\×\mathrm{\ΔT}}=\frac{m{I}_{\mathrm{CTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\×\frac{{\mathrm{\ΔI}}_1}{I_{\mathrm{CTAT}\_\mathrm{Tmid}}\×\mathrm{\ΔT}}=\frac{{\mathrm{mI}}_{\mathrm{CTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\×{\mathrm{TCI}}_{\mathrm{CTAT}}\·\·\·\left(5\right)$

Final TCI can be obtained in conjunction with formula (3), (4), (5) _{cTAT_O}computing formula as follows:

$\mathrm{TC}{I}_{\mathrm{CTAT}\_O}=\frac{m{I}_{\mathrm{CTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\mathrm{TC}{I}_{\mathrm{CTAT}}+\frac{n{I}_{\mathrm{PTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\mathrm{TC}{I}_{\mathrm{PTAT}}\·\·\·\left(6\right)$

In conjunction with formula (2) and formula (6), we can obtain one group of system of equations formula:

$\left\{\begin{array}{c}{\mathrm{mI}}_{\mathrm{CTAT}\_\mathrm{Tmid}}-n{I}_{\mathrm{PTAT}\_\mathrm{Tmid}}=I_{\mathrm{CTAT}\_\mathrm{OTmid}}\\ \frac{m{I}_{\mathrm{CTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\mathrm{TC}{I}_{\mathrm{CTAT}}+\frac{{\mathrm{nI}}_{\mathrm{PTAT}\_\mathrm{Tmid}}}{I_{\mathrm{CTAT}\_\mathrm{OTmid}}}\mathrm{TC}{I}_{\mathrm{PTAT}}={\mathrm{TCI}}_{\mathrm{CTAT}\_O}\end{array}\right.\·\·\·\left(7\right)$

By equation (7), the electric current of negative temperature coefficient required for us just can be obtained.

In order to control the power consumption of every bar current branch, the final temperature coefficient obtained is TCI _{cTAT_O}electric current I _{cTAT_O}smaller, according to the principle that the temperature coefficient of the electric current after amplifying this temperature coefficient circuit is still constant, the current value of arbitrary size can be obtained.

Second object of the present invention is realized by following technical measures:

A control method for adjustable Positive and Negative Coefficient Temperature constant current source described in any one scheme above-mentioned, is characterized in that: described control method comprises the following steps:

First, selected first constant current source and the second constant current source, wherein, selected described first constant current source is the constant current source with negative temperature coefficient, and described second constant current source is the constant current source with positive temperature coefficient (PTC), then described adjustable Positive and Negative Coefficient Temperature constant current source has negative temperature coefficient, and selected described first constant current source is the constant current source with positive temperature coefficient (PTC), and described second constant current source is the constant current source with negative temperature coefficient, then described adjustable Positive and Negative Coefficient Temperature constant current source has positive temperature coefficient (PTC);

The second, weighting coefficient m and n of the first constant current source and the second constant current source is calculated according to following formula,

$\left\{\begin{array}{c}m{I}_{1\mathrm{Tmid}}-n{I}_{2\mathrm{Tmid}}=I_{\mathrm{OTmid}}\\ \frac{m{I}_{1\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}\mathrm{TC}{I}_1+\frac{n{I}_{2\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}\mathrm{TC}{I}_2={\mathrm{TCI}}_O\end{array}\right.$

Wherein, be the output current of weighting subtraction computing circuit, TCI _ofor the temperature coefficient needed for adjustable Positive and Negative Coefficient Temperature constant current source, I _1Tmidand I _2Tmidbe respectively the first constant current source and the transient current of the second constant current source under the medium temperature Tmid of temperature required scope, I _oTmidfor the transient current of weighting subtraction computing circuit under the medium temperature Tmid of temperature required scope, TCI ₁and TCI ₂be respectively the temperature coefficient of the first constant current source and the second constant current source;

3rd, according to weighting coefficient m and n of the first constant current source calculated and the second constant current source, the circuit parameter of described adjustable Positive and Negative Coefficient Temperature constant current source is set, to obtain the adjustable Positive and Negative Coefficient Temperature constant current source of temperature required coefficient.

Compared with prior art, the present invention has following beneficial effect:

(1) in the present invention, required for constant current source, the Positive and Negative Coefficient Temperature of electric current is arbitrary, and the various devices therefore in integrated circuit with temperature coefficient can be employed for the present invention;

(2) the present invention is weighted the electric current that just can obtain specifying positive temperature coefficient (PTC) or negative temperature coefficient by aligning negative temperature parameter current;

(3) the high negative temperature parameter current that obtains of the present invention, can meet the temperature compensation requirement of push-pull converter circuit, and effectively can improve the problem of the difficult and high temperature short circuit easy burn-out of push-pull converter cold-starting;

(4) constant current source of the present invention meets the requirement of integrated circuit (IC) design, achieves low price, high integration, the effect such as practical.

Accompanying drawing explanation

The existing traditional self-excited push-pull type transducer circuit theory diagrams of Fig. 1;

Fig. 2-1 provides biased self-excited push-pull type transducer circuit diagram for existing use constant current source;

Fig. 2-2 is traditional negative temperature coefficient constant-current source circuit figure;

Fig. 3-1 is temperature coefficient Computing Principle schematic diagram in the present invention;

Fig. 3-2 is the theory diagram of adjustable Positive and Negative Coefficient Temperature constant current source of the present invention;

Fig. 4 has arbitrarily positive temperature coefficient (PTC) and negative temperature coefficient ideal current curve;

Fig. 5 is the circuit theory diagrams of the embodiment of the present invention one;

Fig. 6-1 is the simulation results that the embodiment of the present invention one obtains-7000ppm/K temperature coefficient current;

Fig. 6-2 is the simulation results that the embodiment of the present invention one obtains-10000ppm/K temperature coefficient current;

Fig. 7 is the circuit theory diagrams of the embodiment of the present invention two;

Fig. 8 is the circuit theory diagrams of the embodiment of the present invention three;

Fig. 9 is the circuit theory diagrams of the embodiment of the present invention four.

Embodiment

Embodiment one

The present invention relates to integrated circuit, more particularly, the present invention may be used for all to be needed to have in the biased switch power controller of large temperature coefficient current.According to each embodiment, the invention provides the scheme of various enhancing temperature coefficient.

As shown in Figure 5, the adjustable Positive and Negative Coefficient Temperature constant current source of the present embodiment one comprises the first constant current source A1, the second constant current source A2, weighting subtraction computing circuit A3 and current amplification circuit A4; The temperature coefficient of the first constant current source A1 and the second constant current source A2 is on the contrary positive and negative, the output terminal of the first constant current source A1 and the second constant current source A2 is connected respectively to minuend input end and the subtracting input of weighting subtraction computing circuit A3, weighting subtraction computing circuit A3 is by the weighting coefficient of adjustment first constant current source A1 and the second constant current source A2, export the electric current that Positive and Negative Coefficient Temperature is adjustable, the input end of current amplification circuit A4 is connected with the output terminal of weighting subtraction computing circuit A3, and the output terminal of current amplification circuit A4 is as the output terminal of adjustable Positive and Negative Coefficient Temperature constant current source.

Wherein, the first constant current source A1 comprises metal-oxide-semiconductor P501, P502, N501, N502 and resistance R501, and they form current mirroring circuit, and the corresponding left and right PMOS for current mirroring circuit of difference, left and right NMOS tube and the first resistance; Second constant current source A2 comprises metal-oxide-semiconductor P503, P504, N503, N504 and resistance R502, and they also form current mirroring circuit, and corresponds respectively to the left and right PMOS of current mirroring circuit, left and right NMOS tube and the first resistance.The circuit structure of current mirroring circuit is: the source electrode of left and right PMOS is connected and meets power end VCC, grid is connected and is connected to the drain electrode of right PMOS, the grid of left and right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube meets earth terminal GND, the source electrode of right NMOS tube is connected to earth terminal GND by the first resistance, left PMOS is connected with the drain electrode of left NMOS tube, right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit;

Weighting subtraction computing circuit A3 is by first, second PMOS P505, P506 and first, second, 3rd, 4th NMOS tube N505, N506, N507, N508 forms, wherein, first, the source electrode of the second PMOS is connected and meets power end VCC, first, the source electrode of the second NMOS tube is connected and meets earth terminal GND, grid is connected and is connected to the drain electrode of the first NMOS tube, 3rd, the source electrode of the 4th NMOS tube is connected and meets earth terminal GND, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, first PMOS is connected with the drain electrode of the first NMOS tube, second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of the 4th NMOS tube is as the output terminal of weighting subtraction computing circuit A3,

Current amplification circuit A4 is the image current source circuit be made up of PMOS P507, P508;

The output terminal of the first constant current source A1 is connected to the grid of the second PMOS, and the output terminal of the second constant current source A2 is connected to the grid of the first PMOS; First constant current source A1 is positive and negative contrary with the temperature coefficient of first resistance of the second constant current source A2, and namely the first resistance R501 of the first constant current source A1 is N trap diffusion resistance nwell, and the first resistance R502 of the second constant current source A2 is polysilicon resistance poly; The weighting coefficient m of the first constant current source A1 flows through the second PMOS and the ratio of electric current of the first resistance flowing through the first constant current source A1, and the weighting coefficient n of the second constant current source A2 is then for flowing through the second NMOS tube and the ratio of electric current of the first resistance flowing through the second constant current source A2.

The breadth length ratio of NMOS tube N502 is k times of NMOS tube N501, the breadth length ratio of NMOS tube N504 is k times of NMOS tube N503, breadth length ratio due to PMOS P506 is m times of PMOS P502, so the electric current flowing through PMOS P506 is m times that flows through electric current in PMOS P502, be namely flow through the electric current I in resistance R501 _cTATm doubly, i.e. mI _cTAT.The electric current flowing through NMOS tube N506 is n times that flows through electric current in PMOS P504, is namely flow through the electric current I in resistance R502 _pTATn doubly, i.e. nI _pTAT.According to formula (2), finally jointly realize the weighted calculation of electric current by the relation between PMOS P506, NMOS tube N506 and NMOS tube N507, the electric current namely flowing through NMOS tube N507 is mI _cTAT-nI _pTAT, i.e. I _{cTAT_O}.

The electric current flow through in resistance R501 is I _cTAT:

$I_{\mathrm{CTAT}}=\frac{2}{R_{\mathrm{nwell}}^2{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\×(W_1/L_1)}{(1-\frac{1}{\sqrt{k}})}^2\·\·\·\left(8\right)$

Wherein R _nwellfor the resistance of nwell resistance R501, W ₁/ L ₁for the breadth length ratio of NMOS tube N501, μ _nfor n channel device surface mobility, C _oxfor unit area gate oxide capacitance.

The electric current flow through in resistance R502 is I _pTAT:

$I_{\mathrm{PTAT}}=\frac{2}{R_{\mathrm{poly}}^2{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\×(W_3/L_3)}{(1-\frac{1}{\sqrt{k}})}^2\·\·\·\left(9\right)$

R _polyfor the resistance of poly resistance R502, W ₃/ L ₃for the breadth length ratio of NMOS tube N503.

The I of required size can be obtained by arranging resistance sizes _cTATwith I _pTAT.

We to use in embodiment one integrated circuit to improve current temperature coefficient now, and obtaining temperature coefficient is-7000ppm/K and the electric current of the difference high negative temperature coefficient of-10000ppm/K two kinds.

Suppose that resistance R501 resistance is 12.34K, resistance R502 resistance is 19K, available like this I _cTATwith I _pTAT.I can be drawn from table one _cTATwith I _pTATtemperature coefficient be respectively-5610ppm/K and 3026ppm/K.

Table one:

According to the raw data in table one, calculation equation below can obtaining in conjunction with equation (7):

$\left\{\begin{array}{c}15.8m-7.02n=I_{\mathrm{CTAT}\_\mathrm{OTmid}}\\ 15.8m\×5610+7.02n\×3026=7000\×I_{\mathrm{CTAT}\_\mathrm{OTmid}}\end{array}\right.\·\·\·\left(10\right)$

After making n=1, I can be calculated _{cTAT_OTmid}=43.61uA, m=3.2;

After m is rounded, m=3;

Then by calculating mI _cTAT, nI _pTAT, and mI _cTAT-nI _pTATdata can be obtained as shown in table one.

Be-6985ppm/K the results from the calculation result, closely target call-7000ppm/K.

Analogous diagram shown in Fig. 6-1 is exactly the simulation results obtaining-7000ppm/K temperature coefficient current.

According to the raw data in table two, calculation equation below can obtaining in conjunction with equation (7):

$\left\{\begin{array}{c}15.8m-7.02n=I_{\mathrm{CTAT}\_\mathrm{OTmid}}\\ 15.8m\×5610+7.02n\×3026=10000\×I_{\mathrm{CTAT}\_\mathrm{OTmid}}\end{array}\right.\·\·\·\left(11\right)$

Table two

After making n=3, I can be calculated _{cTAT_O}=41.43uA, m=3.95;

After m is rounded, m=4;

Then by calculating mICTAT, nIPTAT, and mICTAT-nIPTAT can obtain data as shown in table two.

Result is the results from the calculation result-9468ppm/K, closely target call-10000ppm/K.

Analogous diagram shown in Fig. 6-2 is exactly the simulation results obtaining-10000ppm/K temperature coefficient current.

Table one is all calculated according to formula (1) with temperature coefficient (ppm/K) result in table two.

The result obtained from table one and table two can be found out, method provided by the present invention is feasible, not only can obtain required negative temperature parameter current by the method simultaneously, positive temperature coefficient (PTC) electric current needed for simultaneously also can being obtained by the circuit in the present embodiment, as long as exchange just can to realize producing positive temperature coefficient (PTC) and the circuit producing negative temperature coefficient below.

If go for larger electric current KI _{cTAT_O}, the current mirror of large mirroring ratios relation can be utilized to realize, and constant K is the number proportionate relationship of PMOS P507 and PMOS P508, and the number ratio of NMOS tube N507 and NMOS tube N508 is 1.

In addition, in the present embodiment one, by first resistance of the first constant current source A1 is selected polysilicon resistance, and first resistance of the second constant current source A2 selects N trap diffusion resistance, namely the R501 in Fig. 5 selects Poly resistance, and R502 selects N_well resistance, then the adjustable Positive and Negative Coefficient Temperature constant current source obtained has positive temperature coefficient (PTC), its principle is identical with above-described embodiment one, does not repeat them here.

Embodiment two

Be illustrated in figure 7 the embodiment two of constant current source of the present invention, the present embodiment two is with the difference of embodiment one: the circuit producing Positive and Negative Coefficient Temperature is different from the circuit in example one.

First constant current source A1 comprises operational amplifier U1, PMOS P601, P602, P603, P604, NMOS tube N601 and resistance R601, they form constant-current source circuit, and the first operational amplifier of the corresponding constant-current source circuit of difference, third and fourth, five, six PMOS, the 5th NMOS tube and the second resistance; Second constant current source A2 comprises operational amplifier U2, PMOS P605, P606, P607, P608, NMOS tube N602 and resistance R602, they also form constant-current source circuit, and the first operational amplifier of the corresponding constant-current source circuit of difference, third and fourth, five, six PMOS, the 5th NMOS tube and the second resistance.The circuit structure of above-mentioned constant-current source circuit is: the in-phase input end access reference voltage of the first operational amplifier, inverting input is connected with the source electrode of the 5th NMOS tube, output terminal is connected to the grid of the 5th NMOS tube, the source electrode of the 5th NMOS tube connects earth terminal by the second resistance, drain electrode is connected to the drain electrode of the 5th PMOS, 5th, the grid of six PMOS is connected and is connected to the drain electrode of the 5th PMOS, the source electrode of the 5th PMOS is connected with the drain electrode of the 3rd PMOS and is connected to the 3rd, the grid of four PMOS, 3rd, the source electrode of four PMOS is connected and connects power end, the drain electrode of the 4th PMOS is connected with the source electrode of the 6th PMOS, the drain electrode of the 6th PMOS is as the output terminal of constant-current source circuit,

Weighting subtraction computing circuit A3 is by the 6th, seven, eight, nine, ten, 11, 12, 13 NMOS tube N603, N604, N605, N606, N607, N608, N609, N6010 forms, and the 6th, the grid of seven NMOS tube is connected and is connected to the drain electrode of the 6th NMOS tube, and the source electrode of the 6th NMOS tube is connected with the drain electrode of the tenth NMOS tube, and the tenth, the grid of 11 NMOS tube is connected and is connected to the drain electrode of the tenth NMOS tube, and the drain electrode of the 11 NMOS tube is connected with the source electrode of the 7th NMOS tube, and the 8th, the grid of nine NMOS tube is connected and is connected to the drain electrode of the 8th NMOS tube, and the source electrode of the 8th NMOS tube is connected with the drain electrode of the 12 NMOS tube, and the 12, the grid of 13 NMOS tube is connected and is connected to the drain electrode of the 12 NMOS tube, and the drain electrode of the 13 NMOS tube is connected with the source electrode of the 9th NMOS tube, and the tenth, 11, 12, the source electrode of 13 NMOS tube is connected and connects earth terminal, and the 7th, the drain electrode of eight NMOS tube is connected, and the drain electrode of the 9th NMOS tube is as the output terminal of weighting subtraction computing circuit A3,

The output terminal of the first constant current source A1 is connected to the 7th, the drain junction of eight NMOS tube, the output terminal of the second constant current source A2 is connected to the drain electrode of the 6th NMOS tube, first constant current source A1 is positive and negative contrary with the temperature coefficient of second resistance of the second constant current source A2, namely the second resistance R601 of the first constant current source A1 is N trap diffusion resistance, and the second resistance R602 of the second constant current source A2 is polysilicon resistance; The weighting coefficient of the first constant current source A1 is the 4th PMOS that flows through the first constant current source A1 and the ratio of electric current of the 3rd PMOS flowing through the first constant current source A1, and the weighting coefficient of the second constant current source A2 is then for flowing through the 11 NMOS tube and the ratio of electric current of the 3rd PMOS flowing through the second constant current source A2.

The principle of brief description the present embodiment two:

Reason is the R in embodiment one in circuit _nwellthe temperature coefficient of resistance can not be too little, otherwise cannot produce negative temperature parameter current, by formula (8) both sides to temperature differentiate, and then I is sentenced in both sides simultaneously _cTATcan obtain:

${\mathrm{TCI}}_{\mathrm{CTAT}}=\frac{1}{I_{\mathrm{CTAT}}}\×\frac{\∂I_{\mathrm{CTAT}}}{\∂T}=-2\left(\frac{1}{R_{\mathrm{nwell}}}\frac{\∂R_{\mathrm{nwell}}}{\∂T}\right)-\frac{\∂\left({\mathrm{\μ}}_n{C}_{\mathrm{ox}}\right)}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}}\·\·\·\left(12\right)$

TCI can be found out by formula (12) _cTATin further comprises the negative temperature coefficient of mobility, if R _newllpositive temperature coefficient (PTC) large not, so I _cTATelectric current just may become and become positive temperature coefficient (PTC) from negative temperature coefficient, therefore so just to R _nwellresistance sizes has just had restriction, R _nwellthe temperature coefficient of resistance can not be too little.And the electric current produced in embodiment two equals Vref/R, Vref is reference voltage, the temperature coefficient of this electric current is only relevant with the temperature coefficient of resistance, therefore circuit shown in embodiment two (Fig. 7) would not have the restriction of temperature-coefficient of electrical resistance size described in embodiment one, and the resistance of any size temperature coefficient all can apply in this circuit.Finally KI will be obtained _{cTAT_O}the current mirror of large mirroring ratios relation can be utilized to realize, and method is with embodiment one.

In addition, in the present embodiment two, by second resistance of the first constant current source A1 is selected polysilicon resistance, and second resistance of the second constant current source A2 selects N trap diffusion resistance, namely the R601 in Fig. 7 selects Poly resistance, and R602 selects N_well resistance, then the adjustable Positive and Negative Coefficient Temperature constant current source obtained has positive temperature coefficient (PTC), its principle is identical with above-described embodiment two, does not repeat them here.

Embodiment three

Be illustrated in figure 8 the embodiment three of constant current source of the present invention, it comprises the first constant current source A1, the second constant current source A2 and weighting subtraction computing circuit A3.

Wherein, first constant current source A1 is negative temperature parameter current source circuit, by the 7th PMOS P801, 3rd resistance R801, first triode Q801, second triode Q802 and the 4th resistance R802 forms, the source electrode of the 7th PMOS connects power end, grid is connected with drain electrode and this tie point one road is connected to the collector of the second triode, the 3rd resistance of separately leading up to is connected to the base stage of the second triode, the base stage of the second triode is connected with the collector of the first triode, emitter is connected with the base stage of the first triode, the base stage of the first triode is connected with the emitter of the first triode by the 4th resistance, and the tie point of the emitter of the first triode and the 4th resistance connects earth terminal, the grid of the 7th PMOS is as the output terminal of negative temperature parameter current source circuit,

Second constant current source A2 comprises metal-oxide-semiconductor P803, P804, N801, N802 and resistance R803, and their compositions have the current mirroring circuit of positive temperature coefficient (PTC), and respectively to should left and right PMOS, left and right NMOS tube and first resistance of current mirroring circuit.The circuit structure of this current mirroring circuit is: the source electrode of left and right PMOS is connected and connects power end, grid is connected and is connected to the drain electrode of right PMOS, the grid of left and right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube connects earth terminal, the source electrode of right NMOS tube is connected to earth terminal by the first resistance, left PMOS is connected with the drain electrode of left NMOS tube, right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit, wherein, the first resistance has negative temperature coefficient;

Weighting subtraction computing circuit A3 is by first, second PMOS P805, P806 and first, second, 3rd, 4th NMOS tube N803, N804, N805, N806 forms, wherein, first, the source electrode of the second PMOS is connected and connects power end, first, the source electrode of the second NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the first NMOS tube, 3rd, the source electrode of the 4th NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, first PMOS is connected with the drain electrode of the first NMOS tube, second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of the 4th NMOS tube is as the output terminal of weighting subtraction computing circuit A3, second, the grid of one PMOS is respectively as the minuend input end of weighting subtraction computing circuit A3 and subtracting input.

The difference of the present embodiment and embodiment one is: weighting coefficient m and the n calculated in embodiment one might not be integer, but the mirroring ratios of current mirror is necessary for integer, the impact brought after like this weighting coefficient being taken as integer can make finishing temperature coefficient deviate from the temperature coefficient of original necessary requirement size, the mirror image precision of current mirror is if not very high simultaneously, also there will be mirror image deviation, if therefore above-mentioned departure ratio is comparatively large, just needs separately to seek way and could solve this relatively large deviation; And can find from equation (3), by regulating TCI _cTATwith TCI _pTATthe temperature coefficient that weighting obtains can be adjusted to and finally need temperature coefficient, so by after weighting coefficient round numbers, certain circuit can be utilized TCI _cTATor TCI _pTATcarry out finely tuning the inaccurate problem that just can solve above-mentioned impact and bring.

And embodiment three-circuit just may be used for problems, be that the circuit producing negative temperature coefficient has changed another circuit into the difference of embodiment one, the original paper that generation negative temperature parameter circuit comprises has: PMOS P801, P802, P806, triode Q801, triode Q802, resistance R801, resistance R802, for generation of the size that can be regulated negative temperature coefficient in the circuit of negative temperature parameter current by amendment triode Q802 emitter area size in this circuit, reason is as follows.

Because the general temperature characterisitic of PN junction pressure drop is:

$\frac{\∂V_{\mathrm{BE}}}{\∂T}=\frac{V_{\mathrm{BE}}-2.5V_T-\frac{E_g}{q}}{T}\·\·\·\left(13\right)$

Wherein for the band gap voltage of silicon, k is the kind graceful constant of bohr, and T is temperature, and q is the quantity of electric charge.Can draw from formula (13), PN junction pressure drop V _bEtemperature coefficient negative temperature coefficient, and the absolute value of its negative temperature coefficient size and V _bEpressure drop inversely, and V _bEsize and the emitter area of triode be inversely proportional to, the V of triode can be drawn _bEtemperature coefficient be directly proportional to the emitter area of triode.

Flow through the negative temperature parameter current that the electric current of the 3rd resistance R801 is namely required, because resistance R802 is very large, very little by the electric current of its electric current, therefore flow through PMOS P801 and equal to flow through the electric current in resistance R801, be i.e. I _cTAT, can mI be obtained by the mirroring ratios of PMOS P806 and PMOS P801 _cTAT.Obtain larger electric current KI _{cTAT_O}implementation and embodiment one, two identical.

In addition, in the present embodiment three, the link position of the output terminal of above-mentioned first constant current source A1 and the second constant current source A2 is exchanged, that is to say that the output terminal of the first constant current source A1 is connected to the grid of PMOS P805, the output terminal of the second constant current source A2 is connected to the grid of PMOS P806, the adjustable Positive and Negative Coefficient Temperature constant current source then obtained has positive temperature coefficient (PTC), and its principle is identical with above-described embodiment three, does not repeat them here.

Embodiment four

Be illustrated in figure 9 the circuit diagram of embodiment four, the present embodiment four can adopt any one implementation of the first constant current source A1 in above-described embodiment one to three, the second constant current source A2 and weighting subtraction computing circuit A3, and the difference of the present embodiment four is that the embodiment of current amplification circuit A4 is different.

The current amplification circuit A4 of the present embodiment four comprises the 7th, eight PMOS P901, P902, the 14, 15, 16 NMOS tube N901, N902, N903, the second operational amplifier A MP1 and the 5th, six resistance R901, R902, the 14, the grid of 15 NMOS tube is connected and is connected to the drain electrode of the 14 NMOS tube, and source electrode is connected and connects earth terminal, and the 15 NMOS tube is connected with the drain electrode of the 7th PMOS and is connected to the 7th, the grid of eight PMOS, the 7th, the source electrode of eight PMOS is connected and connects power end, drain electrode one tunnel of the 8th PMOS is connected to the in-phase input end of the second operational amplifier, the 5th resistance of separately leading up to connects earth terminal, the inverting input of the second operational amplifier is connected to the source electrode of the 16 NMOS tube, output terminal is connected to the grid of the 16 NMOS tube, the source electrode of the 16 NMOS tube connects earth terminal by the 6th resistance, the drain electrode of the 14 NMOS tube is as the input end of current amplification circuit A4, and the drain electrode of the 16 NMOS tube is as the output terminal of current amplification circuit A4.

The present embodiment four is finally to obtain big current KI with the difference of above-mentioned several embodiment _{cTAT_O}implementation inconsistent, principle is as follows:

Because utilize the I that embodiment one, two, three obtains _{cTAT_O}all microampere (uA) rank, and if finally to obtain the big current of milliampere (mA) rank, so utilize the I that the current mirror of large mirroring ratios relation realizes _{cTAT_O}doubly take advantage of, this implementation just becomes undesirable.In embodiment one, the number proportionate relationship of PMOS P507 and PMOS P508 is K, because will from microampere order electric current to milliampere level currents, constant K is very large, which results in and flow through PMOS P507 and differ very large with the electric current of PMOS P508, this can affect the mirror image precision of current mirror, causes net result to depart from KI _{cTAT_O}, described in embodiment four would not there is this off-set phenomenon in circuit.

Circuit component in embodiment four comprises: PMOS P901, PMOS P902, NMOS tube N901, N902, N903, resistance R901, resistance R902, and amplifier AMP1.This circuit utilizes amplifier equal with resistance R902 both end voltage to realize resistance R901 with the feedback loop that NMOS tube N903 is formed.The resistance proportionate relationship of resistance R901 and resistance R902 is set to K doubly, and resistance type selecting is Nwell resistance, because the Nwell resistance of positive temperature coefficient (PTC) and negative temperature electric current I _{cTAT_O}mutual compensation, so just can ensure that the quiescent voltage of the positive input of the second operational amplifier A MP1 can not change too large, thus ensure that each device is in saturated.

The control method of the adjustable Positive and Negative Coefficient Temperature constant current source of above-mentioned four embodiments, comprises the following steps:

First, selected first constant current source A1 and the second constant current source A2, wherein, selected first constant current source A1 is the constant current source with negative temperature coefficient, and the second constant current source A2 is the constant current source with positive temperature coefficient (PTC), then adjustable Positive and Negative Coefficient Temperature constant current source has negative temperature coefficient, and selected first constant current source A1 is the constant current source with positive temperature coefficient (PTC), and the second constant current source A2 is the constant current source with negative temperature coefficient, then adjustable Positive and Negative Coefficient Temperature constant current source has positive temperature coefficient (PTC).

The second, weighting coefficient m and n of the first constant current source A1 and the second constant current source A2 is calculated according to following formula.

$\left\{\begin{array}{c}m{I}_{1\mathrm{Tmid}}-n{I}_{2\mathrm{Tmid}}=I_{\mathrm{OTmid}}\\ \frac{m{I}_{1\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}\mathrm{TC}{I}_1+\frac{n{I}_{2\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}{\mathrm{TCI}}_2={\mathrm{TCI}}_O\end{array}\right.\·\·\·\left(14\right)$

Wherein, be the output current of weighting subtraction computing circuit (A3), TCI _ofor the temperature coefficient needed for adjustable Positive and Negative Coefficient Temperature constant current source, I _1Tmidand I _2Tmidbe respectively the first constant current source (A1) and the transient current of the second constant current source (A2) under the medium temperature Tmid of temperature required scope, I _oTmidfor the transient current of weighting subtraction computing circuit (A3) under the medium temperature Tmid of temperature required scope, TCI ₁and TCI ₂be respectively the temperature coefficient of the first constant current source (A1) and the second constant current source (A2);

3rd, according to weighting coefficient m and n of the first constant current source A1 calculated and the second constant current source A2, the circuit parameter of adjustable Positive and Negative Coefficient Temperature constant current source is set, to obtain the adjustable Positive and Negative Coefficient Temperature constant current source of temperature required coefficient.

Embodiments of the present invention are not limited thereto; according to foregoing of the present invention; utilize ordinary technical knowledge and the customary means of this area; do not departing under the present invention's above-mentioned basic fundamental thought prerequisite; the present invention can also make the amendment of other various ways, replacement or change, all drops within rights protection scope of the present invention.

Claims (10)

1. a constant current source for adjustable Positive and Negative Coefficient Temperature, is characterized in that: described adjustable Positive and Negative Coefficient Temperature constant current source comprises the first constant current source (A1), the second constant current source (A2) and weighting subtraction computing circuit (A3); The temperature coefficient of described first constant current source (A1) and the second constant current source (A2) is on the contrary positive and negative, the output terminal of described first constant current source (A1) and the second constant current source (A2) is connected respectively to minuend input end and the subtracting input of weighting subtraction computing circuit (A3), described weighting subtraction computing circuit (A3), by the weighting coefficient of adjustment first constant current source (A1) and the second constant current source (A2), exports the steady current that Positive and Negative Coefficient Temperature is adjustable.

2. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 1, it is characterized in that: described first constant current source (A1) and the second constant current source (A2) are current mirroring circuit, this current mirroring circuit is by a left side, right PMOS, left, right NMOS tube and the first resistance composition, wherein, a described left side, the source electrode of right PMOS is connected and connects power end, grid is connected and is connected to the drain electrode of right PMOS, a described left side, the grid of right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube connects earth terminal, the source electrode of right NMOS tube is connected to earth terminal by the first resistance, described left PMOS is connected with the drain electrode of left NMOS tube, described right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit,

Described weighting subtraction computing circuit (A3) is by first, second PMOS and first, second, 3rd, 4th NMOS tube composition, wherein, described first, the source electrode of the second PMOS is connected and connects power end, described first, the source electrode of the second NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the first NMOS tube, described 3rd, the source electrode of the 4th NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, described first PMOS is connected with the drain electrode of the first NMOS tube, described second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of described 4th NMOS tube is as the output terminal of weighting subtraction computing circuit (A3),

The output terminal of described first constant current source (A1) is connected to the grid of the second PMOS, and the output terminal of described second constant current source (A2) is connected to the grid of the first PMOS; Described first constant current source (A1) is positive and negative contrary with the temperature coefficient of the first resistance of the second constant current source (A2); The weighting coefficient of described first constant current source (A1) is for flowing through described second PMOS and the ratio of electric current of the first resistance flowing through the first constant current source (A1), and the weighting coefficient of described second constant current source (A2) is then for flowing through described second NMOS tube and the ratio of electric current of the first resistance flowing through the second constant current source (A2).

3. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 2, it is characterized in that: the first resistance of described first constant current source (A1) is N trap diffusion resistance, and the first resistance of described second constant current source (A2) is polysilicon resistance, or, first resistance of described first constant current source (A1) is polysilicon resistance, and the first resistance of described second constant current source (A2) is N trap diffusion resistance.

4. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 1, it is characterized in that: described first constant current source (A1) and the second constant current source (A2) are constant-current source circuit, this constant-current source circuit is by the first operational amplifier, 3rd, four, five, six PMOS, 5th NMOS tube and the second resistance composition, wherein, the in-phase input end access reference voltage of described first operational amplifier, inverting input is connected with the source electrode of the 5th NMOS tube, output terminal is connected to the grid of the 5th NMOS tube, the source electrode of described 5th NMOS tube connects earth terminal by the second resistance, drain electrode is connected to the drain electrode of the 5th PMOS, described 5th, the grid of six PMOS is connected and is connected to the drain electrode of the 5th PMOS, the source electrode of the 5th PMOS is connected with the drain electrode of the 3rd PMOS and is connected to the 3rd, the grid of four PMOS, described 3rd, the source electrode of four PMOS is connected and connects power end, the drain electrode of the 4th PMOS is connected with the source electrode of the 6th PMOS, the drain electrode of described 6th PMOS is as the output terminal of constant-current source circuit,

Described weighting subtraction computing circuit (A3) is by the 6th, seven, eight, nine, ten, 11, 12, 13 NMOS tube compositions, the described 6th, the grid of seven NMOS tube is connected and is connected to the drain electrode of the 6th NMOS tube, and the source electrode of the 6th NMOS tube is connected with the drain electrode of the tenth NMOS tube, and the described tenth, the grid of 11 NMOS tube is connected and is connected to the drain electrode of the tenth NMOS tube, and the drain electrode of the 11 NMOS tube is connected with the source electrode of the 7th NMOS tube, and the described 8th, the grid of nine NMOS tube is connected and is connected to the drain electrode of the 8th NMOS tube, and the source electrode of the 8th NMOS tube is connected with the drain electrode of the 12 NMOS tube, and the described 12, the grid of 13 NMOS tube is connected and is connected to the drain electrode of the 12 NMOS tube, and the drain electrode of the 13 NMOS tube is connected with the source electrode of the 9th NMOS tube, and the described tenth, 11, 12, the source electrode of 13 NMOS tube is connected and connects earth terminal, and the described 7th, the drain electrode of eight NMOS tube is connected, and the drain electrode of described 9th NMOS tube is as the output terminal of weighting subtraction computing circuit (A3),

The output terminal of described first constant current source (A1) is connected to the 7th, the drain junction of eight NMOS tube, the output terminal of described second constant current source (A2) is connected to the drain electrode of the 6th NMOS tube, and described first constant current source (A1) is positive and negative contrary with the temperature coefficient of the second resistance of the second constant current source (A2); The weighting coefficient of described first constant current source (A1) is the 4th PMOS that flows through described first constant current source (A1) and the ratio of electric current of the 3rd PMOS flowing through described first constant current source (A1), and the weighting coefficient of described second constant current source (A2) is then for flowing through described 11 NMOS tube and the ratio of electric current of the 3rd PMOS flowing through described second constant current source (A2).

5. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 4, it is characterized in that: the first resistance of described first constant current source (A1) is N trap diffusion resistance, and the first resistance of described second constant current source (A2) is polysilicon resistance, or, first resistance of described first constant current source (A1) is polysilicon resistance, and the first resistance of described second constant current source (A2) is N trap diffusion resistance.

6. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 1, is characterized in that: described first constant current source (A1) is negative temperature parameter current source circuit, and described second constant current source (A2) is for having the current mirroring circuit of positive temperature coefficient (PTC); Or described first constant current source (A1) is for having the current mirroring circuit of positive temperature coefficient (PTC), and described second constant current source (A2) is negative temperature parameter current source circuit;

Wherein, described negative temperature parameter current source circuit is by the 7th PMOS, 3rd resistance, first triode, second triode and the 4th resistance composition, the source electrode of described 7th PMOS connects power end, grid is connected with drain electrode and this tie point one road is connected to the collector of the second triode, the 3rd resistance of separately leading up to is connected to the base stage of the second triode, the base stage of described second triode is connected with the collector of the first triode, emitter is connected with the base stage of the first triode, the base stage of described first triode is connected with the emitter of the first triode by the 4th resistance, and the tie point of the emitter of the first triode and the 4th resistance connects earth terminal, the grid of described 7th PMOS is as the output terminal of negative temperature parameter current source circuit,

Described current mirroring circuit is by a left side, right PMOS, left, right NMOS tube and the first resistance composition, wherein, a described left side, the source electrode of right PMOS is connected and connects power end, grid is connected and is connected to the drain electrode of right PMOS, a described left side, the grid of right NMOS tube is connected and is connected to the drain electrode of left NMOS tube, the source electrode of left NMOS tube connects earth terminal, the source electrode of right NMOS tube is connected to earth terminal by the first resistance, described left PMOS is connected with the drain electrode of left NMOS tube, described right PMOS be connected with the drain electrode of right NMOS tube and this tie point as the output terminal of current mirroring circuit, wherein, described first resistance has negative temperature coefficient,

Described weighting subtraction computing circuit (A3) is by first, second PMOS and first, second, 3rd, 4th NMOS tube composition, wherein, described first, the source electrode of the second PMOS is connected and connects power end, described first, the source electrode of the second NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the first NMOS tube, described 3rd, the source electrode of the 4th NMOS tube is connected and connects earth terminal, grid is connected and is connected to the drain electrode of the 3rd NMOS tube, described first PMOS is connected with the drain electrode of the first NMOS tube, described second PMOS and second, the drain electrode of the 3rd NMOS tube is connected, the drain electrode of described 4th NMOS tube is as the output terminal of weighting subtraction computing circuit (A3), described second, the grid of one PMOS is respectively as the minuend input end of weighting subtraction computing circuit (A3) and subtracting input.

7. the constant current source of the adjustable Positive and Negative Coefficient Temperature according to claim 1 to 6 any one, is characterized in that: described adjustable Positive and Negative Coefficient Temperature constant current source also comprises current amplification circuit (A4); The input end of described current amplification circuit (A4) is connected with the output terminal of weighting subtraction computing circuit (A3), and the output terminal of current amplification circuit (A4) is as the output terminal of adjustable Positive and Negative Coefficient Temperature constant current source.

8. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 7, is characterized in that: described current amplification circuit (A4) is image current source circuit.

9. the constant current source of adjustable Positive and Negative Coefficient Temperature according to claim 7, it is characterized in that: described current amplification circuit (A4) comprises the 7th, eight PMOS, 14, 15, 16 NMOS tube, second operational amplifier and the 5th, six resistance, described 14, the grid of 15 NMOS tube is connected and is connected to the drain electrode of the 14 NMOS tube, source electrode is connected and connects earth terminal, described 15 NMOS tube is connected with the drain electrode of the 7th PMOS and is connected to the 7th, the grid of eight PMOS, described 7th, the source electrode of eight PMOS is connected and connects power end, drain electrode one tunnel of described 8th PMOS is connected to the in-phase input end of the second operational amplifier, the 5th resistance of separately leading up to connects earth terminal, the inverting input of described second operational amplifier is connected to the source electrode of the 16 NMOS tube, output terminal is connected to the grid of the 16 NMOS tube, the source electrode of described 16 NMOS tube connects earth terminal by the 6th resistance, the drain electrode of described 14 NMOS tube is as the input end of current amplification circuit (A4), the drain electrode of described 16 NMOS tube is as the output terminal of current amplification circuit (A4).

10. a control method for adjustable Positive and Negative Coefficient Temperature constant current source described in claim 1 to 9 any one, is characterized in that: described control method comprises the following steps:

First, selected first constant current source (A1) and the second constant current source (A2), wherein, selected described first constant current source (A1) is for having the constant current source of negative temperature coefficient, and described second constant current source (A2) is for having the constant current source of positive temperature coefficient (PTC), then described adjustable Positive and Negative Coefficient Temperature constant current source has negative temperature coefficient, and selected described first constant current source (A1) is for having the constant current source of positive temperature coefficient (PTC), and described second constant current source (A2) is for having the constant current source of negative temperature coefficient, then described adjustable Positive and Negative Coefficient Temperature constant current source has positive temperature coefficient (PTC);

The second, weighting coefficient m and n of the first constant current source (A1) and the second constant current source (A2) is calculated according to following formula,

$\left\{\begin{array}{c}m{I}_{1\mathrm{Tmid}}-n{I}_{2\mathrm{Tmid}}=I_{\mathrm{OTmid}}\\ \frac{m{I}_{1\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}\mathrm{TC}{I}_1+\frac{n{I}_{2\mathrm{Tmid}}}{I_{\mathrm{OTmid}}}\mathrm{TC}{I}_2={\mathrm{TCI}}_O\end{array}\right.$

Wherein, be the output current of weighting subtraction computing circuit (A3), TCI _ofor the temperature coefficient needed for adjustable Positive and Negative Coefficient Temperature constant current source, I _1Tmidand I _2Tmidbe respectively the first constant current source (A1) and the transient current of the second constant current source (A2) under the medium temperature Tmid of temperature required scope, I _oTmidfor the transient current of weighting subtraction computing circuit (A3) under the medium temperature Tmid of temperature required scope, TCI ₁and TCI ₂be respectively the temperature coefficient of the first constant current source (A1) and the second constant current source (A2);

3rd, according to weighting coefficient m and n of the first constant current source (A1) calculated and the second constant current source (A2), the circuit parameter of described adjustable Positive and Negative Coefficient Temperature constant current source is set, to obtain the adjustable Positive and Negative Coefficient Temperature constant current source of temperature required coefficient.