CN102541148B - Two-way adjustable reference current generating device - Google Patents

Two-way adjustable reference current generating device Download PDF

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CN102541148B
CN102541148B CN201010618590.6A CN201010618590A CN102541148B CN 102541148 B CN102541148 B CN 102541148B CN 201010618590 A CN201010618590 A CN 201010618590A CN 102541148 B CN102541148 B CN 102541148B
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pmos pipe
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庄奕琪
汤华莲
雷吉成
赵辉
李勇强
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Nationz Technologies Inc
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Abstract

The invention relates to a two-way adjustable reference current generating device, which comprises a voltage/current conversion device, a current mirror, a current source switch adjustment array and a switch control signal decoding circuit, wherein the voltage/current conversion device and the current mirror are connected in series; the current source switch adjustment array is connected in parallel with a series circuit formed by the voltage/current conversion device and the current mirror; and the switch control signal decoding circuit is used for controlling switches in the current source switch adjustment array. The two-way adjustable reference current generating device provided by the invention is capable of correcting reference current bias caused by a manufacturing process, thereby, the precision of reference current can be increased, and the performance of a circuit chip using the reference current is further promoted.

Description

A kind of two-way adjustable reference current generating device
Technical field
The present invention relates to mimic channel field, relate in particular to a kind of two-way adjustable reference current generating device.
Background technology
Reference current has widespread use in Analogous Integrated Electronic Circuits, because electric current not loss on long metal wire, and voltage has loss, so in the mimic channel of wiring more complicated, current reference is more welcome.
Fig. 1 is the circuit diagram of a kind of common reference current generator in prior art.As shown in Figure 1, this existing reference current generator turns current device by the voltage of connecting and current mirror forms.Wherein, voltage turns current device by differential operational amplifier A0, and NMOS pipe M20 and resistance R 0 form, and the in-phase input end of differential operational amplifier A0 connects a reference voltage V with low-temperature coefficient ref, anti-phase input is connected to the source electrode of NMOS pipe M20, and output terminal is connected to the grid of NMOS pipe M20; Resistance R 0 one ends are connected to the source electrode of NMOS pipe M20, other end ground connection GND; Current mirror is comprised of PMOS pipe M10 and PMOS pipe M30, the source electrode of PMOS pipe M10 and PMOS pipe M30 is all connected to power vd D, the grid short circuit of PMOS pipe M10 and PMOS pipe M30 is also connected with the drain electrode of PMOS pipe M10, the drain electrode of PMOS pipe M10 is connected to the drain electrode of NMOS pipe M20 pipe, and the drain electrode of PMOS pipe M30 is reference current output.
Visible, traditional reference current generator is generally, by differential operational amplifier and resistance, a reference voltage with low-temperature coefficient is converted to electric current, then by current mirror arrangement, copies this electric current and obtains one or more reference currents.The ultimate principle copying is, is operated in saturation region and has same size and two transistors of gate source voltage transmit identical electric current.In the situation that not considering second-order effect, saturation region electric current is:
i D = 1 2 μ C ox W L ( v GS - V TH ) 2 - - - ( 1 )
I wherein dfor flowing through the electric current of MOSFET, the mobility that μ is channel carrier is electron mobility in NMOS pipe, is hole mobility in PMOS pipe, C oxfor unit area gate oxide electric capacity, v gSfor gate source voltage, V tHfor threshold voltage.Unit area gate oxide capacitance C oxwith threshold voltage V tHall relevant with technique.In actual chips is manufactured, technological parameter has randomness within the specific limits, even if therefore given gate source voltage also can cause reference current value and there are differences between design load in advance.For example, if exist a large amount of current sources to copy this reference current (current steering digital-to-analog converter) in circuit, can make the electric current after copying produce deviation, finally affect whole chip performance.
Therefore, due to the randomness of technological parameter, cause the not high situation of ubiquity reference current precision in prior art, thereby affected the performance of the circuit chip that uses this reference current.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of two-way adjustable reference current generating device, can improve the precision of reference current, thereby promotes the performance of the circuit chip that uses this reference current.
For solving the problems of the technologies described above, the present invention proposes a kind of two-way adjustable reference current generating device, by the voltage being connected in series, turn current device and current mirror, turn series circuit that current device and described current mirror form current supply switch in parallel with described voltage and adjust array, and the switch controlling signal decoding scheme of controlling switch in described current supply switch adjustment array forms, described voltage turns current device and is comprised of differential operational amplifier A, NMOS pipe M2 and resistance R, and the in-phase input end of differential operational amplifier A connects the reference voltage V with low-temperature coefficient ref, anti-phase input is connected to the source electrode of NMOS pipe M2, and output terminal is connected to the grid of NMOS pipe M2, and the drain electrode of NMOS pipe M2 is connected to the input end of described current mirror, and resistance R one end is connected to the source electrode of NMOS pipe M2, other end ground connection GND.
Further, said apparatus also can have following characteristics, described current mirror is comprised of PMOS pipe M1 and PMOS pipe M3, the source electrode of PMOS pipe M1 and PMOS pipe M3 is all connected to power vd D, the grid short circuit of PMOS pipe M1 and PMOS pipe M3 is also connected with the drain electrode of PMOS pipe M1, PMOS pipe M1 drain electrode is the input end of described current mirror, and the drain electrode of PMOS pipe M3 is reference current I refoutput terminal.
Further, said apparatus also can have following characteristics, described current supply switch is adjusted array and is comprised n+1 unit, each unit is comprised of current source I1, switch S, current source I2 and switch Q, electric current in current source I1 and current source I2 equates, an end of current source I1 is connected to power vd D, the other end is connected to one end of switch S, the input end of current mirror described in another termination of switch S, one end ground connection GND of current source I2, one end of another termination switch Q, the input end of current mirror described in another termination of switch Q.
For solving the problems of the technologies described above, the invention allows for a kind of two-way adjustable reference current generating device, by the voltage being connected in series, turn current device and current mirror, turn series circuit that current device and described current mirror form current supply switch in parallel with described voltage and adjust array, and the switch controlling signal decoding scheme of controlling switch in described current supply switch adjustment array forms, described voltage turns current device by differential operational amplifier A4, PMOS pipe M42 and resistance R 4 form, the in-phase input end of differential operational amplifier A4 connects the reference voltage V with low-temperature coefficient ref, anti-phase input is connected to the source electrode of PMOS pipe M42, and output terminal is connected to the grid of PMOS pipe M42, and the drain electrode of PMOS pipe M42 is connected to the input end of described current mirror, and an end of resistance R 4 is connected to the source electrode of PMOS pipe M42, another termination power vd D.
Further, said apparatus also can have following characteristics, described current mirror is comprised of NMOS pipe M41 and NMOS pipe M43, the source electrode of NMOS pipe M41 and NMOS pipe M43 is all connected to ground GND, the grid short circuit of NMOS pipe M41 and NMOS pipe M43 is also connected with the drain electrode of NMOS pipe M41, the input end that the drain electrode of NMOS pipe M41 is described current mirror, the drain electrode of NMOS pipe M43 is reference current I refoutput terminal.
Further, said apparatus also can have following characteristics, described current supply switch is adjusted array and is comprised n+1 unit, each unit is comprised of current source I41, switch S 4, current source I42 and switch Q4, electric current in current source I41 and current source I42 equates, an end of current source I41 is connected to power vd D, the other end is connected to one end of switch S 4, the input end of another termination current mirror of switch S 4, one end ground connection GND of current source I42, one end of another termination switch Q4, the input end of another termination current mirror of switch Q4.
Two-way adjustable reference current generating device provided by the present invention, can proofread and correct the reference current deviation being caused by manufacturing process, thereby can improve the precision of reference current, and then promotes the performance of the circuit chip that uses this reference current.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of a kind of common reference current generator in prior art;
Fig. 2 is the circuit diagram of two-way adjustable reference current generating device in first embodiment of the invention;
Fig. 3 is the switch controlling signal decoding scheme that in control chart 2, current supply switch is adjusted switch in array;
Fig. 4 is the circuit diagram of two-way adjustable reference current generating device in second embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing, principle of the present invention and feature are described, example, only for explaining the present invention, is not intended to limit scope of the present invention.
The first embodiment
Fig. 2 is the circuit diagram of two-way adjustable reference current generating device in first embodiment of the invention, and Fig. 3 is the switch controlling signal decoding scheme that in control chart 2, current supply switch is adjusted switch in array.As shown in Figures 2 and 3, in the present embodiment, the switch controlling signal decoding scheme that two-way adjustable reference current generating device turns switch in current device 2, current mirror, current supply switch adjustment array 1 and control current supply switch adjustment array by voltage forms, wherein voltage turns current device and connects with current mirror, it is in parallel with the series circuit that voltage turns current device and current mirror composition that current supply switch is adjusted array, switch controlling signal decoding scheme be input as M road external signal F 1, F 2..., F m-1, F m, be output as 2 (n+1) way switch control signal S0, S1......Sn, Q0, Q1......Qn, in this 2 (n+1) way switch control signal difference control chart 2, current supply switch is adjusted the respective switch in array.Wherein, in the present embodiment, voltage turns current device and is comprised of differential operational amplifier A, NMOS pipe M2 and resistance R, and the in-phase input end of differential operational amplifier A connects the reference voltage V with low-temperature coefficient refanti-phase input is connected to the source electrode of NMOS pipe M2, and output terminal is connected to the grid of NMOS pipe M2, and the drain electrode of NMOS pipe M2 is connected to the drain electrode of PMOS pipe M1 (input end that the drain electrode of PMOS pipe M1 is current mirror), one end of resistance R is connected to the source electrode of NMOS pipe M2, other end ground connection GND, current mirror is comprised of PMOS pipe M1 and PMOS pipe M3, the source electrode of PMOS pipe M1 and PMOS pipe M3 is all connected to power vd D, the grid short circuit of PMOS pipe M1 and PMOS pipe M3 is also connected with the drain electrode of PMOS pipe M1, and PMOS pipe M1 drain electrode is the input end of current mirror, and the drain electrode of PMOS pipe M3 is reference current I refoutput terminal, current supply switch is adjusted array and is comprised n+1 unit, each unit is by current source I1, switch S, current source I2 and switch Q form, electric current in current source I1 and current source I2 equates, an end of current source I1 is connected to power vd D, the other end is connected to one end of switch S, the input end of another termination current mirror of switch S (being the B point in Fig. 2), one end ground connection GND of current source I2, one end of another termination switch Q, the input end of another termination current mirror of switch Q (being the B point in Fig. 2), in side circuit design, these current sources and switch can be managed or the realization of PMOS pipe by NMOS.Two current source I1 and I2 in same current supply switch adjustment unit have same current, and the gate source voltage of the current source I1 in all unit is identical, and the gate source voltage of current source I2 is identical, its breadth length ratio be Geometric Sequence, be followed successively by
Figure GDA0000412882450000052
from formula (1), in array, the current value of current source is followed successively by I 0, 2I 0..., 2 ni 0, that is to say, in the adjacent cells of this n+1 unit, in current source I1 and current source I2, the size of electric current, respectively with the speed increase of 2 times, is followed successively by I 0, 2I 0..., 2 ni 0, I 0for minimal adjustment precision.
The course of work of two-way adjustable reference current generating device shown in Fig. 2 is as follows: a reference voltage V with low-temperature coefficient refthe in-phase end of input difference operational amplifier A, the end of oppisite phase of amplifier is connected to node A, from the character of amplifier, the voltage VA of node A =v ref, be a definite value, so flow through the electric current of resistance R
Figure GDA0000412882450000053
also be a definite value.Because the grid of M2 pipe does not have electric current to flow through, the electric current that flows through the drain electrode of M2 pipe equals to flow through the electric current of R.If the reference current of actual measurement is bigger than normal than predetermined value, input signal F mall switching tube Q are disconnected, then, according to needed reference current size, input suitable control signal F 1, F 2..., F m-1, after decoding unit, control corresponding switch S 0, S 1..., S nin one or more closure, electric current in the current source being at this moment connected with Closing Switch flows into Node B, owing to flowing through the electric current of M2 pipe, is certain value
Figure GDA0000412882450000054
so flow into the electric current of Node B through M1 pipe, reduce, thereby reference current is reduced under the effect of current mirror; If the reference current of actual measurement is less than normal than predetermined value, input signal F mall switching tube S are disconnected, then, according to needed reference current size, input suitable control signal F 1, F 2..., F m-1, after decoding unit, control corresponding switch Q 0, Q 1..., Q nin one or more closure, at this moment from Node B flow out electric current and through Closing Switch to respective current sources, owing to flowing through the electric current of M2 pipe, is definite value equally
Figure GDA0000412882450000055
so flow into the electric current of Node B through M1 pipe, increase, thereby reference current is increased under the effect of current mirror.Suppose the ratio of the breadth length ratio of M1 pipe and M3 pipe
Figure GDA0000412882450000056
reference current I refactual value and the maximum deviation of design load be ± Δ I.Because grid and the source shorted of M1 pipe and M3 pipe, so their gate source voltage v gSequate, from formula (1), the maximum deviation electric current that flows through M1 pipe is ± a Δ I.If I1 electric current sum and I2 electric current sum all equal respectively a Δ I, i.e. I in current source array 0+ 2I 0+ ...+2 ni 0=a Δ I, two-way adjustable reference current generating device shown in Fig. 2 just can be realized the adjusting to current reference, and degree of regulation is I 0 = a 2 n + 1 - 1 ΔI .
The two-way adjustable reference current generating device of the present embodiment, can proofread and correct the reference current deviation being caused by manufacturing process, thereby can improve the precision of reference current, and then promotes the performance of the circuit chip that uses this reference current.
The second embodiment
Fig. 4 is the circuit diagram of two-way adjustable reference current generating device in second embodiment of the invention.
As shown in Figure 4, in the present embodiment, two-way adjustable reference current generating device is also by voltage, to turn current device, current mirror, current supply switch adjust array and control current supply switch and adjust the switch controlling signal decoding scheme (not shown in Fig. 4) of switch in array and form.Different from the first embodiment, in the present embodiment, the M41 pipe and the effective NMOS pipe of M43 that form current source are realized, and the effective PMOS of M42 that voltage turns in current device realizes.
In the present embodiment, voltage turns current device and is comprised of differential operational amplifier A4, PMOS pipe M42 and resistance R 4, and the in-phase input end of differential operational amplifier A4 connects the reference voltage V with low-temperature coefficient refanti-phase input is connected to the source electrode of PMOS pipe M42, and output terminal is connected to the grid of PMOS pipe M42, and the drain electrode of PMOS pipe M42 is connected to the drain electrode of NMOS pipe M41 (input end that the drain electrode of NMOS pipe M41 is current mirror), one end of resistance R 4 is connected to the source electrode of PMOS pipe M42, another termination power vd D, current mirror is comprised of NMOS pipe M41 and NMOS pipe M43, the source electrode of NMOS pipe M41 and NMOS pipe M43 is all connected to ground GND, the grid short circuit of NMOS pipe M41 and NMOS pipe M43 is also connected with the drain electrode of NMOS pipe M41, the input end that the drain electrode of NMOS pipe M41 is current mirror, the drain electrode of NMOS pipe M43 is reference current I refoutput terminal, current supply switch is adjusted array and is comprised n+1 unit, each unit is by current source I41, switch S 4, current source I42 and switch Q4 form, electric current in current source I41 and current source I42 equates, an end of current source I41 is connected to power vd D, the other end is connected to one end of switch S 4, the input end of another termination current mirror of switch S 4 (being the B4 point in Fig. 4), one end ground connection GND of current source I42, one end of another termination switch Q4, the input end of another termination current mirror of switch Q4 (being the B4 point in Fig. 4), in the adjacent cells of this n+1 unit in current source I41 and current source I42 the size of electric current respectively with the speed increase of 2 times, be followed successively by I 0, 2I 0..., 2 ni 0, I 0for minimal adjustment precision.In the present embodiment, the switch controlling signal decoding scheme of controlling switch in current supply switch adjustment array is identical with the first embodiment, repeats no more herein.
In the present embodiment, the M41 pipe and the effective NMOS pipe of M43 that form current source are realized, and the effective PMOS pipe of M42 that voltage turns in current device is realized, and M1 pipe and the effective PMOS pipe of M3 is realized, the realization of the effective NMOS pipe of M2 in the first embodiment, therefore in the present embodiment, the course of work of two-way adjustable reference circuit generation device is contrary with the first embodiment, the course of work in the present embodiment is: if the reference current of actual measurement is bigger than normal than predetermined value, and input signal F mall switching tube S4 are disconnected, then, according to needed reference current size, input suitable control signal F 1, F 2..., F m-1, after decoding unit, control corresponding switch Q 0, Q 1..., Q nin one or more closure, at this moment part electric current flows out Node B 4 through closed switch Q4, owing to flowing through the electric current of M42 pipe, is certain value
Figure GDA0000412882450000071
so the electric current that flows into M41 pipe from Node B 4 reduces, thereby reference current is reduced under the effect of current mirror; If the reference current of actual measurement is less than normal than predetermined value, input signal F mall switching tube Q4 are disconnected, then, according to needed reference current size, input suitable control signal F 1, F 2..., F m-1, after decoding unit, control corresponding switch S 0, S 1..., S nin one or more closure, the electric current of the current source I1 that is at this moment connected with closed switch S 4 flows into Node B 4, is definite value equally owing to flowing through the electric current of M42 pipe
Figure GDA0000412882450000072
so flow into the electric current of M41 from Node B 4, increase, thereby reference current is increased under the effect of current mirror.
The two-way adjustable reference current generating device of the present embodiment, can proofread and correct the reference current deviation being caused by manufacturing process, thereby can improve the precision of reference current, and then promotes the performance of the circuit chip that uses this reference current.
Therefore two-way adjustable reference current generating device of the present invention, based on standard CMOS process, does not need extra technique, be easy to realize; In current supply switch adjustment unit, current source current value size is Geometric Sequence variation, makes the degree of regulation of reference current high.In addition, the present invention controls two groups of switch arrays by external input signal, makes to adjust electric current and from current mirror, flows out or inflow current mirror, thereby realize the function of bidirectional modulation reference current.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (6)

1. a two-way adjustable reference current generating device, it is characterized in that, by the voltage being connected in series, turn current device and current mirror, turn series circuit that current device and described current mirror form current supply switch in parallel with described voltage and adjust array, and the switch controlling signal decoding scheme of controlling switch in described current supply switch adjustment array forms, described voltage turns current device and is comprised of differential operational amplifier A, NMOS pipe M2 and resistance R, and the in-phase input end of differential operational amplifier A connects the reference voltage V with low-temperature coefficient ref, anti-phase input is connected to the source electrode of NMOS pipe M2, and output terminal is connected to the grid of NMOS pipe M2, and the drain electrode of NMOS pipe M2 is connected to the input end of described current mirror, and resistance R one end is connected to the source electrode of NMOS pipe M2, other end ground connection GND.
2. two-way adjustable reference current generating device according to claim 1, it is characterized in that, described current mirror is comprised of PMOS pipe M1 and PMOS pipe M3, the source electrode of PMOS pipe M1 and PMOS pipe M3 is all connected to power vd D, the grid short circuit of PMOS pipe M1 and PMOS pipe M3 is also connected with the drain electrode of PMOS pipe M1, PMOS pipe M1 drain electrode is the input end of described current mirror, and the drain electrode of PMOS pipe M3 is reference current I refoutput terminal.
3. two-way adjustable reference current generating device according to claim 2, it is characterized in that, described current supply switch is adjusted array and is comprised n+1 unit, each unit is comprised of current source I1, switch S, current source I2 and switch Q, electric current in current source I1 and current source I2 equates, an end of current source I1 is connected to power vd D, the other end is connected to one end of switch S, the input end of current mirror described in another termination of switch S, one end ground connection GND of current source I2, one end of another termination switch Q, the input end of current mirror described in another termination of switch Q.
4. a two-way adjustable reference current generating device, it is characterized in that, by the voltage being connected in series, turn current device and current mirror, turn series circuit that current device and described current mirror form current supply switch in parallel with described voltage and adjust array, and the switch controlling signal decoding scheme of controlling switch in described current supply switch adjustment array forms, described voltage turns current device and is comprised of differential operational amplifier A4, PMOS pipe M42 and resistance R 4, and the in-phase input end of differential operational amplifier A4 connects the reference voltage V with low-temperature coefficient ref, anti-phase input is connected to the source electrode of PMOS pipe M42, and output terminal is connected to the grid of PMOS pipe M42, and the drain electrode of PMOS pipe M42 is connected to the input end of described current mirror, and an end of resistance R 4 is connected to the source electrode of PMOS pipe M42, another termination power vd D.
5. two-way adjustable reference current generating device according to claim 4, it is characterized in that, described current mirror is comprised of NMOS pipe M41 and NMOS pipe M43, the source electrode of NMOS pipe M41 and NMOS pipe M43 is all connected to ground GND, the grid short circuit of NMOS pipe M41 and NMOS pipe M43 is also connected with the drain electrode of NMOS pipe M41, the input end that the drain electrode of NMOS pipe M41 is described current mirror, the drain electrode of NMOS pipe M43 is reference current I refoutput terminal.
6. two-way adjustable reference current generating device according to claim 5, it is characterized in that, described current supply switch is adjusted array and is comprised n+1 unit, each unit is comprised of current source I41, switch S 4, current source I42 and switch Q4, electric current in current source I41 and current source I42 equates, an end of current source I41 is connected to power vd D, the other end is connected to one end of switch S 4, the input end of another termination current mirror of switch S 4, one end ground connection GND of current source I42, one end of another termination switch Q4, the input end of another termination current mirror of switch Q4.
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