CN211956253U

CN211956253U - Temperature compensation band gap reference circuit

Info

Publication number: CN211956253U
Application number: CN201922252785.2U
Authority: CN
Inventors: 郑凯华
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 2019-12-12
Filing date: 2019-12-12
Publication date: 2020-11-17
Anticipated expiration: 2029-12-12
Also published as: DE102020214185A1

Abstract

The utility model provides a temperature compensation band gap reference circuit, include: a band-gap reference core circuit for generating a reference voltage based on an external power supply; the first temperature compensation circuit is connected to a first input end of the band-gap reference core circuit and used for generating first compensation currents corresponding to a first temperature range and a second temperature range respectively; a second temperature compensation circuit connected to a second input terminal of the bandgap reference core circuit for generating a second compensation current corresponding to a third temperature range based on the sampled voltage from the first temperature compensation circuit; wherein the bandgap reference core circuit (100) outputs the reference voltage that is compensated for temperature generated voltage drifts in the first, second, and third temperature ranges based on the first and second compensation currents.

Description

Temperature compensation band gap reference circuit

Technical Field

The invention belongs to the technical field of analog integrated circuits, and particularly relates to a high-order temperature compensation band gap reference circuit.

Background

The bandgap reference circuit is a common and important integrated circuit module in analog integrated circuit design, and its function is to generate a stable voltage as a reference voltage for other modules to use as a reference voltage. The requirements for the reference voltage in the integrated circuit are that the output precision is high and the output voltage does not change with the conditions of temperature, process, etc. Therefore, how to ensure that the output voltage value of the band-gap reference circuit has high precision, constant size and small temperature variation characteristic is the key point in the design of the band-gap reference circuit.

Fig. 1 is an exemplary schematic diagram of a bandgap reference voltage source structure in the prior art. As shown, a positive temperature coefficient voltage is generated by the difference Δ UBE (i.e., UBE1-UBE2) between the emitter-base voltages of the two transistors T1 and T2, and a negative temperature coefficient voltage is generated by the UBE2 of T2, so that a certain degree of compensation for a voltage offset of the reference voltage Uref output from the operational amplifier OP due to a temperature change can be achieved. Fig. 1B shows a graph of the reference voltage Uref subjected to this temperature compensation. However, it can be seen that the output of the reference voltage Uref subjected to the temperature compensation is greatly affected by the temperature at a low temperature, and then the temperature rises to tend to be stable in output, but the voltage stability rapidly decreases after entering a high temperature region.

Disclosure of Invention

The utility model provides a carry out the band gap reference circuit who compensates respectively according to the temperature range to make this band gap reference circuit can all realize good stable output under each temperature range.

According to the present invention, there is provided a temperature compensated bandgap reference circuit comprising: a band-gap reference core circuit for generating a reference voltage; the first temperature compensation circuit is connected to a first compensation input end of the band-gap reference core circuit and used for generating first compensation currents corresponding to a first temperature range and a second temperature range respectively; a second temperature compensation circuit connected to a second compensation input of the bandgap reference core circuit for generating a second compensation current corresponding to a third temperature range based on the sampled voltage from the first temperature compensation circuit; wherein the bandgap reference core circuit outputs the reference voltage capable of compensating for voltage drifts generated by temperatures within the first, second and third temperature ranges based on the first and second compensation currents.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1A is an exemplary schematic diagram of a bandgap reference circuit according to the prior art;

FIG. 1B is a graph of reference voltage versus temperature for the output of the bandgap reference circuit shown in FIG. 1A;

FIG. 2 is a schematic diagram of a bandgap reference circuit according to the present invention;

FIG. 3 is a schematic diagram of a bandgap reference circuit according to one example of the invention;

FIG. 4A schematically illustrates a voltage-temperature variation graph of the reference voltage alone as acted upon by the first temperature compensation circuit;

FIG. 4B schematically illustrates a current-temperature variation graph output by the second temperature compensation circuit;

fig. 4C schematically shows a comprehensive voltage-temperature variation graph of the reference voltage output by the temperature compensated bandgap reference circuit.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only for the purpose of illustrating the present invention, and are not limitative. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 2 shows a schematic diagram of a bandgap reference circuit according to the present invention. As shown, the bandgap reference circuit includes a bandgap reference core circuit 100, a first temperature compensation circuit 200, and a second temperature compensation circuit 300. The bandgap reference core circuit 100 is used for generating an initial reference voltage Uref based on, for example, an external power supply, where the bandgap reference core circuit 100 may be implemented by any circuit known in the art, for example, by the circuit shown in fig. 1 in this example. The first temperature compensation circuit 200 may be connected to a first compensation input terminal of the bandgap reference core circuit 100 for generating a first compensation current corresponding to a first temperature range and a second temperature range respectively. The second temperature compensation circuit 300 is connected to a second compensation input terminal of the bandgap reference core circuit 100 and receives the sampled voltage from the first temperature compensation circuit 200, thereby generating a second compensation current corresponding to a third temperature range. The sampled voltage received from the first temperature compensation circuit 200 is a measured voltage related to the operating temperature of the bandgap reference circuit. Thus, the bandgap reference core circuit 100 compensates the initial reference voltage Uref based on the first compensation current and the second compensation current, thereby eliminating the influence of the voltage drift caused by the temperature in the first, second, and third temperature ranges on the initial reference voltage Uref. According to an example of the present invention, the first temperature compensation circuit 200 may be designed to eliminate the influence of the voltage drift on the reference voltage Uref in a low temperature region of about-40 ℃ to 20 ℃ and in a high temperature region of about 90 ℃ to 150 ℃, and the second temperature compensation circuit 300 may be designed to eliminate the influence of the voltage drift on the reference voltage Uref in a normal operation temperature region of about 20 ℃ to 90 ℃.

Fig. 3 shows, as an example, a configuration diagram of an exemplary specific circuit of the bandgap reference circuit. As shown, the bandgap reference circuit includes a bandgap reference core circuit 100, a first temperature compensation circuit 200, and a second temperature compensation circuit 300. The bandgap reference core circuit 100 includes an operational amplifier OP having a first input terminal, i.e., a negative input terminal, connected to an external power supply through a resistor R1, and a second input terminal, i.e., a positive input terminal, connected to the external power supply through a resistor R2. The output of the operational amplifier OP provides an initial reference voltage Uref. The bandgap reference core circuit 100 further includes a primary temperature compensation circuit, which includes transistors T1 and T2 with base-emitter voltages varying with temperature, and resistors R3, R4, R5, and R6, as shown. Specifically, as shown, the collector of the transistor T1 is connected to a first input terminal of the amplifier OP and further connected to an external power source through a resistor R1 to receive power. The emitter of the transistor T1 is connected to ground through a resistor R3 and a resistor R4 connected in series. The transistor T2 has a collector connected to the second input terminal of the amplifier OP and an emitter connected to a node N1 between the resistor R3 and the resistor R4. In this example, the reference voltage Uref is grounded through the series-connected resistors R5 and R6, and the bases of the transistors T1, T2 are both connected to the node N2 between the resistors R5 and R6. Thus, the reference voltage Uref output by the bandgap reference core circuit 100 may be determined as:

U_ref＝[U_BE2+ΔU_BE*(R₄/R₃)]*(1+R₅/R₆)。

wherein U is_BE2Represents the base-emitter voltage in transistor T2, and Δ U_BERepresenting the base-emitter voltage U in transistor T1_BE1And the voltage U between the base electrode and the emitter electrode in the triode T2_BE2The voltage difference between them. As previously mentioned, Δ U_BEIs a voltage with a positive temperature coefficient, i.e. increasing with increasing temperature and decreasing with decreasing temperature. UBE2 is a voltage with a negative temperature coefficient that decreases with increasing temperature and increases with decreasing temperature. With the primary temperature compensation circuit thus configured, the bandgap reference core circuit 100 can achieve a preliminary compensation of the influence of temperature variations on the reference voltage Uref over the entire temperature range, and fig. 1B shows a voltage-temperature characteristic of the reference voltage Uref in the case where only the bandgap reference core circuit 100 is present. As can be seen from fig. 1B, the reference voltage is still greatly affected by the temperature in the low temperature region and the high temperature region.

According to the present example, the first temperature compensation circuit 200 is used to compensate the deficiency of the primary temperature compensation circuit in the bandgap reference core circuit 100 that is insufficient for low temperature and high temperature compensation. As shown, the first temperature compensation circuit 200 includes a transistor M1, a transistor M2, and a transistor T3. The base of the transistor T3 is connected to the collector and receives the reference current lb via the resistor R8, thereby generating the voltage V at the nodes THNH and TKN of the resistor R8_TKNH、V_TKN. The emitter of transistor T3 is connected to ground. The gate of the MOS transistor M2 is connected between the resistor R9 and the resistor R7, the other end of the resistor R9 receives the reference current lb, and the other end of the resistor R7 is grounded. Thus, the reference current lb flows through the resistors R9 and R7 and generates a voltage drop V at the two end nodes TKPH and TKP of the resistor R9_TKPH、V_TKP. Source of MOS transistor M2 and source of MOS transistor M1Pole connected to receive a measurement current IPAT1 that varies with temperature, and drain connected to ground. In this example, the MOS transistors M1, M2 may be of the PMOS type, and the measurement current IPAT1 may be a PTAT current proportional to absolute temperature generated by the bandgap reference core circuit 100.

The gate of the MOS transistor M1 is connected to the base and collector of the transistor T3, the source receives the measurement current IPTAT1, and the drain is connected to the node N2 of the bandgap reference core circuit 100 for providing the temperature compensation current Icomp2 to the bandgap reference core circuit 100, the current Icomp2 is a PTAT current, i.e. it will increase with increasing temperature and decrease with decreasing temperature, and the current Icomp2 can be expressed as:

I_COMP2＝[IPAT1-(U_BE3-Ib*R₇)*Gm]/2

wherein U is_BE3The base-emitter voltage of the transistor T3 is represented, and has a negative temperature coefficient, i.e. inversely proportional to the temperature change, and Gm is the transconductance between the MOS transistors M1 and M2. The current Icomp2 is injected into the bandgap reference core circuit 100 to further compensate for temperature drift in the low and high temperature regions. As shown in the following equation, under the effect of only the first temperature compensation circuit 200, the compensated reference voltage Uref can be represented as:

thus, the voltage V across the TKP node is in the low temperature range, e.g., between-40 deg.C and 20 deg.C_TKPLess than voltage V on node TKN_TKNTherefore, M2 is turned on and M1 is turned off, so that almost no current is generated on the drain of M1, i.e., Icomp2 is close to zero, and thus a reference voltage Uref with zero temperature coefficient can be output, thereby realizing low-temperature compensation. When the voltage at the node TKP is higher than that at the node TKN in a high temperature range, such as 90-150 ℃, the M1 is turned on and the M2 is turned off, so that the current IPAT1 almost completely flows through the drain of the M1, and the compensation current Icomp2 is generated, i.e., Icomp2 is close to IPAT 1. Thus, U at high temperature_BE2、ΔU_BEAnd Icomp2 can still be usedAnd outputting a reference voltage Uref with zero temperature coefficient, thereby realizing high-temperature compensation. Fig. 4A shows a graph of the compensation variation of the reference voltage Uref with respect to the temperature (T) achievable with the bandgap reference core circuit 100 only by the first compensation circuit 200. As can be seen from fig. 4A, almost uniform compensation effect is achieved for both the low temperature region and the high temperature region by the first compensation circuit 200. At the same time, however, the temperature compensation performance is degraded in the intermediate temperature region, i.e., the region of, for example, about 20 ℃ to 90 ℃ at the normal operating temperature. For this reason, in this example, the voltage drift of the intermediate temperature region is compensated for by the second temperature compensation circuit 300. The second temperature compensation circuit 300 is essentially a current temperature filtering circuit, i.e. outputs 0 current at low and high temperatures, i.e. Icomp3 is zero, which has no effect on the reference voltage Uref, and outputs the compensation current Icomp3 at the middle temperature region to improve the temperature compensation effect in the normal operation region.

As shown in fig. 3, the second temperature compensation circuit 300 includes two MOS transistor pairs, i.e. a first MOS transistor pair M3-M4 and a second MOS transistor pair M5-M6, in this case, the MOS transistors M3-M4 and the MOS transistors M5-M6 may be PMOS transistors. The first stage MOS transistor pair M3-M4 is respectively sampled by the node TKPH and the sampled voltage V on TKNH on the first temperature compensation circuit 200_TKPH、V_TKNHThe second stage MOS transistor pair M5-M6 is biased by the voltage V sampled at the nodes TKP and TKN of the first temperature compensation circuit 200_TKN、V_TKPAnd (4) biasing. It will be understood that the voltage V is sampled by the resistors R8 and R9_TKPH、V_TKNHRespectively than the sampling voltage V on the nodes TKP and TKN_TKN、V_TKPHigh, typically above about 700mV or so. Specifically, as shown, the MOS transistor M3 in the first MOS transistor pair is connected to the source of the MOS transistor M4 and receives the measurement current IPAT2 of the temperature variation, and the gate of the MOS transistor M3 receives the sampling voltage V from the first temperature compensation circuit 200_TKPH. In addition, the drain of the MOS transistor M3 is grounded. The grid of the MOS transistor M4 receives the sampled voltage V at the node TKNH in the compensation circuit 200_TKNH. The sources of MOS transistor M5 and M6 in the MOS transistor pair M5-M6 are connected to the drain of MOS transistor M4, and the gate of MOS transistor M5 is received at the node TKP in the compensation circuit 200Voltage V of_TKPAnd the drain outputs a temperature compensation current Icomp 3. The gate of the MOS transistor M6 receives the sampled voltage V at the node TKN in the compensation circuit 200_TKNAnd the drain is grounded. In one example of the present invention, the measurement current IPAT2 may be a proportional to absolute temperature PTAT current generated by the bandgap reference core circuit 100, and the current IPAT2 may be the same or different than the current IPAT1 used by the temperature compensation circuit 200.

For the temperature compensation circuit 300, when the circuit is in a low temperature region of-40 ℃ to 20 ℃, for example, the sampling voltage at TKN is higher than that at TKP, and at the same time, the sampling voltage at TKNH is higher than that at TKPH, so MOS transistor M3 is turned on, and thus the current IPAT2 is shorted to ground, and no current is generated from the drain of M5, i.e. I at this time_comp3Close to 0. The sampled voltage V at TKN when in a high temperature region of, for example, 90 deg.C-150 deg.C_TKNSampled voltage V lower than TKP_TKPAt the same time, the sampled voltage V at TKNH_TKNHSampling voltage V lower than TKPH_TKPHTherefore, the MOS transistor M6 is turned on, and even though the current IPAT2 flows out through M4, it is shorted to ground by M6, and thus no current is generated from the drain of M5, i.e. I at this time_comp3Close to 0. Only in an intermediate temperature range, e.g., about 20-90 c, will a non-zero current flow through M4 and M5 as the temperature compensation current I_comp3Output, the compensation current I_comp3Can be determined by the following formula:

I_COMP3＝{[IPAT2-(U_BE3-Ib*R₇)*Gm₃]/2-(Ib*R₇-U_BE3)*Gm₅}/2

wherein Gm₃Represents the transconductance between MOS transistors M3 and M4, and Gm₅The transconductance between MOS transistors M5 and M6 is shown.

FIG. 4B shows the compensation current I generated by the temperature compensation circuit 300_comp3Graph with temperature (T). Compensating current I_comp3Injected into the node N2 of the bandgap reference core circuit 100, i.e., between the resistors R5 and R6, raises the voltage drop across the resistor R6, thereby achieving drift compensation for Uref in the intermediate temperature region. The following equation 5 showsThe reference voltage Uref determined by the temperature compensation process of the

temperature compensation circuits

200 and 300 is shown:

FIG. 4C shows the compensation currents I respectively outputted from the temperature compensation circuit 200 and the temperature compensation circuit 300_comp2、I_comp3Combined, the resulting graph of the reference voltage Uref. Compared with fig. 4B, it can be seen that the temperature compensation bandgap reference circuit retains the compensation effect generated by the temperature compensation circuit 200 in the low temperature and high temperature ranges, but at the same time, the temperature compensation circuit 300 is utilized to improve the problem that the compensation effect of the temperature compensation circuit 200 in the middle temperature range is not ideal. Thus, the temperature-compensated bandgap reference circuit of the present invention can obtain a stable reference voltage Uref that outputs a lower temperature drift characteristic over the entire temperature range.

While the invention has been shown and described in detail in the drawings and in the preferred embodiments, it is not intended to limit the invention to the embodiments disclosed, and it will be apparent to those skilled in the art that various combinations of code auditing means in the various embodiments described above may be used to obtain further embodiments of the invention, which are also within the scope of the invention.

Claims

1. A temperature compensated bandgap reference circuit, comprising:

a bandgap reference core circuit (100) for generating a reference voltage;

a first temperature compensation circuit (200) connected to a first compensation input of the bandgap reference core circuit for generating a first compensation current corresponding to a first temperature range and a second temperature range, respectively;

a second temperature compensation circuit (300) connected to a second compensation input of the bandgap reference core circuit (100) for generating a second compensation current corresponding to a third temperature range based on the sampled voltage from the first temperature compensation circuit (200);

wherein the bandgap reference core circuit (100) outputs the reference voltage that is compensated for temperature generated voltage drifts in the first, second, and third temperature ranges based on the first and second compensation currents.

2. The temperature-compensated bandgap reference circuit of claim 1, wherein the first temperature range is a low temperature region comprising about-40 ℃ to about 20 ℃, the second temperature range is a high temperature region comprising about 90 ℃ to about 150 ℃, and the third temperature range is a normal operating temperature region comprising about 20 ℃ to about 90 ℃.

3. The temperature-compensated bandgap reference circuit of claim 1, wherein the first temperature compensation circuit receives a reference current and a first current proportional to absolute temperature to generate a sampled voltage for the first temperature compensation circuit (200);

the second temperature compensation circuit receives a second current proportional to absolute temperature and the sampling voltage and generates a second compensation current based on the second current under the control of the sampling voltage.

4. The temperature-compensated bandgap reference circuit of claim 3, wherein the bandgap reference core circuit (100) generates the first and second currents.

5. The temperature-compensated bandgap reference circuit of one of claims 1 to 4, wherein the bandgap reference core circuit (100) comprises:

an operational amplifier having a first input terminal connected to a power supply through a first resistor (R1), a second input terminal connected to the power supply through a second resistor (R2), and an output terminal grounded through a third resistor (R5) and a fourth resistor (R6) connected in series to output the reference voltage;

a first triode (T1), the collector of which is connected to the first input terminal, and the emitter of which is connected to the ground through a fifth resistor (R3) and a sixth resistor (R4) which are connected in series;

a second transistor (T2), having a collector connected to the second input terminal and an emitter connected to a first node between the fifth resistor and the sixth resistor, the first node being a first compensation input terminal of the bandgap reference core circuit (100);

the base electrodes of the first triode and the second triode are connected to a second node between the third resistor and the fourth resistor, and the second node is a second compensation input end of the band-gap reference core circuit.

6. The temperature-compensated bandgap reference circuit of claim 3 or 4, wherein the sampled voltage generated by the first temperature compensation circuit comprises: a first sampling voltage (V) generated by using the reference current_TKNH) A second sampling voltage (V)_TKN) The third sampling voltage (V)_TKPH) The fourth sampling voltage (V)_TKP) Wherein the first sampled voltage differs from the second sampled voltage by a voltage difference determined by a seventh resistor (R8), and the third sampled voltage differs from the fourth sampled voltage by a voltage difference determined by an eighth resistor (R9);

wherein the first temperature compensation circuit generates the first temperature compensation current based on the second and fourth sampling voltages;

the second temperature compensation circuit generates the second temperature compensation current based on the first, second, third, and fourth sampling voltages.

7. The temperature-compensated bandgap reference circuit of claim 6, wherein the first temperature compensation circuit comprises:

a first MOS transistor (M1), a second MOS transistor (M2) and a third transistor (T3), wherein

The grid electrode of the first MOS tube is connected to the base electrode and the collector electrode of the third triode, the source electrode of the first MOS tube receives the first current, and the drain electrode of the first MOS tube is used for outputting the first temperature compensation current;

the grid electrode of the second MOS tube is connected between the eighth resistor (R9) and one end of a ninth resistor (R7), wherein the other end of the eighth resistor (R9) receives the reference current, the other end of the ninth resistor is grounded, the third and fourth sampling voltages respectively correspond to the voltage at the two ends of the eighth resistor, the source electrode of the second MOS tube is connected with the source electrode of the first MOS tube, and the drain electrode of the second MOS tube is grounded;

the base of the third triode is connected with the collector and receives the reference current through the seventh resistor (R8), wherein the first and second sampling voltages respectively correspond to the voltage at two ends of the seventh resistor, and the emitter of the third triode is grounded.

8. The temperature-compensated bandgap reference circuit of claim 7, wherein the second temperature compensation circuit comprises:

a first MOS tube pair, wherein a third MOS tube (M3) in the first MOS tube pair is connected with a source electrode of a fourth MOS tube (M4) for receiving the second current, a grid electrode of the third MOS tube receives a third sampling voltage, and a drain electrode of the third MOS tube is grounded; the grid electrode of the fourth MOS tube (M4) receives the first sampling voltage;

the sources of the fifth MOS transistor (M5) and the sixth MOS transistor (M6) in the second MOS transistor pair are connected to the drain of the fourth MOS transistor (M4),

the grid electrode of the fifth MOS tube receives the fourth sampling voltage, and the drain electrode outputs the second temperature compensation current; the grid electrode of the sixth MOS tube receives the second sampling voltage, and the drain electrode of the sixth MOS tube is grounded.

9. The temperature-compensated bandgap reference circuit of claim 8, wherein said first and second MOS transistor pairs are of PMOS type.