CN103208519B - 与5伏cmos工艺兼容的nldmos结构及其制法 - Google Patents
与5伏cmos工艺兼容的nldmos结构及其制法 Download PDFInfo
- Publication number
- CN103208519B CN103208519B CN201210008147.6A CN201210008147A CN103208519B CN 103208519 B CN103208519 B CN 103208519B CN 201210008147 A CN201210008147 A CN 201210008147A CN 103208519 B CN103208519 B CN 103208519B
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- nldmos
- cmos technology
- drift region
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- 238000005516 engineering process Methods 0.000 title claims abstract description 37
- 238000000034 method Methods 0.000 title claims abstract description 26
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 36
- 229920005591 polysilicon Polymers 0.000 claims abstract description 36
- 238000002955 isolation Methods 0.000 claims abstract description 20
- 238000009825 accumulation Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical group [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 230000003647 oxidation Effects 0.000 claims description 7
- 238000007254 oxidation reaction Methods 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000000428 dust Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000002347 injection Methods 0.000 claims description 4
- 239000007924 injection Substances 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 210000003323 beak Anatomy 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000035755 proliferation Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210008147.6A CN103208519B (zh) | 2012-01-12 | 2012-01-12 | 与5伏cmos工艺兼容的nldmos结构及其制法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210008147.6A CN103208519B (zh) | 2012-01-12 | 2012-01-12 | 与5伏cmos工艺兼容的nldmos结构及其制法 |
Publications (2)
Publication Number | Publication Date |
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CN103208519A CN103208519A (zh) | 2013-07-17 |
CN103208519B true CN103208519B (zh) | 2015-12-09 |
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Family Applications (1)
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CN201210008147.6A Active CN103208519B (zh) | 2012-01-12 | 2012-01-12 | 与5伏cmos工艺兼容的nldmos结构及其制法 |
Country Status (1)
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CN (1) | CN103208519B (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104319289A (zh) * | 2014-09-30 | 2015-01-28 | 上海华虹宏力半导体制造有限公司 | Nldmos器件及其制造方法 |
CN108054202B (zh) * | 2015-02-13 | 2020-11-03 | 杰华特微电子(杭州)有限公司 | 一种半导体结构及其形成方法 |
CN106298935B (zh) * | 2016-08-16 | 2019-08-13 | 上海华虹宏力半导体制造有限公司 | Ldmos器件及其制造方法 |
CN111883484B (zh) * | 2020-08-14 | 2023-10-20 | 上海华虹宏力半导体制造有限公司 | 开关ldmos器件的制造方法 |
CN112018187B (zh) * | 2020-09-28 | 2022-12-06 | 上海华虹宏力半导体制造有限公司 | Ldmos器件及其制造方法 |
CN114512407B (zh) * | 2022-04-20 | 2022-07-12 | 北京芯可鉴科技有限公司 | Ldmosfet的制作方法及结构 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102054864A (zh) * | 2009-11-05 | 2011-05-11 | 上海华虹Nec电子有限公司 | Ldmos及其制造方法 |
CN102088022A (zh) * | 2009-12-03 | 2011-06-08 | 上海华虹Nec电子有限公司 | Ldmos及其制造方法 |
CN102122668A (zh) * | 2010-01-11 | 2011-07-13 | 世界先进积体电路股份有限公司 | 半导体结构及其制造方法 |
CN103199109A (zh) * | 2012-01-09 | 2013-07-10 | 上海华虹Nec电子有限公司 | 一种nldmos器件及其制造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7205630B2 (en) * | 2004-07-12 | 2007-04-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for a semiconductor device having low and high voltage transistors |
-
2012
- 2012-01-12 CN CN201210008147.6A patent/CN103208519B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102054864A (zh) * | 2009-11-05 | 2011-05-11 | 上海华虹Nec电子有限公司 | Ldmos及其制造方法 |
CN102088022A (zh) * | 2009-12-03 | 2011-06-08 | 上海华虹Nec电子有限公司 | Ldmos及其制造方法 |
CN102122668A (zh) * | 2010-01-11 | 2011-07-13 | 世界先进积体电路股份有限公司 | 半导体结构及其制造方法 |
CN103199109A (zh) * | 2012-01-09 | 2013-07-10 | 上海华虹Nec电子有限公司 | 一种nldmos器件及其制造方法 |
Also Published As
Publication number | Publication date |
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CN103208519A (zh) | 2013-07-17 |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
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ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140110 |
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C41 | Transfer of patent application or patent right or utility model | ||
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Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
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TA01 | Transfer of patent application right |
Effective date of registration: 20140110 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
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C14 | Grant of patent or utility model | ||
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