CN103117355A - 贴片式二极管器件结构 - Google Patents
贴片式二极管器件结构 Download PDFInfo
- Publication number
- CN103117355A CN103117355A CN2013100395849A CN201310039584A CN103117355A CN 103117355 A CN103117355 A CN 103117355A CN 2013100395849 A CN2013100395849 A CN 2013100395849A CN 201310039584 A CN201310039584 A CN 201310039584A CN 103117355 A CN103117355 A CN 103117355A
- Authority
- CN
- China
- Prior art keywords
- lead
- area
- wire bar
- pin area
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
- H01L2224/37011—Shape comprising apertures or cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8434—Bonding interfaces of the connector
- H01L2224/84345—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/84385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
- Motor Or Generator Current Collectors (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
本发明一种贴片式二极管器件结构,包括位于环氧封装体内的第一引线条、第二引线条、连接片和二极管芯片;第一引线条的支撑区与引脚区之间区域设有一第一折弯处,从而使得第一引线条的支撑区低于引脚区;第二引线条的焊接区与引脚区之间区域设有一第二折弯处,从而使得第二引线条的焊接区低于引脚区;连接片的第一焊接端和第二焊接端之间设有第三折弯处,从而使得第一焊接端低于第二焊接端;环氧封装体下表面具有一凸起部,所述引脚区的厚度大于所述凸起部的厚度;所述第三折弯处与第二焊接端之间设置有若干个通孔。本发明二极管器件结构排除了引脚悬空度低于下限的可能性,从而避免了设备异常时悬空度数值超规格下限造成的产品良率损失及漏判造成的产品异常。
Description
技术领域
本发明涉及一种二极管器件,尤其涉及一种贴片式二极管器件结构。
背景技术
整流器是利用二极管的单向导电特性对交流电进行整流,故被广泛应用于交流电转换成直流电的电路中。
现有连接片结构半导体产品通常对连接片无限位或采用简单沟槽结构限位,其缺点为只能对连接片做一个方向的限位,限位的目的在于避免在入炉焊接过程中连接片偏位造成连接片上的连接点偏出芯片焊接区导致产品电性失效。当器件设计要求需要对连接片做更高精度限位时,现有结构无法达到要求,限位的目的在于避免在入炉焊接过程中连接片偏位造成连接片上的连接点偏出芯片焊接区导致产品电性失效。
其次,为保证贴片二极管产品在客户端PCB贴装的工艺稳定性,产品外形通常需要设计出0.05~0.2mm的引脚悬空度。传统工艺主要靠弯脚整型设备模具来保证该悬空度;再次,在设计开发连接片结构半导体产品时,为了提升大功率器件的导电性能同时保证较薄的产品厚度,通常把连接片设计为平板结构,当平板结构的面积大到一定程度时,产品内部形成大型薄壁结构。成型工艺过程中产品内部容易出现注塑气孔,这些气孔可导致产品电性或可靠性失效因此,如何研发一种便于定位的半导体封装结构,能解决上述问题,便成为本领域技术人员努力的方向。因此,如何研发一种贴片式二极管器件结构,能解决上述问题,便成为本领域技术人员努力的方向。
发明内容
本发明目的是提供一种贴片式二极管器件结构,该二极管器件结构排除了引脚悬空度低于下限的可能性,从而避免了设备异常时悬空度数值超规格下限造成的产品良率损失及漏判造成的产品异常;且避免在入炉焊接过程中连接片偏位造成连接片上的连接点偏出芯片焊接区导致产品电性失效和封装注塑中产生气孔的问题,提高了产品电性和可靠性大大提高了良率。
为达到上述目的,本发明采用的技术方案是:一种贴片式二极管器件结构,包括位于环氧封装体内的第一引线条、第二引线条、连接片和二极管芯片,该第一引线条一端是与二极管芯片连接的支撑区,所述二极管芯片一端通过焊锡膏与该支撑区电连接,第一引线条另一端是引脚区,该第一引线条的引脚区作为所述整流器的电流传输端;
所述第二引线条一端是与所述连接片的第一焊接端连接的焊接区,该第二引线条另一端为引脚区,该第二引线条的引脚区作为所述整流器的电流传输端;
所述连接片第二焊接端与二极管芯片另一端通过焊锡膏电连接;
所述第一引线条的支撑区与引脚区之间区域设有一第一折弯处,从而使得第一引线条的支撑区低于引脚区;
所述第二引线条的焊接区与引脚区之间区域设有一第二折弯处,从而使得第二引线条的焊接区低于引脚区;
所述连接片的第一焊接端和第二焊接端之间设有第三折弯处,从而使得第一焊接端低于第二焊接端;
所述环氧封装体下表面具有一凸起部,所述引脚区的厚度大于所述凸起部的厚度;
所述第三折弯处与第二焊接端之间设置有若干个通孔;
所述第二引线条的焊接区两侧设有挡块。
上述技术方案中进一步改进的方案如下:
1. 上述方案中,所述第二折弯处与第二焊接端夹角为125°~145°。
2. 上述方案中,所述第二引线条的焊接区的面积大于所述第一焊接端的面积。
由于上述技术方案运用,本发明与现有技术相比具有下列优点和效果:
本发明贴片式二极管器件结构,其环氧封装体下表面具有一凸起部,所述引脚区的厚度大于所述凸起部的厚度,即引脚厚度尺寸和本体限位尺寸的匹配排除了引脚悬空度低于下限的可能性,从而避免了设备异常时悬空度数值超规格下限造成的产品良率损失及漏判造成的产品异常;其次,其避免在入炉焊接过程中连接片偏位造成连接片上的连接点偏出芯片焊接区导致产品电性失效,大大提高了;且连接片限位精度的提升使得芯片的性能得以充分发挥,可以用较小尺寸晶粒替代原有大尺寸晶粒,进一步降低制造成本;再次,其第二折弯处与焊接区之间设置有若干个通孔,避免了封装注塑中产生气孔的问题和在炉焊接过程中连接片偏位,从而提高了产品电性和可靠性。
附图说明
附图1为本发明贴片式二极管器件结构局部示意图;
附图2为附图1的仰视结构示意图;
附图3为本发明贴片式二极管器件结构示意图。
以上附图中:1、第一引线条;2、第二引线条;3、连接片;31、第一焊接端;32、第二焊接端;4、二极管芯片;5、支撑区;61、引脚区;62、引脚区;7、焊接区;8、挡块;9、第一折弯处;10、第二折弯处;11、第三折弯处;12、环氧封装体;13、凸起部;14、通孔。
具体实施方式
下面结合附图及实施例对本发明作进一步描述:
实施例:一种贴片式二极管器件结构,如附图1~3所示,包括位于环氧封装体12内的第一引线条1、第二引线条2、连接片3和二极管芯片4,该第一引线条1一端是与二极管芯片4连接的支撑区5,所述二极管芯片4一端通过焊锡膏与该支撑区5电连接,第一引线条1另一端是引脚区61,该第一引线条1的引脚区61作为所述整流器的电流传输端;
所述第二引线条2一端是与所述连接片3的第一焊接端31连接的焊接区7,该第二引线条2另一端为引脚区62,该第二引线条2的引脚区62作为所述整流器的电流传输端;
所述连接片3第二焊接端32与二极管芯片4另一端通过焊锡膏电连接;
所述第一引线条1的支撑区5与引脚区61之间区域设有一第一折弯处9,从而使得第一引线条1的支撑区5低于引脚区61;
所述第二引线条2的焊接区7与引脚区6之间区域设有一第二折弯处10,从而使得第二引线条2的焊接区7低于引脚区62;
所述第二引线条2的焊接区7两侧设有挡块8;所述环氧封装体12下表面具有一凸起部13,所述引脚区61、62的厚度C大于所述凸起部的厚度A;限位尺寸B、引脚区61、62的厚度C、凸起部的厚度A符合以下公式:C-B>悬空度规格下限时,可完全避免引脚悬空度超规格下限。
所述连接片3的第一焊接端31和第二焊接端32之间设有第三折弯处11,从而使得第一焊接端低于第二焊接端。
所述第三折弯处11与第二焊接端32之间设置有若干个通孔14;
上述第二引线条2的焊接区7的面积大于所述第一焊接端31的面积。
上述第二折弯处11与第二焊接端32夹角为125°~145°
采用上述贴片式二极管器件结构时,其环氧封装体下表面具有一凸起部,所述引脚区的厚度大于所述凸起部的厚度,即引脚厚度尺寸和本体限位尺寸的匹配排除了引脚悬空度低于下限的可能性,从而避免了设备异常时悬空度数值超规格下限造成的产品良率损失及漏判造成的产品异常;其次,其避免在入炉焊接过程中连接片偏位造成连接片上的连接点偏出芯片焊接区导致产品电性失效,大大提高了良率;且连接片限位精度的提升使得芯片的性能得以充分发挥,可以用较小尺寸晶粒替代原有大尺寸晶粒,进一步降低制造成本;再次,其第二折弯处与焊接区之间设置有若干个通孔,避免了封装注塑中产生气孔的问题和在炉焊接过程中连接片偏位,从而提高了产品电性和可靠性。
上述实施例只为说明本发明的技术构思及特点,其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施,并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰,都应涵盖在本发明的保护范围之内。
Claims (3)
1.一种贴片式二极管器件结构,包括位于环氧封装体(12)内的第一引线条(1)、第二引线条(2)、连接片(3)和二极管芯片(4),该第一引线条(1)一端是与二极管芯片(4)连接的支撑区(5),所述二极管芯片(4)一端通过焊锡膏与该支撑区(5)电连接,第一引线条(1)另一端是引脚区(61),该第一引线条(1)的引脚区(61)作为所述整流器的电流传输端;
所述第二引线条(2)一端是与所述连接片(3)的第一焊接端(31)连接的焊接区(7),该第二引线条(2)另一端为引脚区(62),该第二引线条(2)的引脚区(62)作为所述整流器的电流传输端;
所述连接片(3)第二焊接端(32)与二极管芯片(4)另一端通过焊锡膏电连接;其特征在于:
所述第一引线条(1)的支撑区(5)与引脚区(61)之间区域设有一第一折弯处(9),从而使得第一引线条(1)的支撑区(5)低于引脚区(61);
所述第二引线条(2)的焊接区(7)与引脚区(62)之间区域设有一第二折弯处(10),从而使得第二引线条(2)的焊接区(7)低于引脚区(62);
所述连接片(3)的第一焊接端(31)和第二焊接端(32)之间设有第三折弯处(11),从而使得第一焊接端低于第二焊接端;
所述环氧封装体(12)下表面具有一凸起部(13),所述引脚区(61、62)的厚度大于所述凸起部的厚度;
所述第三折弯处(11)与第二焊接端(32)之间设置有若干个通孔(14);
所述第二引线条(2)的焊接区(7)两侧设有挡块(8)。
2.根据权利要求1所述的二极管器件结构,其特征在于:所述第二引线条(2)的焊接区(7)的面积大于所述第一焊接端(31)的面积。
3.根据权利要求1所述的二极管器件结构,其特征在于:所述第二折弯处(11)与第二焊接端(32)夹角为125°~145°。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610637959.5A CN106449540B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流芯片 |
CN201610637882.1A CN106449539B (zh) | 2013-02-01 | 2013-02-01 | 防偏位贴片式半导体器件结构 |
CN201610636090.2A CN106449538B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流器件结构 |
CN201310039584.9A CN103117355B (zh) | 2013-02-01 | 2013-02-01 | 贴片式二极管器件结构 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310039584.9A CN103117355B (zh) | 2013-02-01 | 2013-02-01 | 贴片式二极管器件结构 |
Related Child Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610636090.2A Division CN106449538B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流器件结构 |
CN201610637882.1A Division CN106449539B (zh) | 2013-02-01 | 2013-02-01 | 防偏位贴片式半导体器件结构 |
CN201610637959.5A Division CN106449540B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流芯片 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103117355A true CN103117355A (zh) | 2013-05-22 |
CN103117355B CN103117355B (zh) | 2016-08-24 |
Family
ID=48415673
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610636090.2A Active CN106449538B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流器件结构 |
CN201610637959.5A Active CN106449540B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流芯片 |
CN201610637882.1A Active CN106449539B (zh) | 2013-02-01 | 2013-02-01 | 防偏位贴片式半导体器件结构 |
CN201310039584.9A Active CN103117355B (zh) | 2013-02-01 | 2013-02-01 | 贴片式二极管器件结构 |
Family Applications Before (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610636090.2A Active CN106449538B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流器件结构 |
CN201610637959.5A Active CN106449540B (zh) | 2013-02-01 | 2013-02-01 | 贴片式整流芯片 |
CN201610637882.1A Active CN106449539B (zh) | 2013-02-01 | 2013-02-01 | 防偏位贴片式半导体器件结构 |
Country Status (1)
Country | Link |
---|---|
CN (4) | CN106449538B (zh) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103383929A (zh) * | 2013-07-12 | 2013-11-06 | 苏州固锝电子股份有限公司 | 高可靠性整流器件 |
CN103383932A (zh) * | 2013-07-12 | 2013-11-06 | 苏州固锝电子股份有限公司 | 用于提高芯片电性能的封装结构 |
CN106158980A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型表面贴装半导体整流器件 |
CN106158766A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型贴装整流半导体器件 |
CN106158767A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型表面贴装式二极管器件 |
CN106158802A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 超薄型表面贴装整流器 |
CN106158779A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 低功耗半导体整流器件 |
WO2018024044A1 (zh) * | 2016-08-05 | 2018-02-08 | 苏州固锝电子股份有限公司 | 紧凑设计型整流桥结构 |
CN111584695A (zh) * | 2019-02-19 | 2020-08-25 | 江苏罗化新材料有限公司 | 一种散热型芯片级led封装方法及其封装结构 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080054420A1 (en) * | 2006-08-23 | 2008-03-06 | Semiconductor Components Industries, Llc. | Semiconductor package structure and method of manufacture |
CN101521188A (zh) * | 2009-04-07 | 2009-09-02 | 昆山东日半导体有限公司 | 导线架结构及其构成的表面黏着型半导体封装结构 |
CN101937898A (zh) * | 2010-08-12 | 2011-01-05 | 苏州固锝电子股份有限公司 | 一种用于防潮的整流器结构 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4935803A (en) * | 1988-09-09 | 1990-06-19 | Motorola, Inc. | Self-centering electrode for power devices |
CN201812814U (zh) * | 2010-07-27 | 2011-04-27 | 苏州固锝电子股份有限公司 | 一种用于防止二极管芯片漂移的整流器 |
CN102263094A (zh) * | 2011-08-14 | 2011-11-30 | 绍兴旭昌科技企业有限公司 | 非互联型多芯片封装二极管 |
-
2013
- 2013-02-01 CN CN201610636090.2A patent/CN106449538B/zh active Active
- 2013-02-01 CN CN201610637959.5A patent/CN106449540B/zh active Active
- 2013-02-01 CN CN201610637882.1A patent/CN106449539B/zh active Active
- 2013-02-01 CN CN201310039584.9A patent/CN103117355B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080054420A1 (en) * | 2006-08-23 | 2008-03-06 | Semiconductor Components Industries, Llc. | Semiconductor package structure and method of manufacture |
CN101521188A (zh) * | 2009-04-07 | 2009-09-02 | 昆山东日半导体有限公司 | 导线架结构及其构成的表面黏着型半导体封装结构 |
CN101937898A (zh) * | 2010-08-12 | 2011-01-05 | 苏州固锝电子股份有限公司 | 一种用于防潮的整流器结构 |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103383929A (zh) * | 2013-07-12 | 2013-11-06 | 苏州固锝电子股份有限公司 | 高可靠性整流器件 |
CN103383932A (zh) * | 2013-07-12 | 2013-11-06 | 苏州固锝电子股份有限公司 | 用于提高芯片电性能的封装结构 |
CN105826290A (zh) * | 2013-07-12 | 2016-08-03 | 苏州固锝电子股份有限公司 | 低功耗半导体整流器件 |
CN106409804A (zh) * | 2013-07-12 | 2017-02-15 | 苏州固锝电子股份有限公司 | 高可靠性半导体器件 |
CN106158980A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型表面贴装半导体整流器件 |
CN106158766A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型贴装整流半导体器件 |
CN106158767A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 微型表面贴装式二极管器件 |
CN106158802A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 超薄型表面贴装整流器 |
CN106158779A (zh) * | 2016-08-03 | 2016-11-23 | 苏州市职业大学 | 低功耗半导体整流器件 |
WO2018024044A1 (zh) * | 2016-08-05 | 2018-02-08 | 苏州固锝电子股份有限公司 | 紧凑设计型整流桥结构 |
CN111584695A (zh) * | 2019-02-19 | 2020-08-25 | 江苏罗化新材料有限公司 | 一种散热型芯片级led封装方法及其封装结构 |
Also Published As
Publication number | Publication date |
---|---|
CN103117355B (zh) | 2016-08-24 |
CN106449538A (zh) | 2017-02-22 |
CN106449540A (zh) | 2017-02-22 |
CN106449539B (zh) | 2019-08-02 |
CN106449538B (zh) | 2019-07-02 |
CN106449539A (zh) | 2017-02-22 |
CN106449540B (zh) | 2019-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103117355A (zh) | 贴片式二极管器件结构 | |
US9472491B2 (en) | Semiconductor package with small gate clip and assembly method | |
CN203118937U (zh) | 便于定位的半导体封装结构 | |
CN104617073A (zh) | 用于小信号的二极管器件 | |
CN203118934U (zh) | 贴片式二极管器件 | |
CN203118997U (zh) | 防偏位的二极管器件 | |
CN203118995U (zh) | 防气孔型二极管器件 | |
CN103383932A (zh) | 用于提高芯片电性能的封装结构 | |
US9065030B2 (en) | Diode package having improved lead wire and manufacturing method thereof | |
CN103904552A (zh) | 投影用激光芯片封装结构 | |
CN103928419A (zh) | 引线框 | |
CN203367266U (zh) | 用于缓冲芯片表面焊料用量的封装结构 | |
CN203573978U (zh) | 芯片封装结构 | |
CN203367267U (zh) | 自适应焊料用量的整流器结构 | |
US8553742B1 (en) | Laser chip package structure | |
CN204441274U (zh) | 具有新型连接片的二极管器件 | |
CN203118996U (zh) | 具有防偏位功能的二极管结构 | |
JP2014096497A5 (zh) | ||
CN209461455U (zh) | 串联式二极管封装结构 | |
CN204464265U (zh) | 高可靠性整流芯片的封装结构 | |
CN202796930U (zh) | 用于mosfet芯片的封装体 | |
CN103327737A (zh) | 芯片组装结构及芯片组装方法 | |
CN203351586U (zh) | 封装结构 | |
CN203644793U (zh) | 一种抗温度冲击的二极管 | |
CN219800829U (zh) | 一种杜绝空焊气密性高半导体 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |