CN103022011B - 半导体封装结构及其制造方法 - Google Patents

半导体封装结构及其制造方法 Download PDF

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CN103022011B
CN103022011B CN201110288553.8A CN201110288553A CN103022011B CN 103022011 B CN103022011 B CN 103022011B CN 201110288553 A CN201110288553 A CN 201110288553A CN 103022011 B CN103022011 B CN 103022011B
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杨俊�
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- Core Of Electronic Science And Technology (zhongshan) Co Ltd
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Abstract

一种半导体封装结构，包括基板单元、芯片、金属导体、封胶体及屏蔽层。所述基板单元包括多个接地连接部并设有连接所述接地连接部的通孔，所述通孔内涂布导电膜以使所述接地连接部接地。所述芯片固定并电性连接于所述基板单元，所述接地连接部位于所述芯片的周围。所述金属导体固定于所述接地连接部并包围所述芯片，以实现接地。所述封胶体封装所述芯片并部分封装所述金属导体。所述屏蔽层覆盖于所述封胶体及所述金属导体之未封装部分，以与所述金属导体共同实现对所述芯片进行电磁屏蔽。本发明还提供了一种半导体封装结构的制造方法。

Description

半导体封装结构及其制造方法
技术领域
本发明涉及一种半导体封装结构，尤其是一种具有电磁干扰屏蔽功能的半导体封装结构及其制造方法。
背景技术
由于射频封装结构容易受到外界的电磁干扰，当其被安装在电路板上时，应特别注意相互间的干扰，以免运作发生异常。
常见的半导体封装结构包括间隔垫层、设于间隔垫层上的芯片以及一组围绕在间隔垫层周围的引脚，通过焊线电性连接芯片与引脚。为了达到屏蔽的效果，在芯片上方罩设屏蔽组件，并使屏蔽组件的周缘与引脚电性连接，同时加以接地，如此，与外界接地线路连接的屏蔽组件能够屏蔽芯片以免受到外界的电磁干扰。为了保护芯片以及其他组件，利用封胶体包覆芯片及屏蔽组件。上述封装结构虽然具有屏蔽电磁干扰的效果，但仍需一个额外的电磁屏蔽组件，因此，增加了生产成本以及制程上的复杂度。
发明内容
有鉴于此，需提供一种具有电磁干扰屏蔽功能的半导体封装结构。
本发明一种实施方式中的半导体封装结构包括基板单元、芯片、金属导体、封胶体及屏蔽层。所述基板单元包括多个接地连接部并设有连接所述接地连接部的通孔，所述通孔内涂布导电膜以使所述接地连接部接地。所述芯片固定并电性连接于所述基板，所述接地连接部位于所述芯片的周围。所述金属导体固定于所述接地连接部并包围所述芯片，以实现接地。所述封胶体封装所述芯片并部分封装所述金属导体。所述屏蔽层覆盖于所述封胶体及所述金属导体之未封装部分，以与所述金属导体共同实现对所述芯片进行电磁屏蔽。
优选地，所述基板设有间隔垫层及多个焊垫，所述焊垫位于所述间隔垫层与所述接地连接部之间，所述芯片固定安装于所述间隔垫层上，并利用连接线将所述芯片电性连接于所述焊垫以使所述芯片电性连接于所述基板。
优选地，所述芯片通过粘合剂固定安装于所述间隔垫层上。
优选地，所述导电膜为铝、铜、铬、锡、金、银、镍或者含有上述元素所组成的合金。
优选地，所述屏蔽层表面还设置有保护层，以保护所述屏蔽层。
本发明一种实施方式中的半导体封装结构的制造方法，包括下列步骤：提供基板，所述基板包括多个基板单元，每个基板单元设置多个接地连接部。设置金属导体于所述接地连接部以接地。设置芯片于所述基板单元并使所述金属导体包围所述芯片。形成封胶体于所述基板上，以包覆所述芯片并部分包覆所述金属导体，所述封胶体与所述金属导体之间形成高度差，从而使得相邻基板单元之间形成凹槽。形成屏蔽层于所述封胶体的表面及所述金属导体之未封装部分，以使所述屏蔽层覆盖整个基板，并通过所述裸露的电极电性连接于所述金属导体。于所述凹槽所在的位置切割，以使所述基板单元分离。
优选地，利用粘合剂将所述芯片固定安装于所述基板，利用连接线将所述芯片电性连接于所述基板单元。
优选地，每个基板单元设置有多个通孔，所述通孔内壁涂布导电膜并连接所述接地连接部以使所述接地连接部接地。
优选地，所述凹槽的截面呈U型。
优选地，形成保护层于所述屏蔽层表面以保护所述屏蔽层，所述保护层由非导电材料制成。
相较于现有技术，本发明之封胶体覆盖芯片并部分包覆所述金属导体，以使设置于封胶体表面的屏蔽层覆盖并电性连接至金属导体之未封装部分，从而实现屏蔽层能屏蔽芯片以防止其遭受电磁干扰。而且，金属导体设置于芯片周围并于基板上形成一定高度，从而屏蔽周围电子组件的电磁干扰。另外，在屏蔽层上设置由非导电材料制成的保护层进而保护屏蔽层。
本发明之封胶体覆盖整个基板并使封胶体与金属导体之间形成高度差而于相邻基板单元之间形成凹槽，在形成屏蔽层和保护层的过程中，无需预先将基板分割为多个基板单元，只需整体设置，从而使制造工序简单化并降低生产成本。
附图说明
图1为本发明之具有电磁干扰屏蔽功能的半导体封装结构的剖面图。
图2a至图2e显示为本发明之具有电磁干扰屏蔽功能的半导体封装结构的制作方法。
主要元件符号说明
半导体封装结构      100
基板单元            10
第一表面            12
第二表面            14
通孔                16
间隔垫层            20
焊垫                21
接地连接部          22
导电膜              30
金属导体            40
裸露部              42
芯片                50
粘合剂              52
连接线              54
封胶体              60
屏蔽层              70
保护层              80
凹槽                82
基板                90
基板单元            92
切割刀              200
下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
图1为本发明之具有电磁干扰屏蔽功能的半导体封装结构100的剖面图，所述封装半导体结构100包括基板单元10、多个金属导体40、芯片50、封胶体60、屏蔽层70以及保护层80。
基板单元10包括第一表面12及与第一表面12相对的第二表面14，第一表面12和第二表面14分别设有相互对应的间隔垫层20、多个焊垫21以及多个接地连接部22。所述焊垫21位于间隔垫层20的周围，所述接地连接部22位于所述焊垫21之远离间隔垫层20的侧边。在本实施方式中，间隔垫层20、焊垫21及接地连接部22的材质相同，均为导电材料，且间隔垫层20的制造方法与焊垫21的制造方法一样，均通过电镀方式生成。在其他实施方式中，间隔垫层20的材质也可为其它热膨胀系数与芯片50接近的导电材料。
基板单元10设有多个穿过第一表面12和第二表面14的通孔16，并于通孔16内壁涂布导电膜30。在本实施方式中，导电膜30可以为铝、铜、铬、锡、金、银、镍或者含有上述元素所组成的合金。其中，一部分通孔16连接第一表面12和第二表面14的接地连接部22，以实现接地连接部22的接地连接。另一部分通孔16连接第一表面12和第二表面14的间隔垫层20，以使间隔垫层20接地。
所述金属导体40固定并电性连接于接地连接部22，并包围所述芯片50，通过通孔16内的导电膜30实现接地。在本实施方式中，所述金属导体40为首尾相连的金属块。在其他实施方式中，所述金属导体40为间隔设置的金属块或者接地电阻，相邻两金属导体40之间的间隙小于5mm。
芯片50固定安装于基板单元10并与金属导体40设于基板单元10的同一表面。在本实施方式中，芯片50为具有射频功能的芯片或微机电系统芯片。具体而言，利用粘合剂52将芯片50的表面固定安装于间隔垫层20上，并利用连接线54将芯片50电性连接于焊垫21以使芯片50电性连接于基板单元10。在本实施方式中，粘合剂52为银胶，连接线54的材质为金、铜、铝或者其他导电材料。
封胶体60设置于基板单元10的第一表面12，以覆盖焊垫21、芯片50、连接线54以及部分包覆金属导体40。此外，封胶体60部分包覆金属导体40以使金属导体40之裸露部42暴露于封胶体60外部。在本实施方式中，封胶体60为黑胶。
为了屏蔽芯片50以防止其遭受电磁干扰，屏蔽层70设置于封胶体60的外表面并覆盖金属导体40之裸露部，以使屏蔽层70电性连接至金属导体40，从而，与所述金属导体40共同实现对所述芯片50进行电磁屏蔽。在本实施方式中，屏蔽层70可以为铝、铜、铬、锡、金、银、镍或者含有上述元素所组成的合金。由于屏蔽层70覆盖住封胶体60，并利用金属导体40与基板单元10的导电膜30电性连接，因此，屏蔽层70能够屏蔽芯片50以防止其遭受电磁干扰。此外，由于金属导体40固定于接地连接部22上以使金属导体40在基板单元10上形成一定高度，因此，金属导体40能够屏蔽周围的电子组件免受电磁干扰。
保护层80喷涂于屏蔽层70之背离封胶体60的表面，以保护屏蔽层70。在本实施方式中，保护层80由非导电材料制成。
图2a至图2e显示为本发明之具有电磁干扰屏蔽功能的半导体封装结构100的制作方法。
请参考图2a，首先提供基板90，所述基板90包括多个基板单元92(仅显示两个以做说明)，各基板单元92均设有间隔垫层20、多个焊垫21以及多个接地连接部22，并设有多个贯通基板单元92的通孔16。所述焊垫21为位于间隔垫层20的周围，所述接地连接部22位于所述焊垫之远离间隔垫层20的侧边，所述通孔16内壁涂布导电膜30。其中，通孔16连接接地连接部22以使接地连接部22接地，通孔16连接间隔垫层20以使间隔垫层20接地。
请参考图2b，设置金属导体40于各基板单元92上，通过接地连接部22将金属导体40接地。
请参考图2c，设置芯片50于各基板单元92上以使所述金属导体40包围所述芯片50，利用粘合剂52将芯片50的表面固定安装于间隔垫层20上，以及利用连接线54将芯片50电性连接于焊垫21以使芯片50电性连接于基板单元92。
请参考图2d，在基板90上形成一个封胶体60，以将芯片50、连接线54及焊垫21包覆，以及将金属导体40部分包覆以使金属导体40之裸露部42暴露于封胶体60外部。由于金属导体40之裸露部42与封胶体60的之间形成高度差，从而使每相邻两个基板单元92之间因高度差而形成凹槽82，在本实施方式中，所述凹槽82呈U型。
请参考图2e，设置屏蔽层70于封胶体60的外表面及金属导体40之裸露部42，使屏蔽层70覆盖整个基板90，并通过裸露部42使屏蔽层70电性连接至金属导体40，从而，屏蔽层70屏蔽芯片50以防止其遭受电磁干扰。在本实施方式中，屏蔽层70由化学气相沉积、化学电镀、电解电镀、喷涂、印刷或者溅渡的方式而形成。
喷涂保护层80于屏蔽层70的外表面，以保护屏蔽层70。
将切割刀200沿凹槽82处进行切割，以使整个半导体封装结构切割成多个相互分离且具电磁干扰屏蔽功能的半导体封装结构100。
本发明之封胶体60覆盖于整个基板90并使金属导体40之裸露部42暴露于封胶体60，从而使封胶体60与裸露部42之间形成高度差而在相邻半导体封装结构之间形成凹槽82，因此，无需预先将基板90分割为多个基板单元92。由于凹槽82的存在，所有的金属导体40之裸露部42裸露在外，将屏蔽层70设置在整个基板90上的封胶体60与裸露部42的表面，以包覆整个基板90，而且屏蔽层70与所有金属导体40电性连接，然后将整个基板90切割形成多个基板单元92，屏蔽层70与金属导体40共同形成屏蔽结构，以屏蔽每个基板单元92上的芯片50之电磁干扰。因此，本发明之半导体封装结构的制造方法不需要对各基板单元92单个进行屏蔽层70和保护层80的设置。这样，可使制造工序简单化并降低生产成本。

Claims (5)

1.一种半导体封装结构的制造方法，其特征在于，所述制造方法包括下列步骤：
a)提供基板，所述基板包括多个基板单元，每个基板单元设置多个接地连接部；
b)设置金属导体于所述接地连接部以接地；
c)设置芯片于所述基板单元并使所述金属导体包围所述芯片；
d)形成封胶体于所述基板上，以包覆所述芯片及并部分包覆所述金属导体，所述封胶体与所述金属导体之间形成高度差，从而使得相邻基板单元之间形成凹槽；以及
e)在步骤d后，形成屏蔽层于所述封胶体的表面及所述金属导体之未封装部分，以使所述屏蔽层覆盖整个基板并电性连接于所述金属导体，于所述凹槽所在的位置切割，以使所述多个基板单元分离。
2.如权利要求1所述的半导体封装结构的制造方法，其特征在于，利用粘合剂将所述芯片固定安装于所述基板，利用连接线将所述芯片电性连接于所述基板单元。
3.如权利要求1所述的半导体封装结构的制造方法，其特征在于，每个基板单元设置有多个通孔，所述通孔内壁涂布导电膜并连接所述接地连接部以使所述接地连接部接地。
4.如权利要求1所述的半导体封装结构的制造方法，其特征在于，所述凹槽的截面呈U型。
5.如权利要求1所述的半导体封装结构的制造方法，其特征在于，形成保护层于所述屏蔽层表面以保护所述屏蔽层，所述保护层由非导电材料制成。
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