CN103021902A - 半导体封装铸模装置及方法 - Google Patents

半导体封装铸模装置及方法 Download PDF

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CN103021902A
CN103021902A CN2011102822558A CN201110282255A CN103021902A CN 103021902 A CN103021902 A CN 103021902A CN 2011102822558 A CN2011102822558 A CN 2011102822558A CN 201110282255 A CN201110282255 A CN 201110282255A CN 103021902 A CN103021902 A CN 103021902A
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depressed part
piston
plate pattern
cope match
substrate
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肖俊义
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AMBIT ELECTRONICS (ZHONGSHAN) Co Ltd
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AMBIT ELECTRONICS (ZHONGSHAN) Co Ltd
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Priority to CN2011102822558A priority Critical patent/CN103021902A/zh
Priority to TW100134688A priority patent/TWI506708B/zh
Priority to US13/293,124 priority patent/US20130071505A1/en
Publication of CN103021902A publication Critical patent/CN103021902A/zh
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    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
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    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
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Abstract

一种半导体封装铸模装置，包括上模板、与上模板相对设置的下模板以及活塞。所述下模板设有多个活塞口以容置所述活塞以及开口朝向所述上模板的凹陷部，所述凹陷部与所述上模板共同形成模具型腔以容置基板。所述上模板设朝所述凹陷部凸出且邻近所述活塞口的突出部，所述突出部靠近所述下模板处设有与所述凹陷部相对的缺口。所述缺口之两侧分别形成与所述活塞口及所述模具型腔相通的入口及出口，以使经所述活塞口注入的封胶，沿所述入口、所述缺口以及所述出口注入所述模具型腔，以包覆所述基板。

Description

半导体封装铸模装置及方法
技术领域
本发明涉及半导体封装，尤其涉及一种半导体封装铸模装置及方法。
背景技术
现有半导体封装铸模装置包括设有模穴的上模板、设有活塞口的下模板、活塞以及容置于上模板和下模板之间的基板，基板上设有多个阵列排列的芯片。每个活塞口两侧分别设置一对流道以连接基板，流道之流道口与基板上的上模板相连接。通过挤压活塞所产生的压力，封胶塑料从活塞口经由流道流向流道口而进入上模板之模穴内。当封胶塑料充满模穴后，活塞保持静止并持续一段时间直至封胶塑料硬化。而后，拉动活塞以打开上模板，取出模制产品。将模制产品之流道及流道口去除后，并切割成单个单元，而完成半导体封装构造。
由于封胶塑料系沿基板之边缘的流道口直接注入上模板之模穴内，使得进入模穴内之模流压力分布较不均匀，易产生冲线、气泡及孔洞等缺陷。此外，因封胶塑料于模穴内之路径较长，封胶塑料受热产生化学变化，造成模穴内前后位置封胶塑料性质差异较大，而影响封胶品质，且需要较长的封胶制程周期。
发明内容
有鉴于此，需提供一种半导体封装铸模装置，可以平衡封胶流速。
本发明一种实施方式中的半导体封装铸模装置，包括上模板、与所述上模板相对设置的下模板以及活塞。所述下模板设有多个活塞口以容置所述活塞及开口朝向所述上模板的凹陷部，所述凹陷部与所述上模板共同形成模具型腔以容置基板。所述上模板设朝所述凹陷部凸出且邻近所述活塞口的突出部，所述突出部靠近所述下模板处设有与所述凹陷部相对的缺口，所述缺口之两侧分别形成与所述活塞口及所述模具型腔相通的入口及出口，以使经所述活塞口注入的封胶，沿所述入口、所述缺口以及所述出口注入所述模具型腔，以包覆所述基板。
优选地，所述缺口之横截面呈梯形、方形、三角形或者圆弧形。
优选地，所述铸模装置设有多个形成于所述活塞口与所述突出部之间的第一流道，所述第一流道与所述活塞口及所述入口相互贯通。
优选地，所述凹陷部包括第一凹陷部和第二凹陷部，所述第一凹陷部位于所述活塞口和所述突出部之间，所述第二凹陷部与所述第一凹陷部相互贯通并与所述模具型腔相通。
优选地，所述基板设有脱胶层，所述脱胶层嵌合于所述基板内并朝向所述上模板，所述基板设有脱胶层的一端收容于所述第一凹陷部以使所述脱胶层邻近所述突出部。
优选地，所述脱胶层包括第一层和第二层，所述第一层由铜制成，所述第二层由氧化铜或者有机保护薄膜制成。
优选地，所述脱胶层为单层结构，且由铜制成。
本发明一种实施方式中的半导体封装铸模方法，包括步骤：提供一种基板；提供一种铸模装置，所述铸模装置包括上模板、与所述上模板相对设置的下模板及活塞，所述下模板设有多个活塞口以容置所述活塞以及开口朝向所述上模板的凹陷部，所述凹陷部与所述上模板共同形成模具型腔以容置所述基板，所述上模板设朝所述凹陷部凸出且邻近所述活塞口的突出部，所述突出部靠近所述下模板处设有与所述凹陷部相对的缺口，所述缺口之两侧分别形成与所述活塞口及所述模具型腔相通的入口及出口；紧密夹紧所述上模板及所述下模板以使所述基板位于所述模具型腔内；将封胶沿所述活塞口注入，推挤所述活塞以使所述封胶沿所述入口、所述缺口以及所述出口注入所述模具型腔内，以包覆所述基板；硬化所述封胶；打开所述铸模装置以取出铸模制品。
优选地，形成多个第一流道，所述第一流道位于所述活塞口与所述突出部之间，并与所述活塞口及所述入口相互贯通。
优选地，所述缺口之横截面呈梯形、方形、三角形或者圆弧形。
相较于现有技术，本发明之铸模装置的上模板设有突出部，以使所述突出部与所述下模板之间形成第二流道，并且所述第二流道包括入口、收容腔及出口，收容腔位于入口与出口之间以收容封胶，以平衡封胶之流速，从而减少注胶过程中产生的气洞。另外，本发明之脱胶层设置于基板之邻近第二流道的一侧，以控制封胶，使其流动及填充更加均匀。而且，本发明之脱胶层采用铜、铜与氧化铜或者铜与有机保护薄膜而制成，以降低制造成本。
附图说明
图1为本发明之半导体封装铸模装置的上视图。
图2为沿图1中II-II剖线之局部剖面侧视图。
图3为本发明之脱胶层与基板之结构示意图。
图4为本发明之铸模装置的结构示意图。
图5为图2中V部分的放大图。
图6为本发明之铸模装置进行封胶制程的示意图。
图7为本发明之铸模装置应用于半导体封装示意图。
主要元件符号说明
基板                            20
脱胶层                          21
第一层                          210
第二层                          212
芯片                            22
焊垫                            23
焊脚                            24
焊线                            25
铸模装置                        40
上模板                          42
突出部                          420
第一挡块                        4200
缺口                            4202
第二挡块                        4204
下模板                          44
活塞口                              440
凹陷部                              442
第一凹陷部                          4420
第二凹陷部                          4422
活塞                                46
第一流道                            41
第二流道                            43
入口                                430
收容腔                              432
出口                                434
模具型腔                            45
封胶                                60
前进方向                            A
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参照图1和图2，适用于封装的基板20，所述基板20的材质可以为玻璃环氧基树脂(Flame-retardant epoxy-glass fabric composite resin，FR-4、RF-5)或者双顺丁烯二酸酰亚胺(Bismaleimide Triazine，BT)。所述基板20上设有多个芯片22、多个焊脚24及多根焊线25。所述芯片22上设有多个焊垫23，并通过焊线25连接焊垫23与焊脚24以使芯片22与基板20电性连接。
基板20之一侧端设有脱胶层21，所述脱胶层21嵌合于基板20内。在本实施方式中，脱胶层21之外露于基板20的表面并与芯片22所在基板20之表面共面。
请参照图3，其中(a)图所示设于基板20上的脱胶层21包括第一层210和第二层212，所述第一层210由铜制成，第二层212由氧化铜或者有机保护薄膜制成，以降低成本。(b)图所示的脱胶层21为单层结构，由铜制成。在其他实施方式中，所述脱胶层21由金或者镍金合金等金属制成。
请参照图1及图2，本发明之一种实施方式中的铸模装置40用于放置基板20，并包括上模板42、与所述上模板42相对设置的下模板44及活塞46。
请参照图4，所述下模板44设有多个活塞口440及凹陷部442，所述活塞口440位于所述凹陷部442的侧边以容置所述活塞46，所述凹陷部442之开口朝向上模板42以容置基板20。所述凹陷部442包括第一凹陷部4420和第二凹陷部4422，所述第一凹陷部4420邻近所述活塞口440，所述第二凹陷部4422与所述第一凹陷部4420相互贯通并远离所述活塞口440。使用时，基板20收容于凹陷部442中，并使设有脱胶层21的一端收容于第一凹陷部4420以及设有芯片22的一端收容于第二凹陷部4422。
所述上模板42设有突出部420，所述突出部420沿所述上模板42朝下模板44之凹陷部442凸出。在本实施方式中，突出部420与所述第二凹陷部4422相对且靠近第一凹陷部4420，也就是说，突出部420靠近基板20之设有脱胶层21的一端。
请参照图5，所述突出部420包括第一挡块4200和第二挡块4204，并设有缺口4202，所述缺口4202位于第一挡块4200与第二挡块4204之间，所述缺口4202之开口方向与所述凹陷部442相对，以使所述突出部420之朝向所述下模板44的一面形成内凹结构。在本实施方式中，所述缺口4202位于第二凹陷部4422之上方并邻近所述第一凹陷部4420，其中第一挡块4200位于所述第一凹陷部4420上方，也就是说，所述缺口4202邻近所述脱胶层21，且第一挡块4200位于脱胶层21上方。
在本实施方式中，所述缺口4202之横截面呈梯形。
在其他实施方式中，所述缺口4202之横截面呈方形、三角形、圆弧形或者其他几何形状。
铸模装置40设有多个第一流道41、第二流道43及模具型腔45，所述第一流道41与活塞口440相通，沿活塞口440延伸至邻近脱胶层21的第一挡块4200。在本实施方式中，一个活塞口440对应于多个第一流道41，例如2个、4个、6个或者其他数量，每个第一流道41对应一个脱胶层21。
第二流道43形成于突出部420与下模板44之间，并位于第一流道41与模具型腔45之间以与第一流道41和模具型腔45相互贯通。第二流道43包括入口430、收容腔432及出口434，所述入口430形成于第一挡块4200与下模板44之间，所述收容腔432形成于所述缺口4202与所述下模板44之间并位于所述入口430与出口434之间，所述出口434形成于第二挡块4204与下模板44之间并位于收容腔432与模具型腔45之间。
在本实施方式中，入口430与出口434的宽度大致相等，且均小于收容腔432之宽度。
模具型腔45形成于上模板42与下模板44之间并与所述凹陷部442相贯通，并自位于第二凹陷部4422上方的凸肋4200沿远离第二流道43的方向延伸，即，模具型腔45对应于收容设有芯片22之基板20的空间。
请参照图6，封胶60经由第一流道41、第二流道43填充至模具型腔45中，以包覆设于基板20上的芯片22。由于突出部420位于第一流道41和模具型腔45之间，且沿上模板42朝下模板44凸出，由此可知，第二流道43的宽度小于第一流道41与模具型腔45的宽度，以降低封胶60之流速。具体而言，当封胶60由第一流道41流入第二流道43中时，首先，封胶60从第一流道41流入入口430中，封胶60受第一挡块4200的作用而使其流速降低，以防止气泡和气洞的产生。其次，封胶60从入口430流入收容腔432中，由于收容腔432之宽度稍大于入口430之宽度，以收容封胶60并使流入的封胶60之流速稳定。最后，封胶从收容腔432流入出口434并流出至模具型腔45中，同样地，封胶60受第二挡块4204的作用而限制其流速，致使流入模具型腔45中的封胶60之流速稳定而且有效地减少气泡和气洞的产生。
由于封胶60之流速降低，在注胶过程中，流动的封胶60不容易冲断焊线25。再者，由于缺口4202靠近脱胶层21，以减少脱胶层21的面积，从而降低生产成本。
使用时，所述上模板42与所述下模板44合模后，沿所述活塞口440向上模板42方向推挤活塞46，将熔融封胶60填满活塞口440及第一流道41，随即挤压活塞46以使熔融封胶60流入第一流道41，并经由第一流道41、第二流道43之入口430、收容腔432及出口434填充至模具型腔45中，熔融封胶60在模具型腔45中沿前进方向A流动直至填满模具型腔45并包覆设于基板20上的芯片22，如图7所示。在本实施方式中，各芯片22之焊垫23垂直于熔融封胶60之前进方向A，而连接焊垫23与焊脚24之间的焊线25平行于熔融封胶60之前进方向A，以减少封胶60对焊线25的影响，从而降低冲断焊线25的机率以增加产品良率。待活塞46保持静止且持续至熔融封胶60硬化，打开铸模装置40以取出封胶制品。
本发明之铸模装置40设有第二流道43连通各第一流道41以及第二流道43设有收容腔432，使各第一流道41内的压力相同，从而使活塞46推挤封胶60时，封胶60可均匀地沿第二流道43注入模具型腔45中。
本发明之脱胶层21设置于第一流道41处并邻近第二流道43，与熔融封胶60硬化后形成的封胶60之间的粘着力小于基板20与封胶60之间的粘着力，所述脱胶层21可有效控制封胶60，以使其流动及填充更加均匀，从而缩短每一封胶制程的周期。当熔融封胶60硬化，并打开铸模装置40后，因脱胶层21与封胶60之间的粘着力小于基板20与封胶60之间的粘着力，因此，贴合于脱胶层21上的封胶60可以轻易剥落，以完成脱胶。本发明之脱胶层21设于收容于第一凹陷部4420的基板20的一端，以增强第一流道41区域内基板20的刚性强度，以避免基板20受压受热发生弯曲变形，导致封胶60流入基板20下方而发生破坏。

Claims (10)

1.一种半导体封装铸模装置，包括上模板、与所述上模板相对设置的下模板以及活塞，所述下模板设有多个活塞口以容置所述活塞以及开口朝向所述上模板的凹陷部，所述凹陷部与所述上模板共同形成模具型腔以容置基板，其特征在于，所述上模板设朝所述凹陷部凸出且邻近所述活塞口的突出部，所述突出部靠近所述下模板处设有与所述凹陷部相对的缺口，所述缺口之两侧分别形成与所述活塞口及所述模具型腔相通的入口及出口，以使经所述活塞口注入的封胶，沿所述入口、所述缺口以及所述出口注入所述模具型腔，以包覆所述基板。
2.如权利要求1所述的半导体封装铸模装置，其特征在于，所述缺口之横截面呈梯形、方形、三角形或者圆弧形。
3.如权利要求1所述的半导体封装铸模装置，其特征在于，所述铸模装置设有多个形成于所述活塞口与所述突出部之间的第一流道，所述第一流道与所述活塞口及所述入口相互贯通。
4.如权利要求1所述的半导体封装铸模装置，其特征在于，所述凹陷部包括第一凹陷部和第二凹陷部，所述第一凹陷部位于所述活塞口和所述突出部之间，所述第二凹陷部与所述第一凹陷部相互贯通并与所述模具型腔相通。
5.如权利要求4所述的半导体封装铸模装置，其特征在于，所述基板设有脱胶层，所述脱胶层嵌合于所述基板内并朝向所述上模板，所述基板设有脱胶层的一端收容于所述第一凹陷部以使所述脱胶层邻近所述突出部。
6.如权利要求5所述的半导体封装铸模装置，其特征在于，所述脱胶层包括第一层和第二层，所述第一层由铜制成，所述第二层由氧化铜或者有机保护薄膜制成。
7.如权利要求5所述的半导体封装铸模装置，其特征在于，所述脱胶层为单层结构，且由铜制成。
8.一种半导体封装铸模方法，其特征在于，所述铸模方法包括步骤：
提供一种基板；
提供一种铸模装置，所述铸模装置包括上模板、与所述上模板相对设置的下模板及活塞，所述下模板设有多个活塞口以容置所述活塞以及开口朝向所述上模板的凹陷部，所述凹陷部与所述上模板共同形成模具型腔以容置所述基板，所述上模板设有朝所述凹陷部凸出且邻近所述活塞口的突出部，所述突出部靠近所述下模板处设有与所述凹陷部相对的缺口，所述缺口之两侧分别形成与所述活塞口及所述模具型腔相通的入口及出口；
紧密夹紧所述上模板及所述下模板以使所述基板位于所述模具型腔内；
将封胶沿所述活塞口注入，推挤所述活塞以使所述封胶沿所述入口、所述缺口以及所述出口注入所述模具型腔内，以包覆所述基板；以及
硬化所述封胶，打开所述铸模装置以取出铸模制品。
9.如权利要求8所述的半导体封装铸模方法，其特征在于，形成多个第一流道，所述第一流道位于所述活塞口与所述突出部之间，并与所述活塞口及所述入口相互贯通。
10.如权利要求8所述的半导体封装铸模方法，其特征在于，所述缺口之横截面呈梯形、方形、三角形或者圆弧形。
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