CN102880576B - Method for simulating multiple groups of UART interfaces based on STM32F103VE chip - Google Patents
Method for simulating multiple groups of UART interfaces based on STM32F103VE chip Download PDFInfo
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- CN102880576B CN102880576B CN201210059462.1A CN201210059462A CN102880576B CN 102880576 B CN102880576 B CN 102880576B CN 201210059462 A CN201210059462 A CN 201210059462A CN 102880576 B CN102880576 B CN 102880576B
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Abstract
The invention relates to a method for simulating multiple groups of UART (universal asynchronous receiver/transmitter) interfaces based on an STM32F103VE (software transactional memory) chip, and the method comprises the following steps that A, at least two groups of GPIO (general purpose input/output) interfaces of the chip are adopted to serve as the simulating UART interfaces; B, when any one group of simulating UART interfaces have requests to send, a first timing device of the chip is ordered to start and is interrupted for once at set intervals, and the interruption in the course of sending simulates only a physical layer to send out TX (transmit) data bits of the multiple groups of simulating UART interfaces; and C, when an interruption request appears in any of RX (receive) pins of any group of simulating UART interfaces, the receiving request is triggered, and a second timing device is ordered to start simultaneously and is interrupted for once at set intervals; and in the course of the interruption, only receiving port states of all the simulating UART interfaces are sampled and stored in a buffer zone.
Description
Technical field the present invention relates to digital received and sent, particularly relates to the method based on STM32F103VE chip simulation many groups UART interface.
Background technology STM32F103VE chip and chip of the same type, generally only have two to three group UART(Universal Asynchronous Receiver/Transmitter, Universal Asynchronous Receive/dispensing device) interface, more than substantially not having of five groups of UART interface.But the equipment of some application scenario, need more groups of UART interface to connect different hardware devices, such as pre-payment monitoring water meter system collector, need nine UART interface carry out simultaneously and work alone when designing, not so maximum five UART interface obviously satisfy the demand.If use UART extended chip, price is high and circuit complicated; As used the special many UART interface MCU of communication, its MCU cost is high, and its software restraint cost of development also raises with this, learns new development environment again and will make a large amount of documents to read in performance history, develops and poor controllability.
Summary of the invention the technical problem to be solved in the present invention is to avoid above-mentioned the deficiencies in the prior art part and proposes a kind of method based on STM32F103VE chip simulation many groups UART interface; The method, on the basis of existing hardware, can realize more groups and work and separate UART interface simultaneously, to meet the needs that devices communicating connects, and need not increase or adopt hardware costly, save hardware cost.
The present invention solve the technical problem can by realizing by the following technical solutions:
Propose a kind of method based on STM32F103VE chip simulation many groups UART interface, comprise the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. when each group simulation UART interface in arbitrary group send request time, the first timer of chip is made to start, first timer interrupts once at set intervals, transmission task is completed to make simulation UART interface, interrupt during transmission being only that the TX data bit organizing simulation UART interface is sent by analog physical layer more, and notification data link layer is organized the data bit that will send;
Arbitraryly in the RX pin of C. each group simulation UART interface occur that interrupt request then triggers the request of reception, second timer with seasonal chip starts, second timer interrupts once at set intervals, each simulation UART interface receiving port state of only sampling during interruption is also saved in buffer zone, when receiving position of rest, data are sent to analog physical layer row digital filtering to obtain receiving byte, again the byte data received is passed to data link layer afterwards, pass to application layer eventually through network layer.
The most multipotency of the inventive method simulates eight groups of UART interface.
Compared with the existing technology comparatively, the technique effect that the present invention is based on the method for STM32F103VE chip simulation many groups UART interface is: 1. eight groups of GPIO mouths (the General Purpose Input Output making full use of STM32F103VE chip, universal input/output) and the existing resource of two timers, simulate 2-8 group UART interface, meet the needs that equipment needs more UART interface, and need not increase or adopt the hardware such as more expensive chip, save hardware cost; 2. many groups UART interface of simulation just shows different in Physical layer from other MCU internal hardwares UART, and other each layers are identical, greatly facilitate transplanting and the HardwareUpgring of program.
Accompanying drawing explanation
Fig. 1 is the transmission flow schematic diagram of simulation UART interface;
Fig. 2 is the reception schematic flow sheet of simulation UART interface.
Embodiment below in conjunction with accompanying drawing shownschematically preferred embodiment be described in further detail.
The embodiment of the present invention, based on the method for STM32F103VE chip simulation many groups UART interface, comprises the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. as shown in Figure 1, when each group simulation UART interface in arbitrary group send request time, the first timer of chip is made to start, first timer interrupts once at set intervals, the transmission task of 9600bps is not less than to make simulation UART interface complete, interrupt during transmission being only that the TX data bit organizing simulation UART interface is sent by analog physical layer more, and notification data link layer is organized the data bit that will send;
C. as shown in Figure 2, each group simulation UART interface RX pin in arbitrary occur interrupt request then trigger receive request, second timer with seasonal chip starts, second timer interrupts once at set intervals, each simulation UART interface receiving port state of only sampling during interruption is also saved in buffer zone, when receiving position of rest, data are sent to analog physical layer row digital filtering to obtain receiving byte, again the byte data received is passed to data link layer afterwards, pass to application layer eventually through network layer.
Because STM32F103VE chip has eight groups of GPIO mouths to utilize, therefore the most multipotency of the inventive method simulates eight groups of UART interface.
According to the needs of equipment connection, the UART interface of simulation can select arbitrarily setting in 2-8 group, the common ground of design is: Interruption just carries out the input and output of GPIO, run consuming time extremely short, the transmitting-receiving process of data bit is all placed in the task of simulation UART interface Physical layer, often increases the example that an interface then adds a Physical layer task.Difference is, simulate as required UART interface group number number, the length of the time between interruptions of respective design first timer and second timer, to ensure the stable operation of device systems.Below to be applicable to pre-payment monitoring water meter acquiring device, need simulate four groups of UART interface is example, composition graphs 1 and Fig. 2, and the transmission of Imitating UART interface and the principle process of reception are described, other group number just repeats no more herein.
Data send: as shown in Figure 1, when four groups simulation UART interface in arbitrary group send request time, the first timer of chip is made to start, first timer interrupts once every 104.17us, the transmission task of 9600bps is not less than to make simulation UART interface complete, interrupt during transmission being only that the TX data bit organizing simulation UART interface is sent by analog physical layer more, and notification data link layer is organized the data bit that will send; Interrupt routine is extremely short.
Data receiver: as shown in Figure 2, four groups simulation UART interface RX pin in arbitrary occur interrupt request then trigger receive request, second timer with seasonal chip starts, second timer interrupts once every 17.36us, each simulation UART interface receiving port state of only sampling during interruption is also saved in buffer zone, when receiving position of rest, data are sent to analog physical layer row digital filtering to obtain receiving byte, again the byte data received is passed to data link layer afterwards, pass to application layer eventually through network layer.Interruption has just carried out the sampling of GPIO, and its execution time is extremely short, can not impact to system.Because multiple repairing weld determines a data bit, the reliability of its data communication is protected.
Above content is in conjunction with concrete optimal technical scheme further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, some simple deduction or replace can also be made, all should be considered as belonging to protection scope of the present invention.
Claims (4)
1., based on a method for STM32F103VE chip simulation many groups UART interface, it is characterized in that: comprise the steps,
A. at least two group GPIO mouths of selected chip are as simulation UART interface;
B. when each group simulation UART interface in arbitrary group send request time, the first timer of chip is made to start, first timer interrupts once at set intervals, transmission task is completed to make simulation UART interface, interrupt during transmission being only that the TX data bit organizing simulation UART interface is sent by analog physical layer more, and notification data link layer is organized the data bit that will send;
Arbitraryly in the RX pin of C. each group simulation UART interface occur that interrupt request then triggers the request of reception, second timer with seasonal chip starts, second timer interrupts once at set intervals, each simulation UART interface receiving port state of only sampling during interruption is also saved in buffer zone, when receiving position of rest, data are sent to analog physical layer and carry out digital filtering to obtain receiving byte, again the byte data received is passed to data link layer afterwards, pass to application layer eventually through network layer.
2. as claimed in claim 1 based on the method for STM32F103VE chip simulation many groups UART interface, it is characterized in that: most multipotency simulates eight groups of UART interface.
3., as claimed in claim 1 based on the method for STM32F103VE chip simulation many groups UART interface, it is characterized in that: the traffic rate of each described simulation UART interface is not less than 9600bps.
4. as claimed in claim 1 based on the method for STM32F103VE chip simulation many groups UART interface, it is characterized in that: the method is applicable to pre-payment monitoring water meter acquiring device.
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| liren0."io模拟串口".《http://download.csdn.net/detail/liren0/4037791》.2012,第1行-最后1行及程序内容. * |
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Effective date of registration: 20190213 Address after: 563100 U-shaped workshop in Loushanguan High-tech Industrial Development Zone, Three Villages, Chumi Town, Tongzi County, Zunyi City, Guizhou Province Patentee after: Guizhou Huaxu Technology Co., Ltd. Address before: 518103 Huaxu Industrial Park, Phoenix Third Industrial Zone, Fuyong Street, Baoan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Huaxu Science and Technology Development Co., Ltd. |