CN102810561B - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN102810561B CN102810561B CN201110146824.6A CN201110146824A CN102810561B CN 102810561 B CN102810561 B CN 102810561B CN 201110146824 A CN201110146824 A CN 201110146824A CN 102810561 B CN102810561 B CN 102810561B
- Authority
- CN
- China
- Prior art keywords
- dusts
- layer
- layers
- barrier layer
- deposition
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 32
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 45
- 239000002184 metal Substances 0.000 claims abstract description 45
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 26
- 229910000838 Al alloy Inorganic materials 0.000 claims abstract description 25
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000004411 aluminium Substances 0.000 claims abstract description 20
- 230000004888 barrier function Effects 0.000 claims description 48
- 238000000151 deposition Methods 0.000 claims description 33
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 24
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 claims description 24
- 239000012212 insulator Substances 0.000 claims description 20
- 230000008021 deposition Effects 0.000 claims description 19
- 238000005240 physical vapour deposition Methods 0.000 claims description 18
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 238000003475 lamination Methods 0.000 claims description 9
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910010038 TiAl Inorganic materials 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 5
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 4
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 124
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229940037003 alum Drugs 0.000 description 3
- 150000001398 aluminium Chemical class 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 238000004626 scanning electron microscopy Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ITWBWJFEJCHKSN-UHFFFAOYSA-N 1,4,7-triazonane Chemical compound C1CNCCNCCN1 ITWBWJFEJCHKSN-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- -1 aln precipitation Chemical compound 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910001938 gadolinium oxide Inorganic materials 0.000 description 1
- 229940075613 gadolinium oxide Drugs 0.000 description 1
- CMIHHWBVHJVIGI-UHFFFAOYSA-N gadolinium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[Gd+3].[Gd+3] CMIHHWBVHJVIGI-UHFFFAOYSA-N 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
Abstract
公开了一种半导体器件及其制造方法。在根据本发明的半导体器件中,使用铝合金代替铝来作为最终的金属栅极。因此,使对高k-金属栅极的CMP的最终接触界面由纯Al变为铝合金,从而大大地减少了金属栅极中的缺陷,例如,腐蚀、凹坑和损伤等,并且提高了半导体器件的可靠性。
Description
技术领域
本发明涉及半导体器件及其制造方法,具体来说,涉及使用铝合金作为金属栅极的半导体器件及其制造方法。
背景技术
随着半导体器件的尺寸变得越来越小,栅极结构的尺寸和栅极绝缘层的厚度也相应地减小。然而,当氧化硅的栅极绝缘层变得很薄时,漏电流将变得过大。为了减少漏电流,使用具有高介电常数(高k)的材料代替氧化硅来形成栅极绝缘层。然而,多晶硅栅极可能与高k材料反应,并且多晶硅栅极存在栅极耗尽效应、硼渗透等等问题,从而影响器件的性能。因此,使用金属材料来作为栅极。
高k-金属栅极已成为主流。通常使用铝来作为金属栅极。在铝栅制造工艺中,铝栅的化学机械抛光(CMP)是最关键工艺之一。然而,铝是一种活泼金属,在CMP和后续清洗工艺期间容易在酸性和碱性的环境中受到腐蚀。如果在铝栅上出现铝的腐蚀和凹坑,则将极大地影响器件的性能和可靠性。
发明内容
本发明的一个目的是制造性能更可靠的半导体器件。
根据本发明的第一方面,提供了一种半导体器件,包括:具有高介电常数的栅极绝缘层;在该栅极绝缘层上的第一阻挡层;以及在该第一阻挡层上的由铝合金层构成的铝合金栅极。
优选地,该半导体器件还包括在该第一阻挡层上的功函数金属层,其中该铝合金栅极在该功函数金属层上。
优选地,该半导体器件还包括在该功函数金属层上的第二阻挡层,其中该铝合金栅极在该第二阻挡层上。更优选地,该功函数金属层是厚度为40埃到120埃的TiAl合金层,该第二阻挡层是厚度为10埃到50埃的TiN阻挡层。
优选地,该栅极绝缘层是厚度为10埃到30埃的铪氧化物层。
优选地,该第一阻挡层包括层叠的厚度为10埃到50埃的TiN层和厚度为5埃到15埃的TaN层。
优选地,该铝合金层是铝钛合金层。
优选地,从该栅极绝缘层的顶面到该铝合金栅极的顶面的高度为300埃到400埃。
优选地,该铝钛合金层的厚度为250埃到300埃。
根据本发明的第二方面,提供了一种制造半导体器件的方法,包括:在衬底上形成层间电介质层以及嵌在该层间电介质层中的伪栅极;去除该伪栅极,从而在该层间电介质层中形成凹槽;沉积具有高介电常数的栅极绝缘层;在该栅极绝缘层上沉积第一阻挡层;在该第一阻挡层上沉积金属层;在该金属层上沉积铝层;进行退火,以便至少使该金属层的上部与该铝层的下部形成铝合金;以及进行化学机械抛光直到露出在该凹槽之外的该层间电介质层以及铝合金。
优选地,在该沉积第一阻挡层的步骤之后且在该沉积金属层的步骤之前还包括以下步骤:在该第一阻挡层上沉积功函数金属层。
优选地,在该沉积功函数金属层的步骤之后且在该沉积金属层的步骤之前还包括以下步骤:在该功函数金属层上沉积第二阻挡层。更优选的是,该沉积功函数金属层的步骤包括沉积厚度为40埃到120埃的TiAl合金层,该沉积第二阻挡层的步骤包括沉积厚度为10埃到50埃的TiN阻挡层。
优选地,该沉积栅极绝缘层的步骤包括沉积厚度为10埃到30埃的铪氧化物层。
优选地,该沉积第一阻挡层的步骤包括依次沉积厚度为10埃到50埃的TiN层和厚度为5埃到15埃的TaN层。
优选地,该沉积铝层的步骤包括通过物理气相沉积在380℃到460℃的温度下沉积该铝层。
优选地,该退火步骤在300℃到460℃的温度下进行。
优选地,该沉积金属层的步骤包括沉积钛层作为该金属层,而该退火形成的铝合金为铝钛合金。
优选地,通过物理气相沉积来沉积该金属层。
优选地,在化学机械抛光之后的铝钛合金的厚度为250埃到300埃。
本发明的一个优点在于,通过使用铝合金作为最终的金属栅极,从而改善了金属栅极缺陷性能,并且因此提高了半导体器件的可靠性。
通过以下参照附图对本发明的示例性实施例的详细描述,本发明的其它特征及其优点将会变得更为清楚。
附图说明
参照附图,根据下面的详细描述,可以更加清楚地理解本发明。为了清楚起见,图中各个层的相对厚度以及特定区域的相对尺寸并没有按比例绘制。在附图中:
图1A-1G是根据本发明的第一实施例的半导体器件在其制造过程中的各个阶段处的示意性截面图;
图2A和图2B分别示出了对铝和铝钛合金进行CMP之后用扫描电子显微镜(SEM)观察到的表面;以及
图3A-3H是根据本发明的示例1的半导体器件在其制造过程中的各个阶段处的示意性截面图。
具体实施方式
在针对背景技术中提到的问题的研究中,本发明的发明人发现铝合金、特别是铝钛合金表现出比铝膜更好的抗化学腐蚀能力和更好的抗机械损伤能力。如果对高k-金属栅极的CMP的最终接触界面由纯Al变为铝合金,则将极大地改善金属栅极缺陷性能(例如,腐蚀、凹坑和损伤等)。而且,它不会影响金属栅极的电特性。
基于上述发现,提出了本发明。
现在将参照附图来详细描述本发明的各种示例性实施例。
以下对示例性实施例的描述仅仅是说明性的,决不作为对本发明及其应用或使用的任何限制。本领域中公知的技术可以被应用于没有特别示出或描述的部分。
(第一实施例)
图1A-1G是根据本发明的第一实施例的半导体器件在其制造过程中的各个阶段处的示意性截面图。
首先,在衬底101上形成伪栅极,并且然后在衬底101中形成源极/漏极区域。衬底101可以是例如硅衬底,伪栅极可以包括例如多晶硅,而源极/漏极区域可以以公知的任意方式形成。之后,在整个衬底之上形成层间电介质(ILD)层102,并且使ILD层102平坦化以露出伪栅极。其后,去除伪栅极,从而在ILD层102中形成凹槽103,如图1A所示。
接下来,如图1B所示,沉积具有高介电常数的材料,从而在凹槽103中形成栅极绝缘层104。栅极绝缘层104可以包括例如铪氧化物、锆氧化物、铝氧化物、铝氮化物、钛氧化物、镧氧化物、钇氧化物、钆氧化物或钽氧化物,或者其任意组合的高k材料。沉积栅极绝缘层104的方法可以包括例如化学气相沉积(CVD)等。
接下来,如图1C所示,在栅极绝缘层104上沉积阻挡层105。阻挡层105可以用来防止后续要形成于其上的材料扩散到栅极绝缘层104中。阻挡层105可以包括例如TiN、TaN或其组合等。沉积阻挡层105的方法可以包括例如CVD、物理气相沉积(PVD)等。
接下来,如图1D所示,在阻挡层105上沉积要与稍后沉积的铝形成铝合金的金属层106。金属层106可以包括能与Al形成合金的金属,例如钛(Ti)等。沉积金属层106的方法可以包括例如CVD、PVD等。
接下来,如图1E所示,在金属层106上沉积铝层107。沉积铝层107的方法可以包括例如CVD、PVD等。
接下来,如图1F所示,进行退火,以便至少使金属层106的上部与铝层107的下部形成铝合金层108。所形成的铝合金层的上表面不低于最终要形成的栅极高度。在另一实施例中,在退火之后,整个金属层106都可以与铝层107形成铝合金。
接下来,如图1G所示,进行CMP直到露出在凹槽103之外的ILD层102以及铝合金。也就是说,通过CMP去除了ILD层102上沉积的所有材料,并且在CMP工艺中,金属栅极的最终被处理的界面变为铝合金,这使得CMP后的金属栅极的缺陷更少。
图2A和图2B分别示出了在相同的通常的CMP条件下对铝和铝钛合金进行CMP之后用扫描电子显微镜(SEM)观察到的表面。图2A示出了CMP后的铝的表面,而图2B示出了CMP后的铝钛合金的表面。从图2A和图2B中可以清楚看到,铝表现出较大的晶粒尺寸和较弱的晶粒边界,而铝钛合金表现出较小的晶粒尺寸和较强的晶粒边界。而且,可以明显看出CMP后的铝的表面存在较多缺陷,而CMP后的铝钛合金的表面缺陷大大减少。
(第二实施例)
为了获得半导体器件期望的功函数值以提高半导体器件的性能,还可以在栅极绝缘层与栅极金属层之间额外地形成功函数金属层。
第二实施例的半导体器件及其制造方法与第一实施例基本相同,只是在阻挡层105与金属层106之间还形成有功函数金属层。此外,还可以根据需要在功函数金属层与金属层106之间形成另一阻挡层,以防止后续金属层对功函数金属层产生影响。即,在第二实施例中,在沉积阻挡层105的步骤之后且在沉积金属层106的步骤之前还包括以下步骤:在阻挡层105上沉积功函数金属层,以及可选地在该功函数金属层上沉积另一阻挡层。该功函数金属层可以包括具有期望的功函数值的材料,例如TiAl合金、TaC、TaCNO、TaCN、TaN等。沉积功函数金属层的方法可以包括例如CVD或PVD等。该另一阻挡层可以包括例如TiN。沉积另一阻挡层的方法可以包括例如CVD或PVD等。
对于NMOS器件,优选的是,在沉积阻挡层105的步骤之后且在沉积金属层106的步骤之前,在阻挡层105上沉积由例如TiAl合金形成的功函数金属层,并且在该功函数金属层上沉积由例如TiN形成的另一阻挡层。对于PMOS器件,优选的是,在沉积阻挡层105的步骤之后且在沉积金属层106的步骤之前,在阻挡层105上沉积由例如TiN形成的功函数金属层,而后续不用再形成另一阻挡层。
(示例1)
下面以铝钛合金作为示例来更详细地描述根据本发明一个实施例的半导体器件及其制造方法。
图3A-3H是根据示例1的半导体器件在其制造过程中的各个阶段处的示意性截面图。
首先,与第一实施例类似的,以公知的方式在硅衬底301上形成ILD层302以及嵌在ILD层302中的多晶硅伪栅极。此时,已经以公知的任意方式在硅衬底301中形成了源极/漏极区域。去除多晶硅伪栅极,从而在ILD层302中形成凹槽303,如图3A所示。
接下来,如图3B所示,沉积高k材料HfO2,从而在凹槽303中形成10埃到30埃厚的栅极绝缘层304。其后,如图3C所示,在栅极绝缘层304上依次沉积厚度为10埃到50埃的TiN层和厚度为5埃到15埃的TaN层。层叠的TiN层和TaN层构成第一阻挡层305。接下来,如图3D所示,利用PVD在第一阻挡层305上沉积厚度为40埃到120埃的TiAl合金作为功函数金属层311,并且在功函数金属层311上沉积厚度为10埃到50埃的TiN以作为第二阻挡层312。接下来,如图3E所示,利用PVD在第二阻挡层312上沉积Ti层306。Ti层306的厚度可以在50埃到100埃的范围内。Ti层306不宜太厚,如若太厚会影响后续沉积的铝层的填孔能力。接下来,如图3F所示,利用PVD在380℃到460℃的温度下在Ti层306上沉积纯的无掺杂的铝层307。其后,如图3G所示,在300℃到460℃的温度下进行1到3分钟的退火处理,从而使整个Ti层306与铝层307的下部形成铝钛合金层308。所形成的铝钛合金层308的上表面不低于最终要形成的栅极高度。接下来,如图3H所示,进行CMP,以便去除ILD层302上沉积的所有材料,实现器件要求的栅极厚度,并且CMP最终停止在铝钛合金上。最终形成的栅极厚度(即,从栅极绝缘层304的顶面到CMP后的栅极的顶面的高度)为300埃到400埃。在CMP之后的铝钛合金层的厚度为250埃到300埃。如前所述,以铝钛合金作为CMP的最终接触界面改善了金属栅极缺陷性能,并且因此提高了半导体器件的可靠性。
此外,发明人利用Auger分析方法来检查本发明中形成的铝钛合金层的厚度。作为实验,在带有约8500埃氧化物层的硅衬底上沉积了约80埃厚的Ti层和约4000埃厚的Al层。退火之后,整个Ti层与Al层的下部形成铝钛合金。其后,进行CMP,以去除上层大部分的Al。通过一边刻蚀CMP后的层一边对其进行表面成分分析来确定铝钛合金层的厚度。最终得到铝钛合金层的厚度为250埃到300埃。由于器件要求的栅极厚度(即,从栅极绝缘层304的顶面到CMP后的栅极的顶面的高度)为300埃到400埃,因此250埃到300埃厚的铝钛合金层能够确保CMP的最终接触界面是具有更好的抗化学腐蚀能力和更好的抗机械损伤能力的铝钛合金。
总之,如上所述,根据本发明的半导体器件及其制造方法,通过使用铝合金作为最终的金属栅极,从而改善了金属栅极缺陷性能,并且因此提高了半导体器件的可靠性。
虽然已经通过示例性实施例对本发明进行了详细说明,但是本领域的技术人员应该理解,以上示例性实施例仅是为了进行说明,而不是为了限制本发明的范围。本领域的技术人员应该理解,可在不脱离本发明的范围和精神的情况下,对以上实施例进行修改。本发明的范围由所附权利要求来限定。
Claims (8)
1.一种制造半导体器件的方法,包括:
在衬底上形成层间电介质层以及嵌在所述层间电介质层中的伪栅极;
去除所述伪栅极,从而在所述层间电介质层中形成凹槽;
沉积具有高介电常数的栅极绝缘层;
在所述栅极绝缘层上沉积第一阻挡层;
在所述第一阻挡层上沉积功函数金属层;
在所述功函数金属层上沉积第二阻挡层;
在所述第二阻挡层上沉积金属层;
在所述金属层上沉积铝层;
进行退火,以便至少使所述金属层的上部与所述铝层的下部形成铝合金;以及
进行化学机械抛光直到露出在所述凹槽之外的所述层间电介质层以及铝合金;
其中所述沉积功函数金属层的步骤包括沉积厚度为40埃到120埃的TiAl合金层,所述沉积第二阻挡层的步骤包括沉积厚度为10埃到50埃的TiN阻挡层。
2.根据权利要求1所述的方法,其中所述沉积栅极绝缘层的步骤包括沉积厚度为10埃到30埃的铪氧化物层。
3.根据权利要求1所述的方法,其中所述沉积第一阻挡层的步骤包括依次沉积厚度为10埃到50埃的TiN层和厚度为5埃到15埃的TaN层。
4.根据权利要求1所述的方法,其中所述沉积铝层的步骤包括通过物理气相沉积在380℃到460℃的温度下沉积所述铝层。
5.根据权利要求1所述的方法,其中所述退火步骤在300℃到460℃的温度下进行。
6.根据权利要求1-5中的任意一项所述的方法,其中所述沉积金属层的步骤包括沉积钛层作为所述金属层,而所述退火形成的铝合金为铝钛合金。
7.根据权利要求6所述的方法,其中通过物理气相沉积来沉积所述金属层。
8.根据权利要求6所述的方法,其中在化学机械抛光之后的铝钛合金的厚度为250埃到300埃。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110146824.6A CN102810561B (zh) | 2011-06-02 | 2011-06-02 | 半导体器件及其制造方法 |
US13/486,994 US8815728B2 (en) | 2011-06-02 | 2012-06-01 | Semiconductor device having metal alloy gate and method for manufacturing the same |
US14/337,683 US9196697B2 (en) | 2011-06-02 | 2014-07-22 | Semiconductor device with an aluminum alloy gate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110146824.6A CN102810561B (zh) | 2011-06-02 | 2011-06-02 | 半导体器件及其制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102810561A CN102810561A (zh) | 2012-12-05 |
CN102810561B true CN102810561B (zh) | 2015-12-02 |
Family
ID=47234226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110146824.6A Active CN102810561B (zh) | 2011-06-02 | 2011-06-02 | 半导体器件及其制造方法 |
Country Status (2)
Country | Link |
---|---|
US (2) | US8815728B2 (zh) |
CN (1) | CN102810561B (zh) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8659077B1 (en) * | 2012-09-13 | 2014-02-25 | International Business Machines Corporation | Multi-layer work function metal replacement gate |
US20140246734A1 (en) * | 2013-03-01 | 2014-09-04 | Globalfoundries Inc. | Replacement metal gate with mulitiple titanium nitride laters |
US20150115442A1 (en) * | 2013-10-31 | 2015-04-30 | Infineon Technologies Ag | Redistribution layer and method of forming a redistribution layer |
CN104716030B (zh) * | 2013-12-12 | 2018-03-20 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制作方法 |
CN104716029B (zh) * | 2013-12-12 | 2017-12-05 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制作方法 |
CN104716172B (zh) * | 2013-12-12 | 2018-10-23 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制作方法 |
US9449841B2 (en) | 2013-12-19 | 2016-09-20 | Taiwan Semicondcutor Manufacturing Company, Ltd. | Methods and systems for chemical mechanical polish and clean |
US9583362B2 (en) * | 2014-01-17 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company Ltd. | Metal gate structure and manufacturing method thereof |
US9231071B2 (en) * | 2014-02-24 | 2016-01-05 | United Microelectronics Corp. | Semiconductor structure and manufacturing method of the same |
CN105225949B (zh) * | 2014-05-26 | 2018-08-21 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法和电子装置 |
CN105206529A (zh) * | 2014-06-18 | 2015-12-30 | 中国科学院微电子研究所 | 一种鳍式场效应晶体管及其制造方法 |
CN104465322A (zh) * | 2014-11-26 | 2015-03-25 | 上海华力微电子有限公司 | 一种减小铝衬垫晶界损伤的方法 |
KR102235612B1 (ko) | 2015-01-29 | 2021-04-02 | 삼성전자주식회사 | 일-함수 금속을 갖는 반도체 소자 및 그 형성 방법 |
US10522365B2 (en) | 2016-01-27 | 2019-12-31 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods for reducing scratch defects in chemical mechanical planarization |
CN107731747B (zh) * | 2016-08-12 | 2020-05-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5166093A (en) * | 1991-07-31 | 1992-11-24 | Micron Technology, Inc. | Method to reduce the reflectivity of a semi-conductor metallic surface |
CN101027770A (zh) * | 2004-09-27 | 2007-08-29 | 英特尔公司 | 金属栅电极半导体器件 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6921711B2 (en) * | 2003-09-09 | 2005-07-26 | International Business Machines Corporation | Method for forming metal replacement gate of high performance |
US20060118760A1 (en) * | 2004-12-03 | 2006-06-08 | Yang Andy C | Slurry composition and methods for chemical mechanical polishing |
US7229873B2 (en) * | 2005-08-10 | 2007-06-12 | Texas Instruments Incorporated | Process for manufacturing dual work function metal gates in a microelectronics device |
US7795097B2 (en) * | 2007-11-20 | 2010-09-14 | Texas Instruments Incorporated | Semiconductor device manufactured by removing sidewalls during replacement gate integration scheme |
US20100059823A1 (en) * | 2008-09-10 | 2010-03-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resistive device for high-k metal gate technology and method of making |
DE102009006802B3 (de) * | 2009-01-30 | 2010-06-17 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren und Halbleiterbauelement mit Einstellung der Austrittsarbeit in einer Gateelektrodenstruktur mit großem ε nach der Transistorherstellung unter Anwendung von Lanthanum |
US8895426B2 (en) * | 2009-06-12 | 2014-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate transistor, integrated circuits, systems, and fabrication methods thereof |
US8088685B2 (en) * | 2010-02-09 | 2012-01-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integration of bottom-up metal film deposition |
KR20110092836A (ko) * | 2010-02-10 | 2011-08-18 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
KR101574107B1 (ko) * | 2010-02-11 | 2015-12-04 | 삼성전자 주식회사 | 반도체 장치의 제조 방법 |
US8330227B2 (en) * | 2010-02-17 | 2012-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated semiconductor structure for SRAM and fabrication methods thereof |
US8232148B2 (en) * | 2010-03-04 | 2012-07-31 | International Business Machines Corporation | Structure and method to make replacement metal gate and contact metal |
US8431453B2 (en) * | 2011-03-31 | 2013-04-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure |
-
2011
- 2011-06-02 CN CN201110146824.6A patent/CN102810561B/zh active Active
-
2012
- 2012-06-01 US US13/486,994 patent/US8815728B2/en active Active
-
2014
- 2014-07-22 US US14/337,683 patent/US9196697B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5166093A (en) * | 1991-07-31 | 1992-11-24 | Micron Technology, Inc. | Method to reduce the reflectivity of a semi-conductor metallic surface |
CN101027770A (zh) * | 2004-09-27 | 2007-08-29 | 英特尔公司 | 金属栅电极半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
US20140332907A1 (en) | 2014-11-13 |
CN102810561A (zh) | 2012-12-05 |
US20130105919A1 (en) | 2013-05-02 |
US9196697B2 (en) | 2015-11-24 |
US8815728B2 (en) | 2014-08-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102810561B (zh) | 半导体器件及其制造方法 | |
US9111865B2 (en) | Method of making a logic transistor and a non-volatile memory (NVM) cell | |
US9768069B2 (en) | Method of manufacturing semiconductor device | |
TWI406331B (zh) | 半導體裝置及其製造方法 | |
US9679985B1 (en) | Devices and methods of improving device performance through gate cut last process | |
US8513107B2 (en) | Replacement gate FinFET devices and methods for forming the same | |
JP4002868B2 (ja) | デュアルゲート構造およびデュアルゲート構造を有する集積回路の製造方法 | |
US9076816B2 (en) | Method and device for self-aligned contact on a non-recessed metal gate | |
US10068797B2 (en) | Semiconductor process for forming plug | |
CN104867967A (zh) | 半导体器件及其制造方法 | |
US7666746B2 (en) | Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances | |
US8350311B2 (en) | Semiconductor device | |
CN101604664A (zh) | 金属栅极电极和制造方法 | |
US8053317B2 (en) | Method and structure for improving uniformity of passive devices in metal gate technology | |
US6908806B2 (en) | Gate metal recess for oxidation protection and parasitic capacitance reduction | |
US11211471B1 (en) | Method of manufacturing a semiconductor device | |
US20180047625A1 (en) | Reflow enhancement layer for metallization structures | |
US9589809B2 (en) | Method of depositing tungsten layer with improved adhesion and filling behavior | |
US20170025352A1 (en) | Antifuse structures and methods of making same | |
CN111081773B (zh) | 氧化物半导体装置以及其制作方法 | |
US10283412B2 (en) | Semiconductor device and fabrication method thereof | |
US20140239419A1 (en) | Semiconductor device and method of manufacturing the same | |
US9349873B1 (en) | Oxide semiconductor device and method of fabricating the same | |
CN104716172A (zh) | 半导体器件及其制作方法 | |
CN111128889A (zh) | 具有金属栅极的半导体器件结构及其制备方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |