CN102760694A - 形成氧化物经封装传导形体的方法 - Google Patents

形成氧化物经封装传导形体的方法 Download PDF

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CN102760694A
CN102760694A CN2012101248062A CN201210124806A CN102760694A CN 102760694 A CN102760694 A CN 102760694A CN 2012101248062 A CN2012101248062 A CN 2012101248062A CN 201210124806 A CN201210124806 A CN 201210124806A CN 102760694 A CN102760694 A CN 102760694A
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刘晃
薛振胜
施继雄
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GlobalFoundries Singapore Pte Ltd
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Abstract

本发明涉及一种形成氧化物经封装传导形体的方法，提供一种有关以通过实质上均匀的MnO或Al2O3层予以封装的铜或铜合金互连所形成的半导体装置。实施例包含在介电层中形成具有侧表面及底表面的开口，在开口的侧表面和底表面上及介电层的上表面上形成阻障层，以氧气电浆处理阻障层以在阻障层上形成悬垂氧原子，在阻障层上沉积种晶层，以及以铜或铜合金填充开口。

Description

形成氧化物经封装传导形体的方法
技术领域
本发明是有关半导体装置中的铜(Cu)及/或铜合金金属化，以及有关一种制造具有可信赖，低电阻铜或铜合金互连的半导体装置的方法。本发明特别可应用于形成具有次微米设计形体及高导电率互连结构的高速集成电路，包含以金属-氧化物层，如MnOx或AlOx予以实质上均匀地封装的铜或铜合金形体。
背景技术
在半导体制造中，在金属互连后段工艺(BEOL)加工期间施加镶嵌(damascene)。现有镶嵌加工包含在介电中间层形成开口及以导电材料，例如，铜或铜合金填充开口，以形成接触面、通孔、或线。现有BEOL加工包含在晶圆上利用配线的个别装置(晶体管、电容、电阻等)的互连，以及芯片-对-封装连接的接触面、绝缘层(介电质)、金属层级、及接合位置的形成。
如图1A-1F所示，使用现有镶嵌工艺形成半导体装置中的金属互连。图1A显示形成在介电层103中的沟槽101。
由于铜经由介电中间层材料，如二氧化硅扩散，故铜或铜合金互连结构必须通过扩散阻障层予以封装。图1B显示沉积在沟槽101的侧表面107和底表面109上，以及介电层103的上表面111上的扩散阻障层105(例如，Ta/TaN)。
种晶层113沉积在阻障层105上，如图1C所示。种晶层113可为铜、或铜合金，如CuMn或CuAl。图1D显示铜、或铜合金115，通常利用电镀，填充沟槽101及种晶层113的上。
然后如通过化学机械加工(CMP)实施平坦化以自介电层103移除铜或铜合金115、种晶层113、和阻障层105，而形成实质上平坦的上表面，如图1E所示。
然后沉积覆盖层117，如氮化硅(SiN)或氮碳化硅(SiCxNy)，如图1F所示。
在图1F中，当使用铜合金种晶层如CuMn或CuAl时，锰或铝在铜或铜合金115与覆盖层117间的界面析出。析出量视种晶层113中的锰或铝浓度及其它工艺条件而定。析出程度可导致种晶层113仅包含铜，而大部份的锰或铝因与氧(O2)反应而转化成金属氧化物层119，例如，MnO或Al2O3。
除了该种界面外，析出亦发生在任何受损或缺陷位置(如具有不足够的阻障层的位置)。图2显示衬有阻障层203的现有铜或铜合金互连201。现有实务导致合金原子，如锰或铝原子205，向着O2扩散以在铜或铜合金互连201的上表面207上以及存在着O2的受损和缺陷位置形成氧化物层，例如，MnO或Al2O3。
铜或铜合金互连201中的合金原子，如锰或铝原子205轻易地向着O2扩散以形成氧化物，例如，MnO或Al2O3，此乃由于其低活化能的缘故。另一方面，元素原子，如锰或铝存在时，铜不会与O2反应形成CuO。所得的氧化物层，例如，MnO或Al2O3，作为阻障层以防止：(a)铜沿着Cu/SiCNH界面207扩散而形成CuO；(b)O2扩散至铜互连201中形成CuO；以及(c)锰或铝继续扩散至介电层213中。因此，提升互连的电迁移(EM)性能。
受损和缺陷位置可为太薄的阻障层203的部份207、或节点201与介电层213间的缺陷界面211。阻障层203应完全地包围整个铜互连201以防止铜扩散至周围材料中并且穿过周围材料。阻障层203应该要足够厚以限制铜扩散，因此化学地隔离互连201与介电层213，而且还呈现足够高的导电性以维持与导线215的良好电子接触。然而，阻障层203在某些位置会太薄以致无法限制铜扩散。
现有实务仅导致氧化物层，例如，MnO或Al2O3，形成在存在着O2的互连201的上表面上或缺陷/破裂衬底区域207、211。然而，现有实务无法导致沿着沉积的导电材料，例如，铜或铜合金的侧壁形成实质上均匀的氧化物阻障层，此乃由于该些位置缺乏O2的故。
在先进节点如20nm及以下，阻障层(例如，Ta/TaN，Ru)的厚度进一步薄化以促进间隙填充及降低导线电阻。然而，该种薄化的阻障层没有强壮到足以禁得起EM、应力迁移(SM)、或时间相依介电崩溃(TDDB)加压，且其中可能含有受损和缺陷区域。因此，BEOL可靠度性能降低。
因此需要存在一种能够形成封装金属互连的实质上均匀的金属氧化物阻障层的方法论，因此阻挡铜扩散且提升可靠度性能没有负面地冲击间隙填充。
发明内容
本发明的一方面是一种在BEOL加工期间，形成通过实质上均匀的金属-氧化物层，如MnO或Al2O3予以封装的铜或铜合金互连。
本发明的另一方面是一种包含通过实质上均匀的金属-氧化物层，如MnO或Al2O3予以封装的铜或铜合金互连的半导体装置。
本发明的其它方面及其它特点将揭露于下述说明中，而且对本领域技术人员而言在检视下述说明时在某种程度上是显而易见的或者可自本发明的实务学习的。
依据本发明，某些技术功效在某种程度上可通过包含下述步骤的方法予以达成：在介电层中形成具有侧表面及底表面的开口，在开口的侧表面和底表面上及介电层的上表面上形成阻障层，以氧气电浆处理阻障层以在阻障层上形成悬垂氧原子，在阻障层上形成种晶层，以及以铜或铜合金填充开口。导致在该铜或铜合金的上及底表面上和沿着填充该开口的该铜或铜合金的侧表面形成金属氧化物层。
本发明的方面包含如通过CMP平坦化以自介电层的上表面移除阻障层，种晶层，及铜或铜合金，使得镶嵌的铜或铜合金的上表面与介电层的上表面实质上共平面。进一步方面包含在填充开口的铜或铜合金上提供覆盖层，如SiN或SiCxNy。其它方面包含沉积铜合金种晶层，如CuMn或CuAl，导致形成金属氧化物层，例如MnO或Al2O3。其它方面包含以
Figure BDA0000157142190000031
至
Figure BDA0000157142190000032
的厚度沉积阻障层。另一方面包含以
Figure BDA0000157142190000033
至的厚度沉积种晶层。依据又一方面，以
Figure BDA0000157142190000035
至
Figure BDA0000157142190000036
的厚度形成金属氧化物层。
本发明的另一方面是一种装置，包含：半导体组件，半导体组件上的介电层，填充介电层中的开口的铜或铜合金，以及封装填充开口的铜或铜合金的金属氧化物层。
本发明的方面包含装置，此装置包含通过具有
Figure BDA0000157142190000041
至
Figure BDA0000157142190000042
的实质上均匀厚度的氧化物层，例如MnO或Al2O3层予以封装的镶嵌铜或铜合金。本发明的方面包含在具有
Figure BDA0000157142190000043
至
Figure BDA0000157142190000044
厚度的阻障层的沟槽中具有铜或铜合金镶嵌的装置。
本发明的另一方面是一种方法，包含：在半导体组件上提供介电层；在介电层中形成具有侧表面及底表面的沟槽；在沟槽的侧表面及底表面上沉积阻障层；以氧气电浆处理阻障层以形成键结在阻障层上的悬垂氧；在阻障层上沉积铜合金种晶层；以铜(Cu)或铜合金填充沟槽以形成铜或铜合金镶嵌及在介电层的上表面上的过覆盖；以及平坦化，使得铜或铜合金镶嵌的上表面与介电层的上表面实质上共平面，导致封装铜或铜合金镶嵌的金属氧化物层。
由下述的详细说明，对本领域技术人员而言，本发明的其它方面及技术功效是显而易见的，其中本发明的实施例是通过意欲实施本发明的最佳模式的说明予以简单地陈述。如可了解般，本发明能够以其它及不同实施例完成的，且其数种细节能够在各种显而易知方面予以修饰，皆无偏离本发明。因此，图式及说明事实上是欲作为说明之用，而非作为限制之用。
附图说明
在随附的图式中，本发明是通过实施例予以说明，而非予以限制，且图式中类似的参考数值是指类似的组件，其中：
图1A至1F图解地说明形成半导体装置中的金属互连的现有镶嵌工艺；
图2图解地说明衬有阻障层的现有互连；以及
图3A至3G图解地说明依据本发明实施例的形成半导体装置中的金属互连的工艺流程。
具体实施方式
在下述说明中，为了阐释的目的，提出许多特定的细节以提供彻底了解示例的实施例。然而，应可清楚了解，没有这些特定的细节或者利用均等的配置亦可实施这些示例的实施例。其它实例中，在方块图中显示众所皆知的结构及装置以避免非必要地模糊示例的实施例。此外，除非另有说明，否则应了解说明书及权利要求中所使用的成分、反应条件等的表示数量、比率、及数值性质的所有数值在所有实例中皆以″约″一词予以修饰。
本发明关注并解决BEOL可靠度性能的问题，尤其当阻障衬底的厚度减小而调和间隙填充及低线电阻时。本发明通过提供能够形成实质上均匀的金属-氧化物层，例如，MnO或Al2O3层、封装金属互连，例如，铜或铜合金接触面、通孔、或线，因此防止铜扩散至介电层中并且穿过介电层，故而提升可靠度性能没有负面地冲击间隙填充的方法论关注并解决该些问题。
依据本发明实施例的方法论是包含在介电层中形成具有侧表面及底表面的开口，在开口的侧表面和底表面上及介电层的上表面上形成阻障层，以氧气电浆处理阻障层以在阻障层上形成悬垂氧原子，在阻障层上沉积种晶层，以及以铜或铜合金填充开口。
由下述的详细说明，本领域技术人员可浅显易见地了解阻挡铜自铜或铜合金互连扩散没有负面地冲击间隙填充的又其它方面、特点、及技术功效，其中简单地通过意欲的最佳模式的说明，显示及陈述较佳实施例。本发明能够以其它及不同实施例完成的，且其数种细节能够在各种显而易知方面予以修饰。因此，图式及说明事实上是欲作为说明之用，而非作为限制之用。
图3A-3F说明依据本发明实施例的方法论。参照图3A，通过例如反应性离子蚀刻(RIE)在介电层303中形成开口，例如，沟槽301。
通过，例如，物理气相沉积(PVD)在沟槽301的侧表面307及底表面309上、及介电层303的上表面311上形成扩散阻障层305，如图3B所示。阻障层305可以
Figure BDA0000157142190000051
至
Figure BDA0000157142190000052
的厚度形成的。典型的扩散阻障金属包含钽(Ta)，氮化钽(TaN)，钌(Ru)，钴(Co)，或Ta/TaN。
参照图3C，以氧气电浆313，如30-180秒、于400-900W的RF电力、15-35m托的压力、100-400℃、及60-120sccm的臭氧(O3)流动速率处理所得的结构。利用氧气电浆的处理沿着沟槽301的侧表面307及底表面309在阻障层305中形成悬垂氧原子。该些悬垂氧原子随后反应以形成封装氧化物阻障。
参照图3D，通过，例如，物理气相沉积(PVD)在阻障层305上沉积种晶层315。种晶层315可形成至至
Figure BDA0000157142190000062
的厚度，且可包含铜合金，如CuMn或CuAl。与铜种晶层相比下，CuAl种晶层以十倍增加EM寿命，而与铜种晶层相比下，CuMn种晶层以一百倍增加EM寿命。
如通过电化学电镀、无电电镀、或化学气相沉积来沉积导电材料，如铜或铜合金317，以填充沟槽301并在介电层302上形成过覆盖317，如图3E所示。然后如通过CMP实施平坦化以自介电层301的上表面移除过覆盖317，及阻障层305和种晶层315，形成实质上平坦的上表面，如图3F所示。
后续如通过化学气相沉积(CVD)沉积覆盖层319。覆盖层319可包含SiN或SiCxNy。
种晶层315中的合金金属原子，例如，锰或铝析出至先前形成的悬垂氧原子以形成封装的氧化物层，例如，MnO或Al2O3。析出量视铜合金种晶层中的锰或铝浓度及各种工艺条件而定。在某些实施例中，析出足以导致实质上的铜种晶层，使得实质上所有的锰或铝皆析出以形成实质上均匀的封装MnO或Al2O3氧化物层321。一般而言，该种保护性氧化物层是在铜或铜合金沉积的前形成的。EDX/EELS分析确认悬垂氧键结可完全地氧化来自至
Figure BDA0000157142190000064
厚度的种晶层的锰或铝原子以形成实质上均匀的MnO或Al2O3封装层。
本发明的实施例可达成数种技术功效，包含阻挡铜自铜或铜合金互连扩散，因此提升EM寿命没有负面地冲击间隙填充。本发明在各种高度集成的半导体装置的任一种上具有产业应用性。
在前述说明中，本发明参照其特定示例的实施例予以说明。然而，可证明可对其进行各种修饰及变更没有偏离本发明的较广精神及范围，如权利要求所述。因此，说明及图式欲视为是说明之用而非限制之用。可了解本发明能够使用各种其它组合及实施例且在本文所示的本发明概念的范围内能够有任何变更或修饰。

Claims (20)

1.一种方法，包括：
在介电层中形成具有侧表面及底表面的开口；
在该开口的该侧表面及该底表面上和该介电层的上表面上形成阻障层；
以氧气电浆处理该阻障层，以在该阻障层上形成悬垂氧原子；
在该阻障层上沉积种晶层；以及
以铜Cu或铜合金填充该开口，
导致在该铜或铜合金的上及底表面上和沿着填充该开口的该铜或铜合金的侧表面形成金属氧化物层。
2.根据权利要求1所述的方法，包括自该介电层的该上表面移除该阻障层、该种晶层、及该铜或铜合金。
3.根据权利要求2所述的方法，包括在填充该开口的该铜或铜合金上形成覆盖层。
4.根据权利要求3所述的方法，其中该覆盖层包括氮碳化硅SiCxNy。
5.根据权利要求1所述的方法，包括沉积作为该种晶层的铜合金。
6.根据权利要求5所述的方法，包括沉积作为该种晶层的CuMn或CuAl合金，其中该金属氧化物层包括MnO或Al2O3。
7.根据权利要求1所述的方法，包括以
Figure FDA0000157142180000011
至
Figure FDA0000157142180000012
的厚度沉积该阻障层。
8.根据权利要求1所述的方法，包括以
Figure FDA0000157142180000013
至的厚度沉积该种晶层。
9.根据权利要求1所述的方法，包括以
Figure FDA0000157142180000021
至
Figure FDA0000157142180000022
的厚度形成该金属氧化物层。
10.一种装置，包括：
半导体组件；
在该半导体组件上的介电层；
填充该介电层中的开口的铜或铜合金；以及
封装填充该开口的该铜或铜合金的金属氧化物层。
11.根据权利要求10所述的装置，其中该金属氧化物层包括MnO或Al2O3。
12.根据权利要求10所述的装置，进一步包括加衬该开口的阻障层。
13.根据权利要求10所述的装置，其中该金属氧化物层具有
Figure FDA0000157142180000023
至
Figure FDA0000157142180000024
的实质上均匀的厚度。
14.根据权利要求10所述的装置，其中该阻障层具有
Figure FDA0000157142180000025
至
Figure FDA0000157142180000026
的厚度。
15.根据权利要求10所述的装置，其中：
该开口为沟槽；以及
填充该沟槽的该铜或铜合金为导线。
16.一种方法，包括：
在半导体组件上提供介电层；
在该介电层中形成具有侧表面及底表面的沟槽；
在该沟槽的该侧表面及该底表面上沉积阻障层；
以氧气电浆处理该阻障层，以在该阻障层上形成悬垂氧原子；
在该阻障层上沉积铜合金种晶层；
以铜Cu或铜合金填充该沟槽，以形成铜或铜合金镶嵌及在该介电层的上表面上的过覆盖；以及
平坦化，使得该铜或铜合金镶嵌的上表面与该介电层的该上表面实质上共平面，
导致形成封装该铜或铜合金镶嵌的金属氧化物层。
17.根据权利要求16所述的方法，包括沉积作为该种晶层的CuMn合金或CuAl合金。
18.根据权利要求17所述的方法，其中该金属氧化物层包括MnO或Al2O3。
19.根据权利要求16所述的方法，包括以
Figure FDA0000157142180000031
至
Figure FDA0000157142180000032
的厚度沉积该阻障层。
20.根据权利要求16所述的方法，其中是以
Figure FDA0000157142180000033
至
Figure FDA0000157142180000034
的厚度形成该金属氧化物层。
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