CN103855131A - 自我生长的阻挡层结构及使用该结构的沟槽式半导体结构 - Google Patents
自我生长的阻挡层结构及使用该结构的沟槽式半导体结构 Download PDFInfo
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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Abstract
本发明公开了一种自我生长的阻挡层结构,其包括一含硅基板、一第一阻挡层,覆盖于该含硅基板上,以及一第二阻挡层,覆盖于该第一阻挡层之上,且该第二阻挡层为铜合金,其中该铜合金包含铜元素及至少一金属元素,其中该金属元素需为扩散速度比铜快且不与铜互溶的元素。在另一实施例中,该自我生长阻挡的阻挡层结构可应用于沟槽式半导体结构以获得优选的热稳定性及阻挡效果,并提升整体导线的导电特性。
Description
技术领域
本发明涉及一种阻挡层结构,尤其涉及一种自我生长的阻挡层结构及使用该结构的沟槽式半导体结构。
背景技术
现今半导体制作技术已迈入超大规模集成电路(Ultra large ScaleIntegration),当达到美国半导体协会(SIA)对国际半导体技术蓝图(International Technology Roadmap for Semiconductors)所设定在2015年的32nm、22nm线宽技术要求时,必须面对后段金属联机工艺朝向多层化及细微化的发展,为了避免导线层与介电层之间的电阻电容时间延迟效应(RC Time Delay),以及在高操作电流密度下产生的电致迁移(Electron-Migration)可靠度的问题,需集合高导电率及高熔点的金属导线与低介电常数的介电材料,以突破元件操作上的瓶颈,并有效提升整体效能。
然而,随着铜工艺的开发,整个半导体工业仍有许多的挑战存在,其中包括:①铜无法像铝一样形成自我保护层。镀制后的铜膜在大气环境下容易氧化和受湿气腐蚀,影响金属联机的导电稳定性;②在200℃的低温下,铜会与硅或硅基材料等产生反应,在IC结构中形成如同Cu3Si的铜-硅化合物,造成元件的失效;③铜与介电层的附着性不良,使IC中薄膜结构的机械强度不足;④铜原子具有快速的扩散性。在电场加速下,铜能穿透介电层而快速的扩散,尤其针对硅基材料,一旦铜原子扩散到硅基材中,会引入深层能级受体(Deep Level Acceptor),造成元件的特性退化与失效,⑤铜的卤素气体在等离子体中的蒸气压很低,不易以反应性离子蚀刻(Reactive Ion Etching)等干蚀刻方式,制作细微线路图样。
由于铜工艺引进而产生的问题,其解决方式为:①有高度热及化学稳定性的扩散阻挡层(Diffusion Barrier)的配合,用于阻碍铜原子的扩散和防止铜与硅基材料的内部反应;同时有黏着层(Adhesion Promer)的效果,增进铜膜与介电材料的附着能力;②应用大马士革镶嵌工艺(Metal InlaidDamascene Process)与后续的化学机械研磨(Chemical Mechanical Polishing)方式,改善细微图样蚀刻及导线制作的问题;③利用金属原子(Al、Mn)掺杂,在铜薄膜表层形成自我保护封盖层的制备技术,以惰性材料保护铜金属薄膜部遭受氧化或腐蚀。此外,铜工艺填孔难度提高,其中阻挡层厚度与电阻值便扮演着能否成功填孔的重要角色;然而在填孔时经常会遇到以下问题:不连续(Discontinue)、提早封口(Overhang)、不平行(Asymmetry),这是因为镀制阻挡层与晶种层时候的缺陷造成后续电镀的无法有效达成填孔。当为了降低电阻值使孔洞主要材料为铜时,我们会考虑降低阻挡层厚度,但这就会造成不连续与不平行现象的产生,并且也使阻挡效果变差;若为了顾虑到抗扩散效果而加厚阻挡层厚度时,就有可能产生提早封口的现象,因为孔内阻挡层厚度相对于铜变多了,也使金属导线的电阻值增加;因此,理想的阻挡层结构须同时兼顾其厚度及电阻值两项因素;另一方面来说,新的阻挡层材料必须同时扮演能抑制扩散的阻挡层、以及作为电镀工艺中铜晶种层的功能。最后,也必须能直接在介电层镀上合金材料,通过退火过程中生成氧化物作为阻挡层,此方法即称为自我生长的阻挡层的工艺方式。
发明内容
本发明提出一种自我生长的阻挡层结构及使用该结构的沟槽式半导体结构。其用于提升热稳定性及增加阻挡强度,同时可直接将铜电镀于其上;此外,本发明的结构更可以提升整体导线的导电特性。
在一实施例中,本发明提供一种自我生长的阻挡层结构,其中包括:一含硅基板、一第一阻挡层覆盖于该含硅基板上,以及一第二阻挡层覆盖于该第一阻挡层之上,且该第二阻挡层为铜合金,其中该铜合金包含铜元素及至少一金属元素,且其中该金属元素需为扩散速度比铜快且不与铜互溶的元素。
在另一实施例中,本发明提供一种可用于沟槽式半导体结构的自我生长的阻挡层结构,其中包括:一沟槽式半导体结构、一第一阻挡层,覆盖于该沟槽式半导体结构之上,以及一第二阻挡层,覆盖于该第一阻挡层之上,此外该第二阻挡层为铜合金,其中该铜合金包含铜元素及至少一金属元素,其中该金属元素需为扩散速度比铜快且不与铜互溶的元素。
附图说明
图1为根据本发明的一自我生长的阻挡层结构第一实施例示意图。
图2为根据本发明的一自我生长的阻挡层结构第二实施例示意图。
图3为利用本发明的双层结构改善阻挡特性的示意图。
图4a与4b为本发明的第一实施例加入RuN后增加热稳定性的结果。
【主要元件符号说明】
100 阻挡层结构
110 含硅基板
120 第一阻挡层
130 第二阻挡层
200 一种具有自我生长的阻挡层的沟槽式半导体结构
210 沟槽式半导体结构
220 第一阻挡层
230 第二阻挡层
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本发明作进一步的详细说明。
请参阅图1所示,该图为本发明的自我生长的阻挡层结构第一实施例示意图。在本实施例中,该自我生长的阻挡层结构100包括有一含硅基板110、一第一阻挡层120以及一第二阻挡层130。该含硅基板110可为硅、硅的氧化物或两者的组成物,用于承载第一阻挡层120以及第二阻挡层130。
该第一阻挡层120,覆盖于该含硅基板110上。请参阅表1,其为阻挡层材料电阻率比较表,以用来解释该第一阻挡层120。从表1中可以得知,钌金属具有较低的电阻率,相对于钽来说,同样阻抗,厚度约略可以缩小1.6倍。而在表2数据中,则显示钌与铜的(111)晶相有相当完美的晶格匹配度,一般来说,晶格差异度在20%以下都算是匹配的,而钌金属对铜(111)约为17~19%。
为了有效地将钌金属导入次世代工艺中,必须提高它阻挡能力,为了减少扩散路径长有两种作法,其一是增大晶粒,可有效减少扩散路径;另一方式为掺入杂质,使材料从多晶结构转变为微晶或非晶结构。基于上述理由,本实施例的第一阻挡层120为钌元素来形成薄膜于该含硅基板110上。而在制作钌薄膜的过程中可以通入氮气,使得钌的结构转变为微晶或非晶结构,促使其生成抗扩散效果更佳的第一阻挡层120。
表1阻挡层材料电阻率比较
表2阻挡层材料与铜的晶格差异
接着说明该第二阻挡层130的部分,该第二阻挡层130,覆盖于该第一阻挡层120之上,且该第二阻挡层130为铜合金,其中该铜合金包含铜元素及至少一金属元素,其中该金属元素需为扩散速度比铜快且不与铜互溶的元素。由于自我生长的阻挡层技术(Self-forming barrier technique),是在铜金属材料中掺杂其它种金属,因此本实施例中,以至少一种金属元素作为掺杂元素。
这些掺杂元素不只要成为一热稳定性良好的抗扩散层,并且也必须有效抑制整体电阻率。因此可掺杂的材料必须具备下列几点要素:①掺杂材料必须不会与铜产生互溶反应,并且适合用溅镀的方式生长,如此可以确保在镀膜过程中有效控制薄膜组成;②掺杂物扩散速度必须比铜快,如此可以有效在介电层的接口有效形成阻挡层;③氧化物自由能需要越小越好(负值越大),如此可确保有足够的驱动力使掺杂物到接口形成氧化物,但只能略小于二氧化硅,避免在形成阻挡层后掺杂物仍然继续钻入氧化层中;④掺杂物与同在液相环境中,活化能系数需要将近一或大于一,如此可有助于掺杂物移动到接口上。同时,自我生长的阻挡层在工艺上应用必须考虑到掺杂浓度、不同厚度,及退火温度等差异,因为上述因素皆会对抗扩散效果造成变异。基于上述理由,在本实施例中的第二阻挡层130中的至少一金属乃以锰为其掺杂元素。
综上所述,通过第一阻挡层120提供热稳定性,并且也因为有第一阻挡层120,第二阻挡层130厚度可以缩减而降低孔洞中第二阻挡层130所占的比例以有效降低电阻值,利于后段退火时确保其中锰成分完全跑到该含硅基板与该第一阻挡层的界面,避免锰原子残留在铜晶界中造成阻抗升高以及造成缺陷的状况。此外,如图3所示,第二阻挡层130同时可用来填补第一阻挡层120过薄所造成的部分扩散路径,亦即锰原子132会通过这些路径到该含硅基板110和该第一阻挡层120上将含硅基板110表面的孔洞131填平。如图3所示,穿过第一阻挡层120的锰原子132会先和含硅基板110形成锰硅氧化合物,而进一步形成一第三阻挡层覆盖于含硅基板110上。其中该第一阻挡层的厚度范围可介于1nm到10nm之间,而该第二阻挡层的厚度范围可以介于50nm到150nm之间。
接着说明,不同比例的掺杂元素所形成的第二阻挡层在不同的温度下其电阻的变化关系。在一实施例中,使用溅镀(sputter)的方式,于含硅基板上,使钌金属于充满氮气的环境下,同时通入氩气作为保护气体以沉积第一阻挡层120薄膜10nm,其中通入氮气可以使钌金属的结构成为微晶或非晶化结构,以增加抗扩散效果。接着,以锰元素0%、1%、5%、10%分别添加至铜中以形成第二阻挡层,并以溅镀方式将第二阻挡层130镀于第一阻挡层120之上,使第二阻挡层厚度为50nm;通过快速热退火(rapidthermal annealing,RTA)来观察金属薄膜与含硅基板110的热稳定性,同时以实时测量设备,了解该自我生长的阻挡层结构的电阻值随温度变化的状况,其结果如图4a与图4b所示。由图4a和图4b可以知道,随着温度升高,不同比例的铜锰合金电阻值逐渐下降;同时比较图4a和图4b更可以了解,对相同比例的铜锰合金在相同温度之下,多加一层氮化钌的结果其电阻值比没有加氮化钌的结果为小。
参阅图2所示,该图为本发明的自我生长的阻挡层结构第二实施例示意图,其主要结构及制法如同第一实施例所披露,主要不同的处在于将该含硅基板110置换成一沟槽式半导体结构210以符合实际半导体工艺铜导线的应用。如图2所示,所称的半导体工艺铜导线指240。其中,该沟槽式半导体结构210为一或多层介电质所组成;第二阻挡层230用来填补第一阻挡层220过薄所造成的部分扩散路径,亦即掺杂物会通过这些路径到该沟槽式半导体结构210和该第一阻挡层220的界面,将沟槽式半导体结构210表面的孔洞填平,如图3所示;更甚者,穿过第一阻挡层220的锰原子会先和沟槽式半导体结构210形成锰的介电质化合物,而进一步形成一第三阻挡层覆盖于该沟槽式半导体结构210上。
以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详细说明,应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则的内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围的内。
Claims (24)
1.一种自我生长的阻挡层结构,其包括:
一含硅基板;
一第一阻挡层,覆盖于该含硅基板上;及
一第二阻挡层,覆盖于该第一阻挡层之上,且该第二阻挡层为铜合金,其中该铜合金包含铜元素及至少一金属元素,其中该金属元素为扩散速度比铜快且不与铜互溶的元素。
2.如权利要求1所述的自我生长的阻挡层结构,其中该含硅基板可为硅、硅的氧化物或两者的组成物。
3.如权利要求1所述的自我生长的阻挡层结构,其中该第一阻挡层为氮化钌薄膜。
4.如权利要求3所述的自我生长的阻挡层结构,其中该第一阻挡层,其利用溅镀方式将钌金属于充满氮气的环境,使形成氮化钌薄膜于该含硅基板上。
5.如权利要求3所述的自我生长的阻挡层结构,其中该第一阻挡层,用于增加该阻挡层结构的热稳定性。
6.如权利要求1所述的自我生长的阻挡层结构,其中该第二阻挡层为一铜合金薄膜。
7.如权利要求6所述的自我生长的阻挡层结构,其中该铜合金薄膜为铜锰薄膜。
8.如权利要求7所述的自我生长的阻挡层结构,其中该第二阻挡层,其功能同时为铜晶种层。
9.如权利要求7所述的自我生长的阻挡层结构,其中该第二阻挡层,于覆盖至该第一阻挡层后,部份锰原子会穿过该第一阻挡层至该含硅基板,并将该含硅基板表面的孔洞填平。
10.如权利要求9所述的自我生长的阻挡层结构,其中该穿过第一阻挡层的锰原子,进一步和该硅基板形成一锰硅氧化合物而形成一第三阻挡层。
11.如权利要求3所述的自我生长的阻挡层结构,其中该第一阻挡层,其厚度范围介于1nm到10nm之间。
12.如权利要求7所述的自我生长的阻挡层结构,其中该第二阻挡层,其厚度范围介于50nm到150nm之间。
13.一种具有自我生长的阻挡层的沟槽式半导体结构,其包括:
一沟槽式半导体结构;
一第一阻挡层,覆盖于该沟槽式半导体结构上;及
一第二阻挡层,覆盖于该第一阻挡层之上且该第二阻挡层为铜合金,其中该铜合金包含铜元素及至少一金属元素,其中该金属元素为扩散速度比铜快且不与铜互溶的元素。
14.如权利要求13所述的具有自我生长的阻挡层的沟槽式半导体结构,可为一或多层介电质所形成。
15.如权利要求13所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第一阻挡层为氮化钌薄膜。
16.如权利要求15所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第一阻挡层,其利用溅镀方式将钌金属于充满氮气的环境,形成氮化钌薄膜于该沟槽式半导体结构上。
17.如权利要求15所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第一阻挡层,用于增加该阻挡层结构的热稳定性。
18.如权利要求13所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第二阻挡层为一铜合金薄膜。
19.如权利要求18所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该铜合金薄膜为铜锰薄膜。
20.如权利要求19所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第二阻挡层,其功能同时为铜晶种层。
21.如权利要求19所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第二阻挡层,于覆盖至该第一阻挡层后,部份锰原子会穿过该第一阻挡层至该沟槽式半导体结构,并将该沟槽式半导体结构表面的孔洞填平。
22.如权利要求21所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该穿过第一阻挡层的锰原子,进一步和该沟槽式半导体结构的介电质形成一锰介电质化合物而形成一第三阻挡层。
23.如权利要求15所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第一阻挡层,其厚度范围介于1nm到10nm之间。
24.如权利要求19所述的具有自我生长的阻挡层的沟槽式半导体结构,其中该第二阻挡层,其厚度范围介于50nm到150nm之间。
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US7816266B2 (en) * | 2006-10-05 | 2010-10-19 | Stmicroelectronics Crolles 2 Sas | Copper diffusion barrier |
CN102760694A (zh) * | 2011-04-27 | 2012-10-31 | 新加坡商格罗方德半导体私人有限公司 | 形成氧化物经封装传导形体的方法 |
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US7816266B2 (en) * | 2006-10-05 | 2010-10-19 | Stmicroelectronics Crolles 2 Sas | Copper diffusion barrier |
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