CN102738134B - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN102738134B
CN102738134B CN201210115290.5A CN201210115290A CN102738134B CN 102738134 B CN102738134 B CN 102738134B CN 201210115290 A CN201210115290 A CN 201210115290A CN 102738134 B CN102738134 B CN 102738134B
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power supply
supply terminal
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metal pattern
semiconductor device
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CN102738134A (zh
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中西英俊
宫崎裕二
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Argona Technology Co ltd
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Abstract

本发明的目的在于,提供能够防止电源端子成为高温的半导体装置。本申请的发明涉及的半导体装置具备:绝缘衬底;金属图案,在该绝缘衬底之上形成;电源端子,固定在该金属图案之上;以及多个功率芯片,固定在该金属图案之上。而且,其特征在于,该多个功率芯片全部与该电源端子隔开与该电源端子热绝缘的距离。

Description

半导体装置
技术领域
本发明涉及用于例如工业设备的电动机控制等的半导体装置。
背景技术
在专利文献1,公开了经由金属图案连接电源端子和功率芯片的半导体装置。
专利文献1:日本特开2000-307058号公报
发明内容
存在功率芯片所产生的热经由金属图案传导至电源端子(電力端子)从而电源端子成为高温的情况。
本发明为了解决上述那样的课题而作出,其目的在于,提供能够防止电源端子成为高温的半导体装置。
本申请的发明涉及的半导体装置具备:绝缘衬底;金属图案,在该绝缘衬底之上形成;电源端子,固定在该金属图案之上;以及多个功率芯片,固定在该金属图案上。而且,特征在于,该多个功率芯片全部与该电源端子隔开与该电源端子热绝缘的距离。
依据本发明,将电源端子与功率芯片热绝缘,所以能够防止电源端子成为高温。
附图说明
图1是本发明的实施方式涉及的半导体装置的平面图。
图2是图1的II-II截面向视图。
图3是示出电源端子的温度与距离L的关系的图表。
图4是示出在电源端子与IGBT芯片之间经由焊料固定有散热器的情况的截面图。
附图标记说明
10半导体装置;12外壳;14Cu基底;16绝缘衬底;18金属图案;19焊料;20IGBT芯片;22二极管芯片;24引线;26电源端子。
具体实施方式
实施方式
图1是本发明的实施方式涉及的半导体装置的平面图。半导体装置10具备外壳12。在外壳12固定有Cu基底14。在Cu基底14之上固定有多个绝缘衬底16。绝缘衬底16用AlN陶瓷形成。在绝缘衬底16之上形成有金属图案18。金属图案18是用铜形成的图案。
在金属图案18之上固定有IGBT芯片20。另外,在金属图案18之上固定有二极管芯片22。这些利用焊料来固定。金属图案18、IGBT芯片20以及二极管芯片22利用引线24电连接。有时将IGBT芯片20和二极管芯片22称为功率芯片。金属图案18的表面的焊料之中,未用于功率芯片的固定而露出于表面的焊料,用焊料19示出。
在金属图案18之上经由焊料25固定有电源端子26。电源端子26是流过半导体装置10的主电流的端子。在外壳12的侧面固定有信号端子28。信号端子28与IGBT芯片20的栅极连接。
图2是图1的II-II截面向视图。电源端子26经由焊料25而固定于金属图案18。IGBT芯片20经由焊料21而固定于金属图案18。电源端子26与最接近电源端子26的功率芯片(IGBT芯片20)隔开5mm。在图2中电源端子26与功率芯片的最短距离用距离L(5mm)示出。本发明的实施方式1涉及的半导体装置具有多个功率芯片,但是该全部的功率芯片与最接近的电源端子26隔开5mm以上。
图3是示出电源端子26的温度与距离L的关系的图表。当距离L小于5mm时,距离L越小,则受功率芯片的发热的影响,电源端子26的温度越加上升。另一方面,当距离L为5mm以上时,电源端子26的温度与距离L不再有显著的相关。因此,当距离L为5mm以上时,能够将电源端子26和IGBT芯片20热绝缘。此外,本发明中的“热绝缘”并不是完全隔绝传热,而是在实际使用上充分地抑制传热。
电源端子26的温度上升的要因是流入电源端子26的大电流以及从功率芯片的热传导。由于这些要因,存在电源端子的温度上升、电源端子成为高温的情况。然而,依据本发明的实施方式涉及的半导体装置10,将电源端子26与功率芯片热绝缘,因而能够抑制来自功率芯片的热传导所引起的电源端子26的温度上升。因此,能够防止电源端子26成为高温。
本发明的特征在于,多个功率芯片全部与电源端子26隔开与电源端子26热绝缘的距离。所以功率芯片并不限定于IGBT芯片20和二极管芯片22,也可为其中的一个,可也为其他的发热的芯片。另外,金属图案18的材料也不限定于Cu。
另外,本发明并不限定于电源端子与同其最接近的功率芯片的距离为5mm以上。为了将功率芯片和电源端子热绝缘而需要的距离,考虑金属图案的材质和功率芯片达到的温度等来决定即可。
本发明的实施方式涉及的半导体装置10如图2所示,在电源端子26与IGBT芯片20之间,设为形成有焊料19但未固定部件的死区(dead space),但本发明并不限定于此。例如,也可在电源端子26与功率芯片之间的金属图案18固定散热器。图4是示出在电源端子26和IGBT芯片20之间的金属图案18经由焊料19固定有散热器40的情况的截面图。散热器40用散热片形成。在利用散热器40缩短距离L的同时,电源端子26和IGBT芯片20能够热绝缘。

Claims (2)

1.一种半导体装置,其特征在于,具备:
绝缘衬底;
金属图案,在所述绝缘衬底之上形成;
电源端子,固定在所述金属图案之上;
多个功率芯片,固定在所述金属图案之上;以及
焊料,在所述电源端子和所述多个功率芯片之间,未用于所述多个功率芯片的固定而是露出于表面,
所述多个功率芯片全部与所述电源端子隔开与所述电源端子热绝缘的距离。
2.如权利要求1所述的半导体装置,其特征在于,
所述金属图案用铜形成,
所述功率芯片为IGBT芯片或二极管芯片,
所述电源端子与所述多个功率芯片之中与所述电源端子最接近的功率芯片的距离为5mm以上。
CN201210115290.5A 2011-04-13 2012-04-10 半导体装置 Expired - Fee Related CN102738134B (zh)

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Families Citing this family (3)

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KR102034717B1 (ko) * 2013-02-07 2019-10-21 삼성전자주식회사 파워모듈용 기판, 파워모듈용 터미널 및 이들을 포함하는 파워모듈
JP6759784B2 (ja) * 2016-07-12 2020-09-23 三菱電機株式会社 半導体モジュール
JP2020047725A (ja) * 2018-09-18 2020-03-26 トヨタ自動車株式会社 半導体装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4172261A (en) * 1977-01-10 1979-10-23 Nippon Electric Co., Ltd. Semiconductor device having a highly air-tight package
CN1219767A (zh) * 1997-12-08 1999-06-16 东芝株式会社 半导体功率器件的封装及其组装方法
CN101496169A (zh) * 2006-08-31 2009-07-29 大金工业株式会社 电力转换装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3215254B2 (ja) * 1994-03-09 2001-10-02 株式会社東芝 大電力用半導体装置
JP2000307058A (ja) 1999-04-19 2000-11-02 Mitsubishi Electric Corp パワー半導体モジュール
KR101221807B1 (ko) * 2006-12-29 2013-01-14 페어차일드코리아반도체 주식회사 전력 소자 패키지
JP5285348B2 (ja) * 2008-07-30 2013-09-11 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置
JP5182274B2 (ja) * 2009-11-17 2013-04-17 三菱電機株式会社 パワー半導体装置
JP5450192B2 (ja) * 2010-03-24 2014-03-26 日立オートモティブシステムズ株式会社 パワーモジュールとその製造方法
JP5467933B2 (ja) * 2010-05-21 2014-04-09 株式会社東芝 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4172261A (en) * 1977-01-10 1979-10-23 Nippon Electric Co., Ltd. Semiconductor device having a highly air-tight package
CN1219767A (zh) * 1997-12-08 1999-06-16 东芝株式会社 半导体功率器件的封装及其组装方法
CN101496169A (zh) * 2006-08-31 2009-07-29 大金工业株式会社 电力转换装置

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KR20120116859A (ko) 2012-10-23
DE102011090124A1 (de) 2012-10-18
KR101365501B1 (ko) 2014-02-21
CN102738134A (zh) 2012-10-17
JP2012222297A (ja) 2012-11-12
US8455997B2 (en) 2013-06-04
US20120261811A1 (en) 2012-10-18
JP5626087B2 (ja) 2014-11-19

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