CN102681274A - Liquid crystal display array substrate and manufacturing method thereof - Google Patents
Liquid crystal display array substrate and manufacturing method thereof Download PDFInfo
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- CN102681274A CN102681274A CN2011102949493A CN201110294949A CN102681274A CN 102681274 A CN102681274 A CN 102681274A CN 2011102949493 A CN2011102949493 A CN 2011102949493A CN 201110294949 A CN201110294949 A CN 201110294949A CN 102681274 A CN102681274 A CN 102681274A
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- data line
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Abstract
The invention discloses a liquid crystal display array substrate and a manufacturing method thereof. The liquid crystal display array substrate is designed to reduce parasitic capacitance generated between a data wire and a grid scanning wire of the existing array substrate. The array substrate comprises a substrate, and a data wire and a grid scanning wire which are arranged on the substrate in stagger; one of the date wire and the grid scanning wire is disconnected at a stagger area of the date wire and the grid scanning wire, so that two ends are positioned at two sides of the grid scanning wire or the data wire; a lead bridging the data wire or the grid scanning wire is arranged above the disconnecting part of the data wire or the grid scanning wire; an isolation layer and a protection layer are arranged between the lead and the data wire or the grid scanning wire; and the lead is connected with the disconnected data wire or the grid scanning wire through penetrating through a through hole of the protection layer. By adopting the structure, the parasitic capacitance between the data wire and the grid scanning wire on the substrate is reduced; and the delay of the grid scanning wire and the date wire and a kickback voltage instantly generated when a thin film transistor is turned off are reduced.
Description
Technical field
The present invention relates to technical field of liquid crystal display, relate in particular to a kind of LCD (Liquid Crystal Display) array substrate and manufacturing approach thereof.
Background technology
Characteristics such as TFT-LCD (Thin Film Transistor-LCD) is little, low in energy consumption because of its volume, and is radiationless have occupied the leading position of current flat panel display market.The TFT-LCD device is become box-like with color film glass substrate by the array glass substrate.The controlling grid scan line 3 and data line 1 that in array base palte, is provided with the definition pixel region relatively alternately as shown in Figure 1 is provided with pixel electrode 2 and thin film transistor (TFT) in each pixel region.Drive signal is applied on the controlling grid scan line 3, and viewdata signal is applied on the pixel electrode through data line 1.The black matrix of configuration on color membrane substrates makes light can not see through the zone except pixel electrode, at each pixel region color rete is set, and public electrode is set on this basis again.In array base palte and color membrane substrates, charge into liquid crystal, control the deflection of liquid crystal, thereby control the power of light, match displays image information on substrate with color membrane substrates through above-mentioned drive signal and pixel electrode voltage.
At present; The controlling grid scan line 3 and the data line 1 of the array glass substrate of the TFT-LCD of main flow are mutual juxtaposition (as shown in Figure 1); The two separates through insulation course, in traditional T FT-LCD manufacturing process, is direct formation active layer on insulation course promptly; On active layer, form data line 1, the various piece of pixel electrode 2 then.Controlling grid scan line 3 exists juxtaposition with data line 1, and mutual close together, so is prone to produce capacity effect between them.When data line has produced stray capacitance C with between the controlling grid scan line
Gd, just can increase the delay of controlling grid scan line and data line, and in the moment that thin film transistor (TFT) cuts out, controlling grid scan line can produce one to pixel electrode through stray capacitance and recalcitrate voltage Δ V
p, when this recalcitrates voltage and can make pixel electrode do reversal because of the inconsistent formation film flicker of positive and negative pressure.
Summary of the invention
To the problems referred to above, the object of the present invention is to provide a kind of LCD (Liquid Crystal Display) array substrate and manufacturing approach thereof that can effectively reduce the stray capacitance of available data line and the generation of controlling grid scan line staggered place.
For achieving the above object, LCD (Liquid Crystal Display) array substrate according to the invention comprises substrate, is formed at data line that is crisscross arranged and controlling grid scan line on the substrate, it is characterized in that,
At said data line and controlling grid scan line interlaced area place; One of them disconnection of said data line and controlling grid scan line and make two broken ends be in the both sides of respective gate sweep trace or data line; Above said data line or controlling grid scan line gap, be provided with the lead of said data line of a cross-over connection or controlling grid scan line; And be provided with an insulation course and a protective seam between said lead and controlling grid scan line or the data line, said lead connects data line or the controlling grid scan line that breaks off through the via hole that passes protective seam.
Further, said LCD (Liquid Crystal Display) array substrate also comprises pixel electrode, and said lead is identical with the pixel electrode material.。
Preferably, said lead and pixel electrode material are tin indium oxide, indium zinc oxide layer or indium oxide gallium zinc layer.
Further, said data line and said controlling grid scan line are in same metal level.
Further, said data line belongs to metal level on the metal level of said controlling grid scan line place.
Further, said controlling grid scan line belongs to metal level on the metal level of said data line place.
The manufacturing approach of LCD (Liquid Crystal Display) array substrate of the present invention comprises the steps:
Step 4, on the substrate of completing steps 3, form the protective material layer, above data line or controlling grid scan line, form the protective seam that has via hole through photoetching process again, expose data line or controlling grid scan line;
Step 5, on the substrate of completing steps 4, form conductive layer, this conductive layer connects controlling grid scan line or the data line that is in said data line or controlling grid scan line both sides through the two place's via holes that form in the step 4, utilizes photoetching process to make conductive layer form lead again.
Further, said when utilizing photoetching process to make conductive layer form lead, form pixel electrode.
Preferably, said conductive layer is tin indium oxide, indium zinc oxide or indium oxide gallium zinc layer.
The invention has the beneficial effects as follows: the present invention utilizes lead to be connected after in data line and controlling grid scan line staggered place one of them being broken off again; Can between lead and data line or controlling grid scan line, increase layer protective layer, can effectively reduce data line like this with the stray capacitance C between the controlling grid scan line
GdAnd then reduced the delay of controlling grid scan line and data line; Reduced thin film transistor (TFT) at the voltage that recalcitrates that the moment of closing produces, improved when pixel electrode is done reversal of poles under the same GTG, because of the inconsistent phenomenon of picture flicker that forms of the pressure reduction of positive-negative polarity to pixel electrode.
Description of drawings
Fig. 1 is the synoptic diagram of data line and controlling grid scan line juxtaposition on the available liquid crystal display array substrate;
Fig. 2 is the partial top view of LCD (Liquid Crystal Display) array substrate according to the invention;
Fig. 3 be among Fig. 2 A-A to cut-open view.
Fig. 4 is the partial top view of another embodiment of LCD (Liquid Crystal Display) array substrate according to the invention;
Fig. 5 a is the schematic cross-section after forming metallic film on the substrate;
Fig. 5 b is for passing through the schematic cross-section after photoetching process and etching technics form controlling grid scan line;
Fig. 6 is the schematic cross-section after forming insulation course on the substrate that forms controlling grid scan line;
Fig. 7 a is at the schematic cross-section that has formed after forming metal level again on the substrate of insulation course;
Fig. 7 b is for passing through photoetching process and the etching technics schematic cross-section after the zone beyond directly over the said controlling grid scan line forms data line;
Fig. 8 a is the schematic cross-section after forming protective seam on the substrate that forms data line;
Fig. 8 b is through photoetching process and the schematic cross-section of etching technics after the formation via hole exposes the data line of controlling grid scan line both sides above the data line that is in said controlling grid scan line both sides;
Fig. 9 is the schematic cross-section after forming oxide semiconductor layer on the substrate that has formed protective seam.
Embodiment
Do detailed description below in conjunction with the Figure of description specific embodiments of the invention.
As shown in Figures 2 and 3; LCD (Liquid Crystal Display) array substrate according to the invention; Comprise substrate 7; Be formed at data line that is crisscross arranged 1 and controlling grid scan line 3 on the substrate 7, controlling grid scan line 3 and data line 1 enclose the pixel region 2 of formation, and said data line 1 place metal level is on the said controlling grid scan line 3 place metal levels or belongs to the layer of metal layer together; In the time of on said data line 1 place metal level is in said controlling grid scan line 3 place metal levels, separate through insulation course 8 between said controlling grid scan line 3 and the data line 1.In said data line 1 and controlling grid scan line 3 interlaced area, said data line 1 breaks off, and two ends is in the both sides of controlling grid scan line 3 respectively, and above said data line 1 gap, is provided with the lead 6 of the said data line 1 of a cross-over connection; This lead 6 is identical with pixel electrode 2 materials, and said lead 6 is tin indium oxide, indium zinc oxide layer or indium oxide gallium zinc layer with pixel electrode 2 materials.
Be provided with a protective seam 9 between the data line 1 of said lead 6 and said disconnection; This protective seam 9 is provided with via hole 51 and 52 respectively above the data line 1 that is in controlling grid scan line 3 both sides, said lead 6 is connected the data line 1 that is in controlling grid scan line 3 both sides with 52 through this via hole 51.
As shown in Figure 4; LCD (Liquid Crystal Display) array substrate according to the invention; Comprise substrate; Be formed at data line that is crisscross arranged 1 and controlling grid scan line 3 on the substrate, controlling grid scan line 3 and data line 1 enclose the pixel region 2 of formation, and said data line 1 place metal level is under the controlling grid scan line 3 place metal levels or is in and belongs to the layer of metal layer together; When said data line 1 place metal level is under the controlling grid scan line 3 place metal levels, separate through insulation course between said data line 1 and the controlling grid scan line 3.In said data line 1 and controlling grid scan line 3 interlaced area, said controlling grid scan line 3 breaks off, and it breaks off termination and is in the both sides of data line 1 respectively, and above said controlling grid scan line 3 gaps, is provided with the lead 6 of the said controlling grid scan line 3 of a cross-over connection; The mode that lead described in the present embodiment 6 connects the controlling grid scan line 3 that breaks off is with embodiment 1; Promptly realize connecting through the via hole on the protective seam between said lead 6 and the said controlling grid scan line 3; In addition, said lead 6 also can connect the said data line or the controlling grid scan line of disconnection through other modes.Preferably, lead described in the present embodiment 6 is identical with pixel electrode 2 materials, and said lead 6 is tin indium oxide, indium zinc oxide layer or indium oxide gallium zinc layer with pixel electrode 2 materials.
Can find out by the above embodiments; Controlling grid scan line described in the present invention can put in order for multiple with the positional structure of data line; Be that to follow data line be same metal level to controlling grid scan line; Or said data line place metal level is on the metal level of said controlling grid scan line place, or said controlling grid scan line place metal level is on the metal level of said data line place.If controlling grid scan line is same metal level with data line, replace at data line or all available tin indium oxide of controlling grid scan line (ITO), indium zinc oxide (IZO) or the indium oxide gallium zinc layer (IGZO) of data line with the controlling grid scan line interlaced area this moment.If data line is near the bottom of glass substrate; Controlling grid scan line is on data line; Can use tin indium oxide (ITO), indium zinc oxide (IZO) or indium oxide gallium zinc layer (IGZO) to replace the gate metal of interlaced area at data line with the controlling grid scan line interlaced area this moment, and utilize via hole to couple together the controlling grid scan line of data line both sides.If data line place metal level is on the metal level of said controlling grid scan line place (as shown in Figure 3); At this moment; Can use tin indium oxide (ITO), indium zinc oxide (IZO) or indium oxide gallium zinc layer (IGZO) to replace the data line of interlaced area at data line with the controlling grid scan line interlaced area, and utilize via hole to couple together the data line of controlling grid scan line both sides.
The present invention is revising data line with the staggered place of controlling grid scan line; Utilize tin indium oxide or indium zinc oxide or indium oxide gallium zinc layer oxide semiconductor layer to replace the data line or the controlling grid scan line of intervening portion, and utilize via hole to be connected data line or controlling grid scan line that the intervening portion place is broken off.The present invention follows the stray capacitance C between the controlling grid scan line owing to increased data line with the distance between grid metal lines so can reduce data line
GdThereby, reduced the delay of controlling grid scan line and data line, and the further feasible voltage Δ V that recalcitrates
pReduce, so just can improve when pixel electrode is done reversal of poles under the same GTG, inconsistent because of the pressure reduction of positive-negative polarity, and form phenomenon of picture flicker.
LCD (Liquid Crystal Display) array substrate of the present invention can be through following method manufacturing:
1, shown in Fig. 5 a, on substrate 7, form metallic film, this metallic film material can use metals such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper, also can use the combination of above-mentioned material film; Shown in Fig. 5 b, form controlling grid scan line 3 then through photoetching process and etching technics;
2, on the substrate 7 that forms controlling grid scan line, form insulation course 8, as shown in Figure 6;
3, shown in Fig. 7 a, on the substrate that has deposited insulation course 7, form metal level again, then through the zone formation data line 1 beyond photoetching process and etching technics are directly over said controlling grid scan line 3, shown in Fig. 7 b;
4, shown in Fig. 8 a, on the substrate 7 that forms data line, form the protective material layer, above data line 1, form the protective seam 9 that has via hole 51 and 52 through photoetching process again, expose data line 1; Shown in Fig. 8 b;
5, as shown in Figure 9, on the substrate 7 of completing steps 4, form conductive layer, this conductive layer is connected the data line 1 that is in said controlling grid scan line 3 both sides through the two place's via holes 51 that form in the step 4 with 52, utilize photoetching process to make conductive layer form lead 6 again.
Embodiment 4
1, on substrate, forms metallic film, form data line through photoetching process and etching technics;
2, on the substrate that forms data line, form insulation course;
3, form gate metal layer again forming on the substrate of insulation course, then through photoetching process and zone formation controlling grid scan line beyond etching technics is directly over said data line;
4, on the substrate that forms controlling grid scan line, form the protective material layer, and then above the controlling grid scan line that is in said data line both sides, form the protective seam that has via hole, expose the controlling grid scan line of data line both sides through photoetching process or etching technics;
5, conductive layer on the substrate that has formed protective seam, said conductive layer connects the controlling grid scan line that is in said data line both sides through the two place's via holes that form in the step 4, utilizes photoetching process to make conductive layer form lead again.
The said conductive layer that final step forms among the foregoing description 3 and the embodiment 4 is preferably tin indium oxide or indium zinc oxide or indium oxide gallium zinc layer.
More than; Be merely preferred embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technician who is familiar with the present technique field is in the technical scope that the present invention discloses; The variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain that claim was defined.
Claims (9)
1. a LCD (Liquid Crystal Display) array substrate comprises substrate, is formed at data line that is crisscross arranged and controlling grid scan line on the substrate, it is characterized in that,
At said data line and controlling grid scan line interlaced area place; One of them disconnection of said data line and controlling grid scan line and make two broken ends be in the both sides of respective gate sweep trace or data line; Above said data line or controlling grid scan line gap, be provided with the lead of said data line of a cross-over connection or controlling grid scan line; And be provided with an insulation course and a protective seam between said lead and data line or the controlling grid scan line, said lead connects data line or the controlling grid scan line that breaks off through the via hole that passes protective seam.
2. according to the said LCD (Liquid Crystal Display) array substrate of claim 1, it is characterized in that said LCD (Liquid Crystal Display) array substrate also comprises pixel electrode, said lead is identical with the pixel electrode material.
3. according to the said LCD (Liquid Crystal Display) array substrate of claim 2, it is characterized in that said lead and pixel electrode material are tin indium oxide, indium zinc oxide layer or indium oxide gallium zinc layer.
4. according to the said LCD (Liquid Crystal Display) array substrate of claim 1, it is characterized in that said data line and said controlling grid scan line are in same metal level.
5. according to the said LCD (Liquid Crystal Display) array substrate of claim 1, it is characterized in that said data line place metal level is on the metal level of said controlling grid scan line place.
6. according to the said LCD (Liquid Crystal Display) array substrate of claim 1, it is characterized in that said controlling grid scan line place metal level is on the metal level of said data line place.
7. the manufacturing approach of the described LCD (Liquid Crystal Display) array substrate of claim 1 is characterized in that, comprises the steps:
Step 1, on substrate, form metallic film, form controlling grid scan line or data line through photoetching process and etching technics;
Step 2, on the substrate of completing steps 1, form insulation course;
Step 3, on the substrate of completing steps 2, form metal level, again through photoetching process and zone formation data line or controlling grid scan line beyond etching technics is directly over said controlling grid scan line or data line;
Step 4, on the substrate of completing steps 3, form the protective material layer, above data line or controlling grid scan line, form the protective seam that has via hole through photoetching process again, expose data line or controlling grid scan line;
Step 5, on the substrate of completing steps 4, form conductive layer, this conductive layer connects controlling grid scan line or the data line that is in said data line or controlling grid scan line both sides through the two place's via holes that form in the step 4, utilizes photoetching process to make conductive layer form lead again.
8. the manufacturing approach of LCD (Liquid Crystal Display) array substrate according to claim 7 is characterized in that, and is said when utilizing photoetching process to make conductive layer form lead, forms pixel electrode.
9. the manufacturing approach of LCD (Liquid Crystal Display) array substrate according to claim 7 is characterized in that, said conductive layer is tin indium oxide, indium zinc oxide or indium oxide gallium zinc layer.
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| CN109272882A (en) * | 2018-12-10 | 2019-01-25 | 云赛智联股份有限公司 | A kind of transparent small space distance LED display screen |
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