CN102655134A - 功率半导体器件封装及制造方法 - Google Patents

功率半导体器件封装及制造方法 Download PDF

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CN102655134A
CN102655134A CN2012101854448A CN201210185444A CN102655134A CN 102655134 A CN102655134 A CN 102655134A CN 2012101854448 A CN2012101854448 A CN 2012101854448A CN 201210185444 A CN201210185444 A CN 201210185444A CN 102655134 A CN102655134 A CN 102655134A
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power semiconductor
syndeton
present
encapsulation
semiconductor wafer
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鲁军
弗兰克斯·赫尔伯特
刘凯
张晓天
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Alpha and Omega Semiconductor Ltd
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Abstract

本发明公开了一种功率半导体器件封装包括一个带有连接结构的导电装置，以及一个带有贯穿开口的半导体晶片，开口的尺寸和结构要足够容纳连接结构。在一个可选实施例中，一种功率半导体器件封装包括一个带有连接结构的导电装置，以及一对半导体晶片，设置在连接结构的任意一侧，并间隔一定的距离。

Description

功率半导体器件封装及制造方法
技术领域
本发明主要涉及半导体器件的封装，更确切地说，是一种带有以连接结构为特点的导电装置的功率半导体器件的封装。
背景技术
通过封装材料和工艺具有改良的热扩散结构和机制以及更低的热阻、很低的寄生电容和电感，功率半导体器件封装方面的改进有利于更高功率密度的封装。用于增强功率半导体器件封装性能的技术包括：暴露功率半导体晶粒的顶面和底面，以便增大热扩散；除去引线接合，以便降低寄生效应；以及降低封装波形因数和结构，以便获得芯片级尺寸封装。制作过程的简化有助于降低封装方法的成本。
用于改善功率半导体器件封装的整体性能的原有技术包括：美国专利号为3,972,062的名为《用于多个晶体管集成电路晶片的装配组件》的专利中提出的一种装配组件。如图1所示，在装配组件的空穴22中，每个装配组件30都含有一个晶体管晶片10，装贴在第一电极18上。这种组装包括支撑垫或支脚32、34的装配。如上所述，晶体管芯片10的终端16、14，从表面上延伸到装配沟道部分平放的支脚32、34所在的平面中。装配组件的支脚32、34不仅提供支撑，还为晶片的晶体管集电极提供连接。另外，叠加的沟道部分可保护晶体管晶片，更确切地说，它可作为散热片使用。
以下专利还提出了许多其他的类似设计：美国专利号6,624,522、7,122, 887、6,767,820、 6,890,845、7,253,090、7,285,866、6,930,397以及6,893,901，美国已公开专利申请2007/0091546、2007/0194441、2007/0202631、2008/0066303和 2007/0284722，以及美国外观设计专利号D503,691。
发明内容
本发明所述的功率半导体器件包括一个以连接结构为特征的导电装置。例如，此连接结构为半导体器件终端盒外部贴装表面（例如印刷电路板（PCB））之间提供连接。更确切地说，此连接结构可以提供从半导体晶粒的第二表面到印刷电路板（PCB）的连接，其中第二表面背对着印刷电路板（PCB）。当半导体晶粒的第一表面正对着印刷电路板（PCB）时，可以直接从第一表面上的半导体器件终端，连接到印刷电路板（PCB）上。
依据本发明的另一方面，一个功率半导体器件封装包括一个单一半导体晶粒，通过一个形成在此半导体晶粒中的开口，设置连接结构。
依据本发明的另一方面，一个功率半导体器件封装包括一对平行耦合的半导体晶粒，在这对半导体晶粒之间，设置连接结构。
依据本发明的另一方面，一个功率半导体器件封装包括一个含有连接结构和半导体晶粒的导电装置，其中在半导体晶粒中形成一个开口，这个开口的尺寸和结构足够容纳连接结构。
依据本发明的另一方面，一个功率半导体器件封装包括一个含有连接结构以及一对半导体晶粒的导电装置，这一对半导体晶粒设置在连接装置的两侧，并间隔一定的距离。
依据本发明的另一方面，一个功率半导体器件封装包括一个具有连接结构的平板部分以及一个电耦合到平板部分上的半导体晶粒，其中在半导体晶粒中形成一个开口，这个开口的尺寸和结构足够容纳连接结构。
依据本发明的另一方面，一个功率半导体器件封装包括一个导电装置，这个导电装置包括一个具有连接结构的平板部分以及一对电耦合到平板部分上的半导体晶粒，这一对半导体晶粒设置在连接结构的两侧，并间隔一定的距离。这个连接结构可以延伸至与导电装置的平板结构相对的半导体晶粒的一面（以及面上的任何接点）近似共面的位置。
依据本发明的一个优选实施例，一个功率半导体器件封装包括，一个带有相反对面和接点的半导体晶片，第一套接点设置在所述相反对面的一个面上，第二套接点设置在所述相反对面的另一面上；以及
一个与所述的第一套接点保持机械接触的导电装置，所述的导电装置带有一个导电连接结构，朝所述的另一面延伸，远离所述的第一套接点，终止在所述的第二套接点附近；
其中所述的半导体晶片包括一个在所述的相反对面之间延伸的开口，并且所述的导电装置穿过所述的开口。
依据本发明的另一个优选实施例，一个功率半导体器件封装包括，带有相反对面和多个接点的多个间隔的半导体晶片，第一套接点设置在所述的相反对面的一个面上，第二套接点设置在所述的相反对面的另一面上；以及
一个与所述的第一套接点保持机械接触的导电装置，带有一个设置在所述的多个间隔的半导体晶片之间的导电连接结构，沿远离所述的第一套接点的第一方向朝所述的另一面延伸并终止在所述的第二套接点附近。 
依据本发明的另一个优选实施例, 其中所述的多个半导体晶片沿第二方向分隔开，所述的导电连接结构沿着与所述的第一和第二方向垂直的第三方向延伸，所述的第二方向与第一方向垂直。   依据本发明的另一个优选实施例,所述的导电连接结构沿所述的第三方向测量有一长度，并且在所述的导电连接结构中形成一个沟道，沿所述的长度延伸。
依据本发明的另一方面，一种制造功率半导体器件封装的方法包括：制备一个导电平板；在导电板上间隔形成连接结构；贴上半导体晶粒，以便在相邻的沟道中间设置一对半导体晶粒；将导电平板切成功率半导体器件封装，使一对半导体晶粒被一个沟道隔开。
为了更好地理解以下的详细说明，以及更好地掌握本发明对现有技术的贡献，本文已大体概述了本发明的重要特点。当然，下文还将详细介绍本发明的许多其他特点，而且这将构成附录的权利要求书中的主旨内容。
因此，在详细介绍本发明的至少一个实施例之前，应指出本发明并不仅限于下文说明中或附图中所应用的设计细节以及元件结构。本发明还可以适用于其他实施例，并且可通过各种方法实现。另外，应指出本文以及附录所使用的措辞和术语，都仅作为解释说明，并不作为局限。
对于本领域的技术人员而言，为了实现本发明的多种用途，本发明的基本思路可以作为其他方法和系统的设计基础。因此，应认为权利要求书已涵盖了这些同等的方法和系统，其并没有违背本发明的意图和范围。 
附图说明
参考以下附图，本领域的技术人员将清楚掌握本发明的各种特点和优势：
图1为原有技术的功率半导体器件封装的装配组件的透视图；
图2表示根据本发明的第一实施例，功率半导体器件封装的仰视平面图；
图3表示依据本发明的第一实施例，功率半导体器件封装的截面图；
图4表示依据本发明的第二实施例，功率半导体器件封装的仰视平面图；
图5表示依据本发明的第二实施例，功率半导体器件封装的截面图；
图6表示依据本发明的第三实施例，功率半导体器件封装的仰视平面图；
图7表示依据本发明的第三实施例，功率半导体器件封装的截面图；
图8表示依据本发明的第三实施例，平行耦合的一对半导体晶片示意图；
图9表示依据本发明的一种可选方式，功率半导体器件封装的仰视平面图；
图10表示依据本发明的一种可选方式，功率半导体器件封装的截面图；
图11表示依据本发明的第四实施例，功率半导体器件封装的仰视平面图；
图12表示依据本发明的第四实施例，功率半导体器件封装的截面图；
图13表示依据本发明的第五实施例，功率半导体器件封装的仰视平面图；
图14表示依据本发明的第五实施例，功率半导体器件封装的截面图；
图15表示依据本发明的第六实施例，功率半导体器件封装的仰视平面图；
图16表示依据本发明的第六实施例，功率半导体器件封装的截面图；
图17表示依据本发明的第六实施例，功率半导体器件封装的一个可选部分的截面图；
图18表示依据本发明的第七实施例，功率半导体器件封装的仰视平面图； 
图19表示依据本发明的第七实施例，功率半导体器件封装的截面图；
图20表示依据本发明的第八实施例，功率半导体器件封装的仰视平面图；
图21表示依据本发明的第八实施例，功率半导体器件封装的截面图；
图22-25系统地表示本发明的制造工艺； 
图26表示本发明的方法步骤的流程图。
具体实施方式
图2和3表示依据本发明，功率半导体封装100的第一个实施例。功率半导体器件100包括一个设置在第一表面117上，带有多个源级接点110和一个栅极接点115的半导体晶片105，其中源级接点110和栅极接点115通过钝化层130相互绝缘。钝化层130含有二氧化硅、氮化硅、聚酰亚胺或它们的混合物。漏极接点120设置在与第一表面117相对的第二表面125上。半导体晶片105还包括一个贯穿的圆开口135。
功率半导体封装100还包括一个由导电材料组成的导电装置150，以便容纳半导体晶片105。导电装置150有利于提供热扩散以及电传导。导电装置150包括一个矩形结构的平板部分153，半导体晶片105的漏极接点120以及柱形连接结构155都电连接到平板部分153上。柱形连接结构155从平板结构153上垂下来，从平板部分的底面157开始延伸，并穿过半导体晶片105。在本例中，柱形连接结构155的一端，与钝化层130以及栅极和源极接点115、110大致在同一平面上。
通过导电焊锡、环氧树脂等适当的方法，将半导体晶片105附着在平板部分底面157上，使得柱形连接结构155设置在空白处，穿过半导体晶片105中的圆开口135。柱形连接结构155在漏极接点120和印刷电路板（图中没有表示出）等贴装衬底之间，形成电连接。在该实施例中，圆开口135大致位于导电装置150的中心位置。
图4和5表示依据本发明，功率半导体器件封装100a的第二个实施例。功率半导体器件封装100a中除了连接结构155a以及开口135a都是矩形之外，在其他各个方面都与功率半导体器件封装100一样。
图6和7表示依据本发明，功率半导体器件封装200的第三个实施例。与第一个和第二个实施例相比，第三个实施例包括一对半导体晶片205和207。半导体晶片205和207含有平行耦合的一对P场效应管器件或一对N场效应管器件，可作为图8所示的独立器件。半导体晶片205和207都含有设置在第一表面217上的多个源级接点210和一个栅极接点215，通过钝化层230，源级接点210和栅极接点215互相绝缘。钝化层230含有SiO、SiN、聚酰亚胺或它们的混合物。漏极接点220设置在半导体晶片205和207的第二表面225上，第二表面225在第一表面217的对面。
功率半导体器件封装200还包括一个由导电材料组成的导电装置250，以便容纳半导体晶片205和207。带有连接结构255的导电装置250通常为“T”形，并且有利于热扩散和电传导。导电装置250包括矩形装置的平板部分253以及连接结构255，漏极接点220电连接到矩形装置上。连接结构255从平板结构253上垂直下来，从平板部分的底面257开始延伸，一直到与钝化层230（以及源级和栅极接点210、215）大致在同一平面的位置。与第一个和第二个实施例中的连接结构155和155a相比，连接结构255沿导电装置250的宽度方向延伸。
半导体晶片205和207通过它们的漏极接点220，以导电环氧树脂（或焊锡膏或其他同类材料，图中没有表示出）的方式，附着到位于连接结构220的任意一侧的平板部分底面257上，使得半导体晶片205和207位于远离连接结构255处。连接结构255，为漏极接点220和印刷电路板等衬底（图中没有表示出）之间，提供电接触。 
图9和图10表示功率半导体封装200的一种可选结构。连接结构255的底部表面上有一个槽口256，使安装衬底（例如印刷电路板）不仅可以将半导体晶片205和207的源极210电极一起导入到连接结构255下方，还可以将半导体晶片205和207的栅极215导入到一起。在本实施例中，这些内部通道可以全部在半导体器件封装中实现。也可选择将槽口256放置在连接结构255的中心位置，而不是在它的一个末端上。
图11和12表示依据本发明，功率半导体器件封装300的第四个实施例。与第三个实施例相比，导电装置350通常为“M”形，并且含有一套侧翼351。这一套侧翼351与导电装置350的边370成一定的夹角。在功率半导体器件封装的处理和制作等过程中，这一套侧翼 351可以保护半导体晶片305和307。其优势在于，功率半导体器件封装300的制作过程并不需要额外的处理工艺。组装后，晶片上面的端子连接，仍然从侧面可见。 
图13和14表示依据本发明，功率半导体器件封装400的第五个实施例。与第三、第四个实施例相比，导电装置450具有一个形成在其中点的沟道460。沟道460作为导电装置450的连接结构。沟道460的底部461与钝化层430基本共面。其优势在于，沟道460可通过 压印导电板制成，不仅快捷简便，而且经济实用。
图15和16表示依据本发明，功率半导体器件封装500的第六个实施例。与第五个实施例相比，导电装置550具有一个形成在其中点的沟道560，而且带有角度墙。沟道560的底部561与钝化层530共面。其优势在于，沟道560可通过压印导电板制成。沟道560还可选用如图17所示的“W ”形结构。
图18和19表示依据本发明，功率半导体器件封装600的第七个实施例。与第五个实施例相比，导电装置650具有一个形成在沟道660中的开口680。沟道660为圆柱形，使得连接结构带有柱形结构。开口 680可以是如图所示的圆形，也可以是其他任何形状，便于提供更好的可焊性，并增强可靠性。
图20和21表示依据本发明，功率半导体器件封装700的第八个实施例，它与图15-17所示的半导体器件封装500的第六个实施例类似。第六个实施例相比，导电装置750具有一个形成在沟道760中的开口780。开口780可以是如图所示的矩形，也可以是其他任何形状，便于提供更好的可焊性，并增强可靠性。
图22至图25和图26表示依据本发明的一种典型制备方法900。在工序910中，制备导电板800。在工序920中，连接结构810（在本例中为沟道）间隔形成在导电板800中。作为示例，这些沟道可以通过压印工艺形成。在工序930中，半导体晶片820被间隔附着在导电板800上，以至于在相邻的沟道810之间设置着一对半导体晶片。最后，在工序940中，导电板800被切割成独立功率半导体器件封装，一对半导体晶片820被沟道810分隔开。
本发明的功率半导体器件封装，提出了一种带有裸露顶面以及裸露半导体晶片的封装方式，增强了热扩散。如果一对半导体晶片并行耦合在封装中，那么这对半导体晶片将作为一个独立器件，提供更好的功率控制能力。
上文对本发明实施例的说明，仅作为解释说明，并不能作为限制或局限本发明的具体形式。根据上述说明，还可能存在多种修正和变化。例如，在第三、第四、第五、第六、第七、第八个实施例含有串联在一起的一个场效应管器件和一个二极管、一对二极管和一对场效应管（例如一个高端场效应管和一个低端场效应管），在功率半导体器件封装中，都可以容纳任何两个半导体器件。本发明也不局限于两种半导体器件，例如连接结构的一边可以是一种金属氧化物半导体场效应管，另一边可以是另一种金属氧化物半导体场效应管和一种二极管。此外，场效应管器件可以具有漏极和栅极接点在同一面等各种不同的连接结构。而且，沟道也可以是任何结构和形状。因此，本发明的范围不局限于上述详细说明，而应由所附的权利要求书决定。

Claims (7)

1.一种功率半导体器件封装，其特征在于，包括：
一个含有平板部分的导电装置，平板结构上有一个连接结构；以及
一对半导体晶片电耦合到平板部分，设置在连接结构的两侧，并间隔一定的距离。
2.如权利要求1所述的一种功率半导体器件封装，其特征在于，导电装置通常为“T”形。
3.如权利要求1所述的一种功率半导体器件封装，其特征在于，连接结构为一个沟道。
4.一种制备功率半导体器件封装的方法，其特征在于，包括以下步骤：
制备一个导电板；
在导电板上间隔形成连接结构；
贴上半导体晶片，使得在相邻的连接结构之间，设置有一对半导体晶片；以及
切割导电板形成功率半导体器件独立封装，连接结构将一对半导体晶片分隔开。
5.如权利要求4中所述的一种制备功率半导体器件封装的方法，其特征在于，连接结构为一个沟道。
6.如权利要求5中所述的一种制备功率半导体器件封装的方法，其特征在于，通过压印导电板的方式，间隔形成连接结构。
7.如权利要求5中所述的一种制备功率半导体器件封装的方法，其特征在于，在导电板上形成连接结构，使连接结构末端最接近这对半导体晶片的面缘平面，并与导电板上附着的半导体晶片的面缘平面相对。
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CN101930957B (zh) 2013-10-23
TWI469290B (zh) 2015-01-11

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