CN102569101B - 无外引脚封装结构及其制作方法 - Google Patents
无外引脚封装结构及其制作方法 Download PDFInfo
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Abstract
本发明提出一种无外引脚封装结构及其制作方法。该制作方法包括:提供一具有彼此相对的一上表面及一下表面的金属基板。图案化金属基板的上表面及下表面,以使上表面形成多个第一凸部及至少一第二凸部,于下表面上形成多个对应第一凸部的第一凹槽图案。于第一凹槽图案内分别形成一第一焊料层。将一芯片固定于第二凸部上。形成多条导线分别电性连接芯片至第一凸部。于金属基板的上表面上形成一封装胶体。以第一焊料层为一蚀刻掩膜,对金属基板的下表面进行一背蚀刻制程,以移除金属基板的部分区域至暴露出封装胶体,并定义出一包含至少一承载芯片的芯片座及多个彼此分离的引脚的导脚群组。
Description
技术领域
本发明是有关于一种无外引脚封装结构,且特别是有关于一种引脚突出的四方/二方扁平无外引脚封装(Quad/Dual Flat Non-leaded package,QFN/DFNpackage)结构及其制作方法。
背景技术
半导体封装技术包含有许多封装形态,其中属于扁平封装系列的四方/二方扁平无外引脚封装具有较短的信号传递路径及相对较快的信号传递速度,因此四方/二方扁平无外引脚封装适用于高频传输(例如射频频带)的芯片封装,且为低脚位(low pin count)封装型态的主流之一。
在四方/二方扁平无外引脚封装的制程中,先将多个芯片配置于平面型引脚框架(leadframe)上。然后,藉由多条导线使芯片电性连接至引脚框架。最后,藉由封装胶体来包覆部分引脚框架、导线以及芯片。然后,藉由切割制程(punchprocess)或锯切制程(sawing process)单体化上述结构而得到多个四方/二方扁平无外引脚封装结构。
为了解决使用者对于小尺寸芯片的处理能力的需求,业者通常会试着增加引脚密度来达成所需的目的。然而,四方/二方扁平无外引脚所使用的引脚框架很难达成单行以外的引脚数,因此当使用者对于引脚框架的引脚密度的需求越来越高时,如何利用封装技术来形成所需的引脚密度,实为一待解决的问题。再者,除了增加引脚密度之外,使用者也希望能维持封装胶体与引脚之间的结合力(mold locking),并促进四方/二方扁平无外引脚封装结构能藉由表面粘着技术焊接于一印刷电路板上,以增加其应用性。
发明内容
本发明提供一种无外引脚封装结构,例如是四方/二方扁平无外引脚(QFN/DFN)封装结构,其具有突出于封装胶体之外的引脚及配置于引脚的下表面上的焊料层,其中焊料层除了可视为引脚的保护层之外,其亦可减少后续将无外引脚封装结构藉由表面粘着技术焊接于印刷电路板上的制程步骤,可有效提高后续制程的便利性。
本发明提供一种无外引脚封装结构的制作方法,用以制作上述的无外引脚封装结构,具有较佳的结构可靠度且可有效提高后续制程的便利性。
本发明提供一种无外引脚封装结构的制作方法,其包括下述步骤。提供一金属基板。金属基板具有彼此相对的一上表面及一下表面。图案化金属基板的上表面以及下表面,以使上表面形成多个第一凸部以及至少一第二凸部,以及下表面上形成多个对应第一凸部的第一凹槽图案。于第一凹槽图案内分别形成一第一焊料层。将一芯片固定于第二凸部上。形成多条导线分别电性连接芯片至第一凸部。于金属基板的上表面上形成一封装胶体,其中封装胶体覆盖芯片、第一凸部、第二凸部以及导线。以第一焊料层为一蚀刻掩膜,对金属基板的下表面进行一背蚀刻制程,以移除金属基板的部分区域至暴露出封装胶体,并定义出一导脚群组,导脚群组包含至少一承载芯片的芯片座以及多个彼此分离的引脚。引脚的一下表面以及至少一侧表面的局部显露于封装胶体之外并且局部为第一焊料层所包覆。
在本发明的一实施例中,上述的第一凹槽图案定义出引脚显露于封装胶体外的下表面以及侧表面的局部外部轮廓。
在本发明的一实施例中,于上述的图案化金属基板之后,形成一金属镀层于第一凸部上。
在本发明的一实施例中,上述的对金属基板的下表面进行背蚀刻制程的同时,形成一第一颈缩部于引脚的侧表面上。
在本发明的一实施例中,上述的对金属基板的下表面进行背蚀刻制程之后,对第一焊料层进行一回焊步骤,其中部分第一焊料层延伸并填充于引脚的第一颈缩部内。
在本发明的一实施例中,于上述的图案化金属基板的同时,于金属基板的下表面上形成一第二凹槽图案,其中第二凹槽图案对应第二凸部。形成第一焊料层于第一凹槽图案内的同时,将第一焊料层形成于第二凹槽图案内。
在本发明的一实施例中,于上述的图案化金属基板时,于金属基板的上表面上形成多个第三凹槽图案,其中第三凹槽图案环绕第一凸部并对应于第一凹槽图案。形成第一焊料层的同时,于第三凹槽图案内形成一第二焊料层。
在本发明的一实施例中,上述的第一凹槽图案包括一第一凹部以及一第二凹部。第二凹部环绕第一凹部,且第二凹部相对于下表面的深度大于第一凹部相对于下表面的深度。
本发明提供一种无外引脚封装结构,其包括一导脚群组、一芯片、一封装胶体以及一焊料层。导脚群组包括一芯片座以及多个引脚,其中引脚围绕芯片座配置。芯片配置于导脚群组的芯片座上且以多条导线分别电性连接至引脚。封装胶体覆盖芯片、导线以及导脚群组,其中封装胶体暴露出芯片座的一底面以及引脚的一下表面与至少一侧表面的局部。焊料层包覆封装胶体所暴露出的引脚的下表面以及侧表面的局部。
在本发明的一实施例中,上述的引脚的侧表面上包含一第一颈缩部,且部分焊料层延伸并填充于第一颈缩部内。
在本发明的一实施例中,上述的焊料层更配置于芯片座的底面上。
在本发明的一实施例中,上述的封装胶体更暴露出芯片座的多个侧表面的局部,且焊料层包覆芯片座的底面以及侧表面的局部。
在本发明的一实施例中,上述的封装胶体所暴露的芯片座的多个侧表面上包含一第二颈缩部,且部分焊料层延伸并填充于第二颈缩部内。
基于上述,相较于已知技术必须先涂布锡层才能将无外引脚封装结构焊接至印刷电路板上而言,本发明是先将焊料层形成于金属基板的下表面的凹槽图案内,所以经由背蚀刻制程之后,即可形成突出于封装胶体之外的引脚及位于引脚的下表面上的焊料层。因此,本发明的焊料层的设计除了可视为引脚的保护层之外,其亦可减少后续将无外引脚封装结构藉由表面粘着技术焊接于印刷电路板上的制程步骤,可有效提高产品的可靠度与后续制程的便利性。
附图说明
为让本发明的上述目的、特征和优点能更明显易懂,以下结合附图对本发明的具体实施方式作详细说明,其中:
图1A至图1E为本发明的一实施例的一种无外引脚封装结构的制作方法的剖面示意图。
图2A至图2C为图1A虚圆处的第一凹部与第二凹部的各种实施例的示意图。
图3A至图3C为本发明的另一实施例的一种无外引脚封装结构的制作方法的剖面示意图。
图4A至图4C为本发明的又一实施例的一种无外引脚封装结构的制作方法的剖面示意图。
主要元件符号说明:
100a、100b、100c:无外引脚封装结构
110:金属基板
111a:上表面
111b:下表面
112、112’、112”:导脚群组
112a、112a’、112a”:引脚
112b、112b’、112b”:芯片座
113a、113a’:下表面
113b:侧表面
113c、113c’、113c”:第一颈缩部
114a:第一凸部
114b:第二凸部
115a、115a’:第一凹槽图案
115b:第二凹槽图案
115c:第三凹槽图案
116a:第一凹部
116b:第二凹部
117a、117a’、117a”:底面
117b:侧表面
117c:第二颈缩部
120:第一焊料层
125:第二焊料层
130:芯片
140:封装胶体
142:底面
150:金属镀层
160:粘着层
170:导线
具体实施方式
图1A至图1E为本发明的一实施例的一种无外引脚封装结构的制作方法的剖面示意图。请结合参考图2A-2C,其中,图2A为图1A虚圆处的第一凹部与第二凹部的剖面示意图,图2B为图1A虚圆处的一实施例的第一凹部与第二凹部的俯视示意图,而图2C为图1A虚圆处的另一实施例的第一凹部与第二凹部的俯视示意图,本实施例的无外引脚封装结构的制作方法包括以下步骤。首先,请参考图1A,提供一金属基板110。详细来说,本实施例的金属基板110具有彼此相对的一上表面111a及一下表面111b。
接着,请再参考图1A,图案化金属基板110的上表面111a以及下表面111b,以使上表面111a形成多个第一凸部114a以及至少一第二凸部114b,以及于下表面111b上形成多个对应第一凸部114a的第一凹槽图案115a以及对应第二凸部114b的一第二凹槽图案115b。特别是,请参考图2A,在本实施例中,第一凹槽图案115a包括一第一凹部116a以及一第二凹部116b,其中第二凹部116b环绕第一凹部116a,且第二凹部116b相对于下表面111b的深度大于第一凹部116a相对于下表面111b的深度。也就是说,第一凹槽图案115a为具有两种不同深度的凹部。同理,在本实施例中,如图1A所示,第二凹槽图案115b亦可具有两种不同深度的凹部,但并不以此为限。此外,第一凹部116a与第二凹部116b的形状可例如是矩形,请参考图2B,或圆形/椭圆形,请参考图2C,在此并不加以限制。另外,在本实施例中,形成第一凹槽图案115a以及第二凹槽图案115b的方法例如是采用蚀刻法或激光烧蚀法,而金属基板110例如是铜基板。
接着,请再参考图1B,于每一第一凹槽图案115a内以及第二凹槽图案115b内形成一第一焊料层120。在本实施例中,第一焊料层120的材质例如是锡铅焊料或无铅焊锡。
接着,请再参考图1B,第一凸部114a上可选择性地形成一金属镀层150。在本实施例中,金属镀层150的材质例如是金、银或钯。
接着,请参考图1C,将一芯片130固定于第二凸部114b上,其中芯片130与第二凸部114b之间形成一粘着层160,使芯片130可透过粘着层160而固定于第二凸部114b上,其中粘着层160的种类例如是环氧树脂(epoxy resin)胶或粘晶薄膜(die attach film)。
接着,请再参考图1C,进行打线接合制程,形成多条导线170以分别电性连接芯片130上的焊垫(未绘示)至所对应的第一凸部114a。
然后,请再参考图1C,进行封胶制程(molding),以形成一封装胶体140于金属基板110的上表面111a上,其中封装胶体140覆盖芯片130、第一凸部114a、第二凸部114b以及导线170。
最后,请同时参考图1C与图1D,以第一焊料层120为一蚀刻掩膜,对金属基板110的下表面111b进行一背蚀刻制程,以移除金属基板110的部分区域至暴露出封装胶体140,并定义出多个彼此分离的引脚112a以及至少一承载芯片130的芯片座112b,而引脚112a与芯片座112b即构成所谓的导脚群组112。其中,引脚112a围绕芯片座112b,且引脚112a的排列方式为至少一环状排列或阵列排列,在此并不加以限制。
由于第一凹槽图案115a与第二凹槽图案115b皆具有两种深度的凹部,因此当第一焊料层120填充于第一凹槽图案115a与第二凹槽图案115b时,引脚112a的部分侧表面113b会预先被第一焊料层120所包覆。详细来说,引脚112a的一下表面113a以及至少一侧表面113b的局部显露于封装胶体140之外,即引脚112a突出于封装胶体140之外,并且局部为第一焊料层120所包覆,其中每一第一凹槽图案115a定义出每一引脚112a显露于封装胶体140外的下表面113a以及侧表面113b的局部外部轮廓,而第二凹槽图案115b定义出芯片座112b显露于封装胶体140外的下表面117a以及侧表面117b的局部外部轮廓。必需说明的是,当引脚112a的外形为矩形或多边形时,其可具有多个侧表面113b,但当引脚112a的外形为圆形或椭圆形时,其仅具有一个侧表面113b。在此并不限制引脚112a的外形。
此外,在本实施例中,背蚀刻制程会在每一引脚112a的侧表面113b上形成一第一颈缩部113c,以及在芯片座112b的侧表面117b上形成一第二颈缩部117c。特别是,在本实施例中,由于第一凹槽图案115a与第二凹槽图案115b皆具有两种深度的凹部,因此当由背蚀刻制程而形成第一颈缩部113c以及第二颈缩部117c时,第一颈缩部113c以及第二颈缩部117c的位置会较为接近封装胶体140。至此,已大致完成无外引脚封装结构100a的制作。
简言之,本实施例的无外引脚封装结构100a包括导脚群组112、第一焊料层120、芯片130、封装胶体140以及金属镀层150。其中,导脚群组112包括引脚112a以及芯片座112b,其中引脚112a围绕芯片座112b配置,且每一引脚112a的侧表面113b包含第一颈缩部113c,而芯片座112b的侧表面117b具有第二颈缩部117c。芯片130配置于导脚群组112的芯片座112b上且透过导线170分别电性连接至相应的引脚112a。封装胶体140覆盖芯片130、导线170以及导脚群组112,其中封装胶体140暴露出芯片座112b的底面117a与侧表面117b的局部以及每一引脚112a的下表面113a与侧表面113b的局部,即引脚112a及芯片座112b突出于封装胶体140之外。第一焊料层120包覆封装胶体140所暴露出的每一引脚112a的下表面113a与侧表面113b的局部以及芯片座112b的底面117a与侧表面117b的局部。金属镀层150配置于每一引脚112a相对于下表面113a的上表面(即原金属基板110的上表面111a)上。
值得一提的是,在本实施例中,背蚀刻制程可包括等向性蚀刻制程或非等向性蚀刻制程,在此并不加以限制。再者,本实施例于背蚀刻过程所采用的蚀刻液具锡铜选择性蚀刻性质(即蚀铜不蚀锡)。因此,于背蚀刻制程之后,第一焊料层120仍可稳固位于引脚112a的下表面113a上以及芯片座112b的底面117a上,可有效提升制程良率与结构可靠度。再者,第一焊料层120亦可为一保护层,用以保护暴露于封装胶体140之外的每一引脚112a的下表面113a与侧表面113b的局部以及芯片座112b的底面117a与侧表面117b的局部。
于后续的制程中,请参考图1E,只须对无外引脚封装结构100a的第一焊料层120进行一回焊步骤,即可在表面粘着时将无外引脚封装结构100a焊接于一印刷电路板(未绘示)上。特别是,于进行回焊的过程中,部分第一焊料层120会延伸并且填充于芯片座112b的第二颈缩部117c内以及每一引脚112a的第一颈缩部113c内,可有效增加第一焊料层120与芯片座112b以及每一引脚112a之间的结合力。
简言之,本实施例的第一焊料层120的设置除了可视为引脚112a与芯片座112b的一保护层之外,相较于已知必须先涂布焊料(锡层)才能将无外引脚封装结构焊接至印刷电路板上而言,本实施例可透过回焊步骤直接将无外引脚封装结构100a藉由表面粘着技术焊接于印刷电路板上,而无需再涂布焊料(锡层),可有效提高结构可靠度与后续制程的便利性。
以下将以几个不同的实施例来说明无外引脚封装结构及其制造方法。在此必须说明的是,下述实施例沿用前述实施例的元件标号与部分内容,其中采用相同的标号来表示相同或近似的元件,并且省略了相同技术内容的说明。关于省略部分的说明可参考前述实施例,下述实施例不再重复赘述。
图3A至图3C为本发明的另一实施例的一种无外引脚封装结构的制作方法的剖面示意图。请参考图3A与图3B,图3C的无外引脚封装结构100b与图1D的无外引脚封装结构100a相似,其不同之处在于:图3C的无外引脚封装结构100b的导脚群组112’的结构设计以及第一焊料层120的配置方式不同于图1D的无外引脚封装结构100a的导脚群组112的结构设计及第一焊料层120的配置方式。
详细来说,在本实施例中,第一凹槽图案115a’相对于下表面111b实质上具有一均等的深度,也就是说,第一凹槽图案115a’实质上仅具有一种深度。此外,导脚群组112’的芯片座112b’的底面117a’与封装胶体140的一底面142实质上切齐。第一引脚112a’的第一颈缩部113c’实质上大于图1D的每一引脚112a的第一颈缩部113c。此外,第一焊料层120仅覆盖每一引脚112a’的下表面113a’。
于制程时,本实施例的无外引脚封装结构100b的制作方法可采用与图1A至图1D的无外引脚封装结构100a大致相同的制作方式,其中本实施例仅于金属基板110的下表面111b上对应第一凸部114a形成第一凹槽图案115a’,其中第一凹槽图案115a’相对于下表面111b实质上具有一均等的深度。接着,请参考图3B,于每一第一凹槽图案115a’内形成第一焊料层120。接着,再进行图1C的固定芯片130于金属基板110的第二凸部114b上、形成导线170分别电性连接芯片130至第一凸部114a以及形成封装胶体140等步骤。之后,再对金属基板110的下表面111b进行背蚀刻制程,以定义出引脚112a’以及芯片座112b’,而引脚112a’与芯片座112b’即构成为所谓的导脚群组112’。其中,于进行背蚀刻制程的过程,由于侧向低切(undercut)的现象,而使得引脚112a’的侧表面蚀刻深度较大,而产生较大的颈缩部,意即本实施例的引脚112a’的第一颈缩部113c’实质上大于图1D的每一引脚112a的第一颈缩部113c。此外,由于本实施例对应于芯片座112b’的位置并未设置第二凹槽图案115b,请参考图1A,因此于背蚀刻制程之后,芯片座112b’会被蚀刻至与封装胶体140的底面142切齐。当然,于其他未绘示的实施例中,芯片座112b’也可以如芯片座112b一样突出于封装胶体140之外,在此并不加以限制。至此,即可大致完成本实施例的无外引脚封装结构100b。
图4A至图4C为本发明的又一实施例的一种无外引脚封装结构的制作方法的剖面示意图。请参考图4A至图4C,图4C的无外引脚封装结构100c与图1D的无外引脚封装结构100a相似,其不同之处在于:图4C的无外引脚封装结构100c的导脚群组112”的结构设计以及第一焊料层120的配置方式不同于图1D的无外引脚封装结构100a的导脚群组112的结构设计及第一焊料层120的配置方式。
详细来说,本实施例的金属基板110的芯片座112b”的底面117a”与封装胶体140的底面142实质上切齐。当然,于其他未绘示的实施例中,芯片座112b”也可以如芯片座112b一样突出于封装胶体140之外,在此并不加以限制。焊料层(包括第一焊料层120与一第二焊料层125)完全包覆暴露于封装胶体140外的引脚112a”及填充于第一颈缩部113c”内。
于制程时,本实施例的无外引脚封装结构100c的制作方法可采用与图1A至图1E的无外引脚封装结构100a大致相同的制作方式,其中本实施例仅于金属基板110的下表面111b上对应第一凸部114a形成第一凹槽图案115a,而于金属基板110的上表面111a上还形成多个第三凹槽图案115c,其中第三凹槽图案115c分别对应于第一凹槽图案115a且分别环绕第一凸部114a。接着,于形成第一焊料层120的同时,于每一第三凹槽图案115c内形成一第二焊料层125。接着,再进行图1C的固定芯片130于金属基板110的第二凸部114b上、形成导线170分别电性连接芯片130至第一凸部114a以及形成封装胶体140等步骤。然后,再对金属基板110的下表面111b进行背蚀刻制程,以定义出引脚112a”与芯片座112b”,而引脚112a”与芯片座112b”即构成所谓的导脚群组112”。最后,再对第一焊料层120以及第二焊料层125进行一回焊步骤,藉由表面粘着技术而将无外引脚封装结构100c焊接于一印刷电路板(未绘示)上。特别是,于进行回焊的过程中,部分第一焊料层120或第二焊料层125会延伸至每一引脚112a”的第一颈缩部113c”内且第一焊料层120与第二焊料层125连接成一体。至此,即可大致完成本实施例的无外引脚封装结构100c。
综上所述,由于本发明是先将焊料层形成于金属基板的下表面的凹槽图案内,不仅可作为背蚀刻制程时的蚀刻掩膜,且经由背蚀刻制程之后,即可形成突出于封装胶体之外的引脚及位于引脚的下表面上的焊料层。因此,相较于已知必须先涂布焊料(锡层)才能将无外引脚封装结构焊接至印刷电路板上而言,本发明的焊料层的设计除了可视为引脚的保护层之外,其亦可减少后续将无外引脚封装结构藉由表面粘着技术焊接于印刷电路板上的制程步骤,可有效提高产品的可靠度与后续制程的便利性。
虽然本发明已以较佳实施例揭示如上,然其并非用以限定本发明,任何本领域技术人员,在不脱离本发明的精神和范围内,当可作些许的修改和完善,因此本发明的保护范围当以权利要求书所界定的为准。
Claims (8)
1.一种无外引脚封装结构的制作方法,包括:
提供一金属基板,该金属基板具有彼此相对的一上表面及一下表面;
图案化该金属基板的该上表面以及该下表面,以于该上表面形成多个第一凸部以及至少一第二凸部,并于该下表面上形成多个对应该些第一凸部的第一凹槽图案;
于各第一凹槽图案内分别形成一第一焊料层;
将一芯片固定于该第二凸部上;
形成多条导线分别电性连接该芯片至该些第一凸部;
于该金属基板的该上表面上形成一封装胶体,其中该封装胶体覆盖该芯片、该些第一凸部、该第二凸部以及该些导线;以及
以该第一焊料层为一蚀刻掩膜,对该金属基板的该下表面进行一背蚀刻制程,以移除该金属基板的部分区域至暴露出该封装胶体,并定义出一导脚群组,该导脚群组包含至少一承载该芯片的芯片座以及多个彼此分离的引脚,其中该些引脚的一下表面以及至少一侧表面的局部显露于该封装胶体之外并且局部为该第一焊料层所包覆。
2.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,各第一凹槽图案定义出各引脚显露于该封装胶体外的该下表面以及该侧表面的局部外部轮廓。
3.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,更包括:
于图案化该金属基板之后,形成一金属镀层于该些第一凸部上。
4.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,更包括:
对该金属基板的该下表面进行该背蚀刻制程的同时,形成一第一颈缩部于各引脚的该侧表面上。
5.如权利要求4所述的无外引脚封装结构的制作方法,其特征在于,更包括:
对该金属基板的该下表面进行该背蚀刻制程之后,对该第一焊料层进行一回焊步骤,其中部分该第一焊料层延伸并填充于各引脚的该第一颈缩部内。
6.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,更包括:
于图案化该金属基板的同时,于该金属基板的该下表面上形成一第二凹槽图案,其中该第二凹槽图案对应该第二凸部;以及
形成该第一焊料层于各第一凹槽图案内的同时,将该第一焊料层形成于该第二凹槽图案内。
7.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,更包括:
于图案化该金属基板时,于该金属基板的该上表面上形成多个第三凹槽图案,其中各第三凹槽图案环绕各第一凸部并对应于各第一凹槽图案;以及
形成该第一焊料层的同时,于各第三凹槽图案内形成一第二焊料层。
8.如权利要求1所述的无外引脚封装结构的制作方法,其特征在于,该第一凹槽图案包括一第一凹部以及一第二凹部,该第二凹部环绕该第一凹部,且该第二凹部相对于该下表面的深度大于该第一凹部相对于该下表面的深度。
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