CN102548223A - 用于制造电路布置的方法 - Google Patents

用于制造电路布置的方法 Download PDF

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CN102548223A
CN102548223A CN2011104016876A CN201110401687A CN102548223A CN 102548223 A CN102548223 A CN 102548223A CN 2011104016876 A CN2011104016876 A CN 2011104016876A CN 201110401687 A CN201110401687 A CN 201110401687A CN 102548223 A CN102548223 A CN 102548223A
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克里斯蒂安·约布尔
海科·布拉姆尔
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Semikron Elektronik GmbH and Co KG
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Abstract

描述一种用于制造电路布置(10)的方法，所述电路布置具有衬底(12)和柔性连接装置(16)，其中，连接装置(16)与衬底(12)之间设置有绝缘材料(18)，将该绝缘材料至少单层地印刷到衬底(12)上和/或柔性连接装置(16)上。由此按照简单方式实现了柔性连接装置与衬底之间良好的电绝缘，其中，系统的密封性与绝缘的浇铸相比得到改进。

Description

用于制造电路布置的方法
技术领域
本发明涉及一种用于制造带有衬底和柔性连接装置的电路布置的方法，其中，连接装置与衬底之间设置有绝缘材料。 
背景技术
这种类型的方法由DE 10 2007 006 706 A1所公开。在这种所公开的方法中，绝缘材料通过浇铸或压力注塑涂覆到衬底上。作为绝缘材料在那里优选使用硅化合物、特别是硅橡胶。压力注塑方法或浇铸方法后接着以有利的方式例如通过UV曝光进行交联。在此需要注意的是，绝缘材料在压力注塑或浇铸期间必须无气泡地涂覆到衬底上。为此目的，将绝缘材料要么在真空下加工，要么在涂覆到衬底上以后执行抽真空。这样造成不可忽略的设备开支和劳动开支。 
硅橡胶和/或硅凝胶虽然具有良好的电绝缘特性，但相对潮湿的影响却不能可靠密封。 
DE 10 2007 044 620 A1公开了一种布置，该布置带有用于与至少一个半导体器件导电连接的连接装置并且带有填料。连接装置作为由至少一个绝缘膜和两个导电膜组成的复合膜构造，将两个导电膜设置在绝缘膜的两个彼此背离的面上。至少一个导电膜本身经结构化，以便构造导体轨迹。填料处于连接装置与至少一个半导体器件之间。作为填料在那里使用低粘性的填料，以便产生毛细管下填。为优化毛细管下填，那里提出，为至少一个半导体器件配属在各自导电膜内的至少一个留空部，其中，将该至少一个留空部至少部分地设置在导电膜的由半导体器件所覆盖的区域内。 
WO 03/030247 A2介绍了用于接触衬底表面上的至少一个导电接触面的方法，其中，将由电绝缘塑料材料制成的膜在真空下层压到衬底的表面上，从而膜紧密贴靠地覆盖具有至少一个接触面的表面并附着在该表面上。随后通过在膜中开窗来实现露出表面上的至少一个待接触的接触面。然后实现每个经露出的接触面与由导电材料制成的层的平面的接触。 
发明内容
本发明的目的在于，提供一种开头所述类型的方法，其中，柔性连接装置与衬底之间按照简单方式实现良好的电绝缘，其中，系统的密封性与绝缘的浇铸相比得到改进。 
该目的依据本发明通过权利要求1的特征由此得以解决，即，将绝缘材料印刷到衬底上和/或柔性连接装置上。这一点可以通过凸版印刷(Stempeldruck)或凹版印刷(Maskendruck)或优选通过丝网印刷(Siebdruck)进行。 
依据本发明，将绝缘材料单层地印刷到衬底上和/或柔性连接装置上。依据目的，可以将绝缘材料多层地印刷到衬底上和/或柔性连接装置上。在这种情况下，绝缘材料可以在单个的印刷层中具有相同或不同厚度和/或相同或不同表面扩展。特别是随后，在多个单个印刷层具有不同厚度和不同表面扩展时，例如可将绝缘材料的层厚度相应于相应的依据电路的情况局部地加大。 
依据本发明的方法的优选的构造方案和/或改进方案在从属权利要求5至9中予以指示。 
绝缘材料例如是已公知的共聚物或杂聚物。 
通过依据本发明所使用的印刷方法，确保了紧邻的导体的精确和 良好的电绝缘，从而可以将依据本发明所制造的电路布置仿佛密闭一样密封。 
依据本发明的方法具有其它的优点，即，也可以大规模使用，也就是说可以在一个共同的方法步骤中利用绝缘材料印刷一定数量的电路布置。然后在烧结过程中将成分烧结成依据本发明的电路布置。依据本发明以有利的方式取消了二次硅浇铸；硅阻挡层也无必要。 
依据本发明可以使用仅具有一个电路结构化的金属层的衬底。同样可以使用在电路结构化的金属层上具有至少一个芯片式的半导体器件的衬底。半导体器件优选是功率半导体器件。 
将绝缘材料印刷到衬底上是将绝缘材料印刷到导体轨迹上和/或衬底的绝缘层上和/或至少一个半导体器件上。 
依据本发明同样可以为大规模使用应用多重衬底，其中，衬底中的至少一个或每个单个的衬底都具有至少一个半导体器件。 
在依据本发明的方法中可以应用单层的柔性连接装置，该连接装置例如是电路结构化的金属层。另一种可能性在于，应用多层的柔性连接装置，该连接装置由绝缘物质层和在绝缘物质层的两个彼此背离的面上的各一个电路结构化的金属层组成。 
附图说明
其他细节、特征和优点来自后面结合附图的说明。其中： 
图1以区段方式经放大的剖面图示出依据本发明所制造的电路布置的第一实施方式；以及 
图2以类似图1的区段方式剖面图示出依据本发明所制造的电路布置第二实施方式。 
具体实施方式
图1以区段方式、未按比例地示出依据本发明所制造的带有衬底12的电路布置10的构造，该衬底例如是DCB衬底。衬底12具有电路结构化的金属层14。为了金属层14的电路合适的连接，设置有柔性的连接装置16。该连接装置16单层地构造。 
连接装置16与衬底12之间设置有绝缘材料18。绝缘材料18涂覆到衬底12上和/或柔性连接装置16上。这一点优选通过丝网印刷进行。随后将连接装置16准确正确地定位布置在衬底12上，据此在烧结过程中实现用于电路布置10的烧结。 
图2以类似于图1的示意图说明了电路布置10的构造，电路布置带有芯片式的半导体器件20和具有绝缘物质层22的连接装置16。绝缘物质层22的两个彼此背离的面上分别设置有一个电路结构化的金属层24、26。金属层24配属给半导体器件20和衬底10的电路结构化的金属层14，以便实现相应的电路连接。 
也用附图标记18在图2中标称绝缘材料，该绝缘材料优选通过丝网印刷涂覆到衬底12上或/或柔性多层连接装置16的金属层24上。然后将连接装置准确正确地定位布置在衬底12上。随后在烧结过程中实现用于电路布置10的烧结。 
附图标记列表 
10 电路布置 
12 电路布置10的衬底 
14 在衬底12上的金属层 
16 电路布置10的连接装置 
18 连接装置16与衬底12之间的绝缘材料 
20 电路布置10的在金属层14上的半导体器件 
22 连接装置16的绝缘物质层 
24 在绝缘物质层22上的金属层 
26 在绝缘物质层22上的金属层。

Claims (9)

1.用于制造带有衬底(12)和柔性的连接装置(16)的电路布置(10)的方法，其中，所述连接装置(16)与所述衬底(12)之间设置有绝缘材料(18)，其特征在于，将所述绝缘材料(18)印刷到所述衬底(12)上和/或柔性的所述连接装置(16)上。
2.按权利要求1所述的方法，其特征在于，将所述绝缘材料(18)单层地印刷到所述衬底(12)上和/或柔性的所述连接装置(16)上。
3.按权利要求1所述的方法，其特征在于，将所述绝缘材料(18)多层地印刷到所述衬底(12)上和/或柔性的所述连接装置(16)上。
4.按权利要求1所述的方法，其特征在于，将所述绝缘材料(18)以具有相同或不同厚度和/或具有相同或不同表面扩展的多个单个的印刷层的方式印刷到所述衬底(12)上和/或柔性的所述连接装置(16)上。
5.按权利要求1所述的方法，其特征在于，将所述绝缘材料(18)通过凸版印刷或凹版印刷或优选通过丝网印刷涂覆到所述衬底(12)上和/或柔性的所述连接装置(16)上。
6.按权利要求1所述的方法，其特征在于，应用了具有至少一个芯片式的半导体器件(20)的衬底(12)。
7.按权利要求1所述的方法，其特征在于，应用了由一定数量的衬底(12)组成的多重衬底(12)，其中，至少一个衬底(12)或者其中每个单个的衬底(12)具有至少一个半导体器件(20)。
8.按权利要求1所述的方法，其特征在于，应用了单层的柔性的连接装置(16)。
9.按权利要求1所述的方法，其特征在于，应用了多层的柔性的连接装置(16)，所述连接装置由绝缘物质层(22)和在所述绝缘物质层(22)的两个彼此背离的面上的各一个电路结构化的金属层(24、26)组成。
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