CN102544340A - 用于led的带凹腔的引线框架封装 - Google Patents

用于led的带凹腔的引线框架封装 Download PDF

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CN102544340A
CN102544340A CN2011103512455A CN201110351245A CN102544340A CN 102544340 A CN102544340 A CN 102544340A CN 2011103512455 A CN2011103512455 A CN 2011103512455A CN 201110351245 A CN201110351245 A CN 201110351245A CN 102544340 A CN102544340 A CN 102544340A
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cavity
led
lead
sidewall
chip
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CN102544340B (zh
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杨林威
陈文荣
彭汉杰
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Carsem M Sdn Bhd
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Abstract

一种发光二极管封装结构，其包括具有底部表面、上部表面和中心定位凹腔的晶片垫。凹腔具有：在底部表面和上部表面之间的芯片附连表面和从凹入的芯片附连表面延伸到上部表面的侧壁。该封装另外还具有设置在晶片垫的相反侧上的引线。引线具有：与晶片垫的底部表面共同延伸的底部表面和与晶片垫的上部表面共同延伸的上部表面。发光二极管芯片被附连到芯片附连表面。该封装进一步包括具有密封剂的封装主体，密封剂填充晶片垫和引线之间的空间以便形成与晶片垫和引线的底部表面共同延伸的底部密封表面。

Description

用于LED的带凹腔的引线框架封装
技术领域
本发明大体涉及集成电路(IC)封装技术。更具体地，本发明的实施例关于用于发光二极管(LEDs)的带凹腔的引线框架封装。
背景技术
引线框架通常用于封装IC。图1中示出了已知的引线框架IC封装技术的一个示例。图1为常规的模制成型引线框架封装(MLP)10的简化剖视图。MLP 10包括通过粘合剂13附连到引线框架的晶片垫14(也被称作晶片盘)的IC晶片12。位于IC晶片12顶部的联接垫18通过线联接19连接到引线框架的引线16。密封材料20覆盖包含有IC晶片12、线联接(wirebonds)19以及晶片垫14和引线16的上部表面的封装。晶片垫14和引线16底部暴露以利于IC晶片12散热并减小MLP 10的整体厚度。在晶片垫14和引线16的侧壁表面上形成引线框架的半蚀刻部分17。密封材料20在半蚀刻部分17下面延伸以便将晶片垫14和引线16机械固定到MLP 10上。
MLP 10典型地为利用引线框架带以矩阵图案形成的多个IC封装中的一个。图2为常规引线框架带30的简化俯视图，该引线框架带可被用于形成多个引线框架封装。引线框架带30包括外部框架32，多个水平和竖直的连接杆36，38附连到外部框架上。水平和竖直连接杆36，38限定以矩阵形式设置的多个内部框架40，每个都包括IC接收区(或晶片垫)。在该示例中，引线框架带30包括9×9个内部框架40的矩阵。外部框架32包括多个定位孔34，其可被用于在晶片附连(die attach)、线联接、密封和单体化工艺(singulation processes)期间，将引线框架带30定位在适当的工具上。
图3为一部分引线框架带的放大视图。图3示出了在图2的虚线框A内的部分引线框架带30。图3示出了位于每个内部框架40内的晶片垫14和引线16。
一些LED组装工艺利用与图1和3中所示出的引线框架类似的引线框架，且该引线框架可包括晶片垫、引线、半蚀刻部分和密封材料。图4中示出了一个实施例，其中，LED晶片42被正好设置在晶片垫44的顶部，且随后被放置在形成围绕LED晶片42的腔的圆顶45(或镜片)下方。存在某些与这种LED封装技术有关的局限。例如，由于光侧向发散和/或LED晶片42和圆顶45之间的不精确对齐而导致的发光效率低下。
还存在与目前LED封装技术有关的制造局限。例如，目前的LED封装技术通常受到由低密度引线框架和/或衬底、低生产速度(每小时生产的单位数目)、高资金投入、对于新工具和资格证书的较长交付周期以及其他局限而导致的低生产率的困扰。
考虑到上述内容并鉴于缩短LED生产生命周期的总体趋势，期望改进的LED封装及制造方法。
发明内容
本发明的实施例提供一种在晶片垫的顶部表面具有凹腔的LED引线框架封装。LED晶片可被设置在凹腔内，且凹腔的侧壁可用作从LED晶片射出的光的反射器。进一步，侧壁的角度可被选择以便为从LED晶片射出的光提供期望的光束轮廓(例如，聚焦、准直或宽角度的)。
在本发明的实施例中，提供一种LED封装，其包括具有底部平表面、上部表面和中心定位凹腔的晶片垫。凹腔具有在底部平表面和上部表面之间的芯片附连表面。凹腔还具有从凹入的芯片附连表面延伸到上部表面的侧壁。该封装另外还具有设置在晶片垫的相反侧上的第一和第二引线。第一和第二引线具有：与晶片垫的底部平表面共同延伸的底部平表面和与晶片垫的上部表面共同延伸的上部平表面。LED芯片被附连到位于凹腔内的芯片附连表面。LED芯片具有定位在其上部表面上的第一和第二联接垫。第一和第二联接垫分别通过第一和第二导体电连接到第一和第二引线。该封装进一步包括具有密封剂的封装主体，其中，密封剂填充晶片垫和第一及第二引线之间的空间以便形成与晶片垫的底部平表面和第一及第二引线的底部平表面共同延伸的底部密封表面。
在另一个实施例中，多个LED芯片被附连到晶片垫的凹腔的芯片附连表面上。每个LED芯片都具有定位在芯片的上部表面上的第一和第二联接垫。多组第一及第二引线设置在晶片垫的相反侧上。为多个芯片中的每个LED芯片提供一组第一及第二引线，以使得每组第一及第二联接垫分别通过每组第一及第二导体电连接至每组第一及第二引线。
在本发明的另一个实施例中，提供在制造LED封装中使用的引线框架。引线框架包括具有上部平表面和下部平表面的矩形外部框架。引线框架另外包括以矩阵图案设置在外部框架内的多个内部框架。每个内部框架具有芯片容纳区和设置在芯片容纳区的相反侧上的第一及第二引线。芯片容纳区和第一及第二引线具有与下部平表面共同延伸的底部表面以及具有与上部平表面共同延伸的上部表面。芯片容纳区进一步包括中心定位的凹腔，其具有在引线框架的上部和下部平表面之间的凹入平表面并具有从凹入平表面延伸到上部表面的侧壁。
在另一个实施例中，提供了一种制造LED封装的方法。该方法包括将具有基本方形形状的大面板框架/衬底(LPF/S)安装到环上。LPF/S包括以矩阵图案设置的多个晶片垫以及对应多个引线。每个晶片垫包括平芯片附连表面。LED芯片被附连到每个晶片垫的平的芯片附连表面。施加密封材料覆盖LED芯片和至少部分LPF/S。将每个晶片垫和对应的引线与LPF/S分离以便形成单个的LED封装。当LPF/S被安装到粘胶的环上时，执行附连LED芯片和施加密封材料的步骤。
在一些实施例中，施加密封材料进一步包括：提供阵列模腔、将密封材料分配到阵列模腔中、将包含密封材料的阵列模腔与包括LED芯片的LPF/S接合、以及固化密封材料。
通过超越常规技术的本发明赢得了许多优势。例如，一些实施例包括带有凹腔的单件晶片垫，其中，LED芯片可附连到该凹腔。凹腔的侧壁可用来反射从LED芯片发出的光。利用带有凹腔的单件晶片垫可简化LED封装工艺，这是因为不需要形成反射表面的附加步骤。正如另一个示例，一些实施例采用可插入到凹腔内的光反射器。光反射器可被用于修改LED封装的光发射特性，而不需要改变引线框架。因此，本发明的实施例可提供具有各种发光图案和效率的LED封装，同时降低制造复杂性以及缩短制造研制周期。根据实施例，可存在这些优势中的一个或多个。这些以及其他优势在整个说明书中描述并被在下文更具体的描述。
附图说明
图1为常规模制成型引线框架封装的简化剖视图；
图2为可被用于形成多个引线框架封装的常规引线框架带的简化俯视图；
图3为一部分引线框架带的放大视图；
图4为用于容纳LED的常规预模制成型类型封装的简化剖视图；
图5为根据本发明的实施例的LED封装的简化剖视图；
图6为根据本发明的实施例的示例光反射器和嵌件的简化示图；
图7为由根据本发明的实施例形成的LED封装产生的不同光束轮廓的简化示图；
图8为根据本发明的实施例的具有外部I/O互连的LED封装和外部散射器的简化剖视图；
图9A-9B为根据本发明的实施例的LED封装的简化俯视图；
图10A-10B为可在制造根据本发明的实施例的LED封装中使用的大面板框架/衬底的简化俯视图；
图11为阐明组装根据本发明的实施例的模制成型LED封装的示例工艺的流程图；
图12为根据本发明的实施例的安装在胶粘的环上以便于处理的大面板框架/衬底的简化示图；
图13A-13B为阐明组装根据本发明的实施例的LED引线框架封装的模制成型工艺的简化剖视图；以及
图14A-14B为阐明组装根据本发明的另一个实施例的LED引线框架封装的模制成型工艺的简化剖视图。
具体实施方式
本发明的实施例提供在晶片垫的顶部表面中具有凹腔的LED引线框架封装。LED晶片可被定位在凹腔内，且凹腔的侧壁可用作从LED晶片射出的光的反射器。在实施例中，侧壁可被涂覆成光滑或粗糙面层以便修改侧壁的反射率。在另一个实施例中，光反射器可插入在凹腔内。在这些实施例的每个中，凹腔的形状可为圆形、方形、六边形等。进一步，可选择侧壁的角度以便为从LED晶片射出的光提供期望的光束轮廓(例如，聚焦、准直或宽角)。
图5为根据本发明的实施例的LED封装500的简化剖视图。该示图仅为示例，其不应不适当地限制权利要求的范围。本领域普通技术人员会意识到许多变型、替换和修改。LED封装500包括具有上部表面504和底部平表面506的晶片垫502。LED封装500进一步包括设置在晶片垫502的相反侧上的引线508，510。晶片垫502和引线508，510典型地由诸如金属的传导性材料制成。导电的电线，诸如电线512，将每个引线508，510连接到设置在LED芯片518上的联接垫，诸如联接垫514。引线508，510具有与晶片垫502的底部平表面506共同延伸的底部平表面518。晶片垫502的底部平表面506可暴露于周围环境或附连到外部散热片以便加强消散由LED芯片518产生的热。引线508，510还具有与晶片垫502的上部表面504共同延伸的上部平表面520。进一步，引线508，510具有面对晶片垫502的上部内侧壁表面522，其从上部表面520延伸到位于上部表面520和底部平表面518之间的下部边缘。引线508，510还具有面对晶片垫502的与底部平表面518相交的下部内侧壁表面524以及从上部内侧壁表面522的下部边缘延伸到下部内侧壁表面524的中间表面。
密封材料526覆盖晶片垫502的上部平表面504和引线508，510的上部平表面520。密封材料526还至少部分地覆盖引线508，510的下部内侧壁表面524和上部内侧壁表面522。密封材料526填充凹腔528以便覆盖LED芯片518并形成LED封装500的一部分。密封材料526还填充引线508，510和晶片垫502之间的空间，其中，密封材料526的底部表面与引线508，510的底部平表面518以及与晶片垫502的底部平表面506共同延伸。在实施例中，密封材料526形成透镜和封装盖。
芯片附连表面沿着凹腔528的底部延伸，且侧壁从凹腔528的底部延伸到晶片垫502的上部平表面504。LED芯片518通过粘合剂附连到芯片附连表面。取决于具体的应用，凹腔528的侧壁可以任何特定的形状(例如，圆形、矩形、六边形等等)形成。在一个实施例中，凹腔520的侧壁可被涂覆成光滑或粗糙面层以便修改侧壁的反射率。
在一些实施例中，光反射器可插入到凹腔528内，以便反射从LED芯片518射出的光。图6为根据本发明的实施例的示例光反射器和嵌件的简化示图。如图6中所示的，光反射器可以形成各种形状和轮廓，包括圆形、矩形、八边形等。不同的形状可用于修改来自LED芯片518的反射光束的特性。类似于凹腔528，取决于具体的应用，光反射器的侧壁可具有光滑或粗糙面层。侧壁也可被镀上镀层材料，或者可具有特定颜色，以便增强侧壁的反射特性。
在实施例中，装配到凹腔528内的部分光反射器的形状可为标准化的。通过这种方式，标准化的晶片垫502和凹腔528可与具有任何形状的侧壁的光反射器一起使用。
图7为由根据本发明的实施例形成的LED封装产生的不同光束轮廓的简化示图。可通过修改凹腔中的侧壁的角度和/或光反射器的侧壁的角度来产生不同的轮廓。如图7中所示的，可产生具有聚焦轮廓、准直轮廓或宽角轮廓的光束。此外，侧壁可具有带有多个角度的弯曲部或者可根据所期望的光束轮廓弯曲。
图8为根据本发明的实施例的LED封装800的简化剖视图，该LED封装800具有外部I/O互连811，813和外部散热器815。外部I/O互连811，813可被用于将引线808，810分别连接到图8中所示的电路板817。外部I/O互连811，813可利用任何传导性材料(例如焊料)形成。在一些实施例中，外部散热片815可被耦连到晶片垫802的底部以便增强LED芯片818的散热。外部散热片815可利用任何具有良好导热性的材料(如铝)形成。散热也可通过增加晶片垫802的厚度来增强。例如，在实施例中，与约6-8mil的标准厚度相比，晶片垫802的厚度可被增加到约12-20mil。外部散热片和/或具有增加厚度的晶片垫可被用于降低含有大功率LED的封装的温度。
图9A-9B为根据本发明的实施例的LED封装的简化俯视图。图9A示出了具有附连到晶片垫902上的单个LED芯片910的LED封装900。如上述关于图5的说明，LED芯片910可设置在沿着凹腔的底部表面延伸的芯片附连表面904上。引线906，908被设置在晶片垫902的相反侧上，且联接线将引线906，908电连接到LED芯片910上的相应联接垫。可在晶片垫902的顶部和底部上设置附加引线。
如同本领域普通技术人员所理解，LED封装中的LED芯片的数目的增加可提高照度和/或提供较宽的发射光谱。因此，图9B示出了具有附连到晶片垫914上的多个LED芯片922，924，926，928的LED封装912。LED芯片922，924，926，928被设置在沿着凹腔的底部表面延伸的芯片附连表面916上。多个引线918，920被设置在晶片垫914的相反侧上，且联接线将多个引线918，920电连接到LED芯片922，924，926，928上的相应联接垫。可在晶片垫914的顶部和底部上设置附加引线。尽管在该示例中，LED封装912包括四个LED芯片，但是任意数目的LED芯片可被用于根据本发明的实施例的LED封装中。
图10A-10B为可在制作根据本发明的实施例的LED封装中使用的大面板框架/衬底(LPF/S)1000的简化俯视图。如图10A所示，LPF/S1000具有矩形外部框架1002。在实施例中，外部框架1002具有178mm×178mm的尺寸。如同本领域普通技术人员所理解，取决于具体应用，外部框架1002可大或小。多个内部框架以矩阵图案被设置在外部框架1002内。图10B为示出一些内部框架的一部分LPF/S1000的放大视图。如图10B中所示的，多个内部框架被附连到水平和竖直的连接杆1006，1008上。每个内部框架包括沿着凹腔底部延伸的芯片附连表面1004。LED芯片可被附连到每个内部框架中的芯片附连表面1004上。每个内部框架还包括设置在芯片附连表面1004的相反侧上的引线1010。如上述关于图6所说明的，光反射器1012可插入到每个框架的凹腔内。
图11为阐明组装根据本发明的实施例的模制成型LED封装的示例工艺的流程图。本发明的一些实施例通过利用比常规引线框架大的LPF/S来提供提高的封装效率。例如，具有大至178mm×178mm或更大尺寸的LPF/S可被在一些实施例中使用。这可与具有约40mm×140mm尺寸的常规引线框架作比较。这些特征使得可以达到常规LED封装技术不可能达到的极高密度。由采用LPF/S获得的提高的封装效率可降低组装成本。正如下面更全面的描述，在组装过程中，LPF/S可被安装到载体或环上以便支撑LPF/S。进一步，利用提供“X”和“Y”两个方向(例如，向前/向后和侧向)上的精确移动的操作装置可在组装过程中搬运LPF/S。
图11的步骤1102-1108通常被看作前道阶段(FOL)的一部分，而步骤1110-1112通常被看作后道阶段(EOL)的一部分。在步骤1102，LPF/S被安装到环上并被卸下到狭缝薄膜框架盒。该环为LPF/S提供支撑，并能在组装过程中精确移动。在实施例中，该环为由铝或不锈钢制成的金属支架。例如利用可经受线联接和模制成型步骤期间的可能超过200℃温度的粘合高温胶带，LPF/S可被安装到环上。如图12中所示的，安装到圆形环上的LPF/S可在组装过程期间在“X”和“Y”两个方向上被搬运。在步骤1104中，LED芯片或晶片可被附连在LPF/S上的晶片垫的凹腔内。在实施例中，可利用粘合剂附连LED芯片。利用选择和放置法，LED芯片通常被放置在晶片垫上。环在“X”和“Y”两个方向上的移动使得可在晶片垫的凹腔内精确放置LED芯片。在步骤1106中，用于附连LED芯片的粘合剂被固化。在实施例中，该固化可包括在100℃到200℃间的温度热处理1小时到3小时。在步骤1108，线联接过程被用于利用联接线将LPF/S上的引线电连接到LED芯片上的相应联接垫。在一些实施例中，组装过程也可包括将荧光物质分配到LED芯片上以便增强或改变从LED发出的光的颜色。一些实施例也可包括一个或多个清洁步骤，其可包括根据已知技术的等离子工艺。
EOL阶段包括在步骤1110的模制成型工艺。在实施例中，模制成型工艺包括在阵列模腔中分配密封材料，以及将LPF/S和附连的LED芯片浸没在密封材料中。这可参考图13A-13B和14A-14B示出，其阐明了用于形成LED封装的示例模制成型工艺。如图13A中所阐明的，可利用分配喷嘴将诸如硅酮混合化合物的密封材料注入到阵列模腔中。阵列模腔随后与LPF/S接合，且密封材料被固化以便形成LED封装阵列。利用单体化工艺使LED封装阵列在步骤1112中分离，以便提供多个LED封装。利用图13A的阵列模腔形成的示例LED封装在图13B中示出。图14A-14B提供了LED封装的示例，其具有可通过改变图14A中所阐释的阵列模腔来形成的“圆顶”形状。根据本发明的实施例，可采用具有其他设计的阵列模腔。上述模制成型工艺与使用单体而非阵列模腔的常规技术相对比。
要理解，图11中阐明的具体步骤提供根据本发明实施例的特定方法。根据可替换的实施例，可施行其他顺序的步骤。例如，上述概述的步骤可被以不同的次序执行。而且，图11中阐明的单个步骤可包括多个子步骤，其可被以与单个步骤相称的各种顺序执行。而且，取决于具体应用，可增加或移除附加的步骤。本领域普通技术人员会意识到许多变型、修改和替换。
尽管已经详细描述了本发明的具体实施例，但是其中可进行各种变换和修改而不脱离其精神和范围，对于本领域技术人员来说是显而易见的。

Claims (26)

1.一种发光二极管封装结构，其包括：
金属晶片垫，其具有底部平表面、上部表面和中心定位的凹腔，所述凹腔具有在所述底部平表面和上部表面之间的平芯片附连表面，凹腔还具有从凹入的所述平芯片附连表面延伸到上部表面的侧壁；
设置在所述晶片垫的相反侧上的第一和第二金属引线，第一和第二金属引线具有：与晶片垫的底部平表面共同延伸的底部平表面和与晶片垫的上部表面共同延伸的上部平表面；
发光二极管芯片，其被附连到凹腔内的芯片附连表面，发光二极管芯片具有定位在其上部表面上的第一和第二联接垫；
第一和第二导体，其分别将第一和第二联接垫电连接到第一和第二金属引线；以及
包括密封剂的封装主体，其中，密封剂填充所述金属晶片垫和第一及第二金属引线之间的空间以便形成与晶片垫的底部平表面和第一及第二金属引线的底部平表面共同延伸的底部密封表面。
2.权利要求1所述的发光二极管封装结构，其中，晶片垫的凹腔的所述侧壁在侧壁与所述平芯片附连表面相交的汇合部处形成钝角。
3.权利要求2所述的发光二极管封装结构，其中，凹腔的侧壁被镀有金属镀层材料以便增强侧壁的反射特性。
4.权利要求1所述的发光二极管封装结构，其中，第一和第二引线具有：(i)面对晶片垫的上部内侧壁表面，其从引线的上部表面延伸到上部表面和底部表面之间的下部边缘，(ii)面对晶片垫的下部内侧壁表面，其与所述底部表面相交，以及(iii)中间表面，其从上部侧壁表面的下部边缘延伸到所述下部内侧壁表面，且其中，所述密封材料覆盖第一及第二引线的所述下部内侧壁表面并且至少部分覆盖第一及第二引线的所述上部内侧壁表面。
5.权利要求1所述的发光二极管封装结构，其进一步包括与所述晶片垫内的所述凹腔配合的嵌件，以用作发光二极管光反射器，所述嵌件具有从所述凹腔的平芯片附连表面延伸到所述上部表面的侧壁，并在所述侧壁与所述凹入平表面相交的汇合部处形成钝角。
6.权利要求1所述的发光二极管封装结构，其中，凹腔具有矩形或方形形状。
7.权利要求1所述的发光二极管封装结构，其中，凹腔具有圆形、六边形或八边形形状。
8.权利要求1所述的发光二极管封装结构，其中，凹腔的侧壁具有光滑面层并用作发光二极管反射器。
9.权利要求1所述的发光二极管封装结构，其中，凹腔的侧壁具有粗糙面层并用作发光二极管反射器。
10.权利要求1所述的发光二极管封装结构，其进一步包括：
附连到所述平芯片附连表面上的多个发光二极管芯片，每个发光二极管芯片都具有定位在芯片的上部表面上的第一和第二联接垫；
设置在金属晶片垫的相反侧上的多组第一及第二金属引线，多个芯片中的每个发光二极管芯片对应一组第一及第二引线；以及
多组第一及第二导体，每组将其相应发光二极管芯片的第一联接垫电连接到对应的第一金属引线，并且将其相应发光二极管芯片的第二联接垫电连接到对应的第二金属引线。
11.一种在制造发光二极管封装结构中使用的引线框架，该引线框架包括：
矩形的外部金属框架，其具有上部平表面和下部平表面；
多个内部框架，其以矩阵图案设置在所述外部金属框架内，每个内部框架包括芯片容纳区和设置在芯片容纳区的相反侧上的第一及第二引线；
其中，芯片容纳区和第一及第二引线具有与所述下部平表面共同延伸的底部表面以及具有与所述上部平表面共同延伸的上部表面，芯片容纳区进一步包括中心定位的凹腔，所述凹腔具有在所述引线框架的上部和下部平表面之间的凹入平表面并具有从所述凹入平表面延伸到所述上部表面的侧壁。
12.权利要求11所述的引线框架，其中，凹腔的侧壁在所述侧壁与凹入平表面相交的汇合部处形成钝角。
13.权利要求12所述的引线框架，其中，凹腔的侧壁被镀有金属镀层材料以便增强侧壁的反射特性。
14.权利要求11所述的引线框架，其中，第一和第二引线具有：(i)面对芯片容纳区的上部内侧壁表面，其从引线的上部表面延伸到所述上部表面和底部表面之间的下部边缘，(ii)面对芯片容纳区的下部内侧壁表面，其与所述底部表面相交，以及(iii)中间表面，其从所述上部侧壁表面的下部边缘延伸到所述下部内侧壁表面。
15.权利要求11所述的引线框架，其进一步包括与芯片容纳区内的凹腔配合的嵌件，以用作发光二极管光反射器，所述嵌件具有从所述凹腔的凹入平表面延伸到所述上部表面的侧壁，并在所述侧壁与凹入平表面相交的汇合部处形成钝角。
16.权利要求11所述的引线框架，其中，凹腔具有矩形或方形形状。
17.权利要求11所述的引线框架，其中，凹腔具有圆形、六边形或八边形形状。
18.权利要求11所述的引线框架，其中，凹腔的侧壁具有光滑面层并用作发光二极管反射器。
19.权利要求11所述的引线框架，其中，凹腔的侧壁具有粗糙面层并用作发光二极管反射器。
20.一种制造发光二极管封装结构的方法，该方法包括：
将具有基本方形形状的大面板框架/衬底安装到环上，其中，大面板框架/衬底包括以矩阵图案设置的多个晶片垫和对应多个引线，每个晶片垫包括平芯片附连表面；
将发光二极管芯片附连到每个晶片垫的所述平芯片附连表面；
施加密封材料，覆盖发光二极管芯片和至少部分大面板框架/衬底；并且
使晶片垫和对应引线与大面板框架/衬底分离以便形成发光二极管封装结构，其中，在将大面板框架/衬底安装到环上时，执行附连发光二极管芯片和施加密封材料的步骤。
21.权利要求20所述的方法，其中，施加密封剂进一步包括：
提供阵列模腔；
将所述密封材料分配到阵列模腔中；
将包含密封材料的阵列模腔与包含发光二极管芯片的大面板框架/衬底接合；并且
固化密封材料。
22.权利要求20所述的方法，其中，利用粘合胶带将大面板框架/衬底安装到环上。
23.权利要求20所述的方法，其中，利用输送装置运输大面板框架/衬底和环，该输送装置在附连发光二极管芯片、施加密封材料和分离晶片垫的步骤中提供向前/向后以及侧向的移动。
24.权利要求20所述的方法，其中，晶片垫的所述平芯片附连表面沿着凹腔的底部延伸。
25.权利要求24所述的方法，其中，凹腔的侧壁在侧壁与所述平芯片附连表面相交的汇合部处形成钝角。
26.权利要求24所述的方法，其进一步包括在凹腔内插入光反射器。
CN201110351245.5A 2010-11-02 2011-11-01 Led封装结构以及制造它使用的引线框架 Expired - Fee Related CN102544340B (zh)

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