CN102495506B - Electrophoretic display panel - Google Patents

Electrophoretic display panel Download PDF

Info

Publication number
CN102495506B
CN102495506B CN201110396325.2A CN201110396325A CN102495506B CN 102495506 B CN102495506 B CN 102495506B CN 201110396325 A CN201110396325 A CN 201110396325A CN 102495506 B CN102495506 B CN 102495506B
Authority
CN
China
Prior art keywords
conductive pattern
layer
electrophoretic display
disposed
dielectric layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110396325.2A
Other languages
Chinese (zh)
Other versions
CN102495506A (en
Inventor
黄智源
柯嘉豪
曾圣嘉
陈茂松
沈益民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Prime View International Co Ltd
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Publication of CN102495506A publication Critical patent/CN102495506A/en
Application granted granted Critical
Publication of CN102495506B publication Critical patent/CN102495506B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

An electrophoretic display panel comprises an active element array substrate and an electrophoretic display film. The active element array substrate comprises a substrate, a first conductive pattern, a first dielectric layer, a second conductive pattern and a second dielectric layer. The first conductive pattern is disposed on the substrate. The first dielectric layer is arranged on the substrate to cover the first conductive pattern, and the first dielectric layer is provided with a contact window to expose partial area of the first conductive pattern. The second conductive pattern is configured on the first dielectric layer and is electrically connected with the first conductive pattern through the contact window. The second dielectric layer is configured on the first dielectric layer to cover the second conductive pattern. The electrophoretic display film is configured on the second dielectric layer. The invention can reduce the oxidation and metal corrosion phenomena caused by the contact with air or an adhesion layer in the active element array substrate by improving the bridging structure of the first conductor pattern and the second conductor pattern in the active element array substrate, thereby leading the electrophoresis display panel to have better corrosion resistance.

Description

Electrophoretic display panel
Technical field
The invention relates to a kind of display panel, and relate to especially a kind of electrophoretic display panel (electrophoretic display panel, EPD).
Background technology
In recent years, because various display techniques are constantly flourish, through constantly research and development after, as products such as electrophoretic display device (EPD), liquid crystal display, plasma display, organic light emitting diode display, little by little commercialization be applied to various sizes and the display device of various areas.Day by day universal along with portable electronic product, flexible display (as Electronic Paper (e-paper), e-book (e-book) etc.) receives the concern in market gradually.Generally speaking, Electronic Paper (e-paper) and e-book (e-book) are to adopt electrophoretic display technology to reach the object of demonstration.To show that the e-book of black and white is as example, its sub-pixel is made up of black electrophoresis liquid and the white charged particles of mixing in black electrophoresis liquid, can drive white charged particles to move by executing alive mode, so that each pixel shows respectively the grey of black, white or different contrasts.
In the prior art, electrophoretic display device (EPD) is to utilize the reflection of external light source to reach the object of demonstration mostly, and is driven and mixed the white charged particles in electrophoresis liquid and can make each sub-pixel demonstrate required GTG by voltage.Generally speaking, the main framework of electrophoretic display device (EPD) is combined by a thin-film transistor array base-plate (TFT array substrate), an electrophoretic display thin film (EPD film) and a waterproof membrane (barrier film).Fig. 1 is the cut-away section schematic diagram of known electrophoretic display device (EPD).Please refer to Fig. 1, electrophoretic display device (EPD) 100 comprises thin-film transistor array base-plate 110, electrophoretic display thin film 130 and adhesion layer 140, and wherein adhesion layer 140 is in order to bonding film transistor (TFT) array substrate 110 and electrophoretic display thin film 130.
In thin-film transistor array base-plate 110, the first metal layer 114, dielectric layer 116, the second metal level 118, protective seam 120, flatness layer 122, the 3rd metal level 124 and transparency conducting layer 126 sequentially storehouse are arranged on substrate 112.For the first metal layer 114 and the second metal level 118 are electrically connected; known electrophoresis-type thin-film transistor array base-plate is to expose respectively part the first metal layer 114 and the second metal level 118 by form multiple contact holes in dielectric layer 116, protective seam 120, flatness layer 122, and utilizes the 3rd metal level 124 and transparency conducting layer 126 to overlap the first metal layer 114 and the second metal level 118 by above-mentioned contact hole.
But; for electrophoretic display device (EPD) technique; before also not sticking electrophoretic display thin film 130 and waterproof membrane protection, being exposed to airborne thin-film transistor array base-plate 110 has the quite high harmful effect such as probability generation plain conductor oxidation corrosion or film surface scratch.In addition, in the situation that utilizing the 3rd metal level 124 and transparency conducting layer 126 to overlap, owing to being only had the layer of transparent of covering conductive layer 126 by the 3rd laminated formed metal level 124 tops of molybdenum/aluminium/molybdenum (Mo/Al/Mo), therefore the chemical substance in adhesion layer 140 very easily with thin-film transistor array base-plate 110 in the 3rd metal level 124 carry out chemical reaction, therefore cause corrosion phenomenon.Thus, the metal erosion problem that thin-film transistor array base-plate 110 occurs can affect the element characteristic of thin film transistor (TFT), so cause the display quality of electrophoretic display device (EPD) or reliability (reliability) not good.
Summary of the invention
The invention provides a kind of electrophoretic display panel, there is preferably resistance to corrosion.
The present invention proposes a kind of electrophoretic display panel, and it comprises active component array base board and electrophoretic display thin film.Active component array base board comprises substrate, the first conductive pattern, the first dielectric layer, the second conductive pattern and the second dielectric layer.The first conductive pattern is disposed on substrate.The first dielectric layer is disposed on substrate to cover the first conductive pattern, and the first dielectric layer has contact hole so that the subregion of the first conductive pattern is exposed.The second conductive pattern is disposed on the first dielectric layer, and the second conductive pattern is electrically connected by contact hole and the first conductive pattern.The second dielectric layer is disposed on the first dielectric layer to cover the second conductive pattern.Electrophoretic display thin film is disposed on the second dielectric layer.
In one embodiment of this invention, above-mentioned electrophoretic display thin film comprises conductive layer, insulation course and multiple electrophoretic display medium.Insulation course is disposed on conductive layer, and wherein insulation course has multiple micro-cups (micro-cups) that are arrayed, and insulation course is between conductive layer and active component array base board.Electrophoretic display medium is disposed in micro-cup of insulation course.
In one embodiment of this invention, above-mentioned each electrophoretic display medium comprises electrophoresis liquid and multiple electrically charged particle, and wherein electrically charged particle is doped in electrophoresis liquid.
In one embodiment of this invention, above-mentioned electrophoresis liquid is black electrophoresis liquid, and electrically charged particle is white electrically charged particle.
In one embodiment of this invention, the second above-mentioned dielectric layer comprises protective seam and flatness layer.Protective seam is disposed on the first dielectric layer to cover the second conductive pattern.Flatness layer is disposed on protective seam, and electrophoretic display thin film is disposed on flatness layer.
The present invention separately proposes a kind of electrophoretic display panel, and it comprises active component array base board and electrophoretic display thin film.Active component array base board comprises substrate, the first conductive pattern, the first dielectric layer, the second conductive pattern, the second dielectric layer, the 3rd conductive pattern, protective seam and the 4th conductive pattern.The first conductive pattern is disposed on substrate.The first dielectric layer is disposed on substrate to cover the first conductive pattern, and the first dielectric layer has the first contact hole so that the subregion of the first conductive pattern is exposed.The second conductive pattern is disposed on the first dielectric layer.The second dielectric layer is disposed on the first dielectric layer to cover the second conductive pattern, and the second dielectric layer has the second contact hole and the 3rd contact hole, and the second contact hole exposes the subregion of the second conductive pattern, and the 3rd contact hole is positioned at the first contact hole top.The 3rd conductive pattern is disposed on the second dielectric layer, and wherein the 3rd conductive pattern is electrically connected by the second contact hole and the second conductive pattern, and the 3rd conductive pattern is by the first contact hole and the 3rd contact hole and the electric connection of the first conductive pattern.Protective seam is disposed on the second dielectric layer to cover the 3rd conductive pattern.The 4th conductive pattern is disposed on protective seam.Electrophoretic display thin film is disposed on the second dielectric layer.
In one embodiment of this invention, above-mentioned electrophoretic display thin film comprises conductive layer, insulation course and multiple electrophoretic display medium.Insulation course is disposed on conductive layer, and wherein insulation course has multiple micro-cups that are arrayed, and insulation course is between conductive layer and active component array base board.Electrophoretic display medium is disposed in micro-cup of insulation course.
In one embodiment of this invention, above-mentioned each electrophoretic display medium comprises electrophoresis liquid and multiple electrically charged particle, and wherein electrically charged particle is doped in electrophoresis liquid.
In one embodiment of this invention, above-mentioned electrophoresis liquid is black electrophoresis liquid, and electrically charged particle is white electrically charged particle.
In one embodiment of this invention, the second above-mentioned conductive pattern does not cover the first contact hole.
The present invention proposes again a kind of electrophoretic display panel, and it comprises active component array base board and electrophoretic display thin film.Active component array base board comprises substrate, the first conductive pattern, the first dielectric layer, the second conductive pattern, the second dielectric layer and the 3rd conductive pattern.The first conductive pattern is disposed on substrate.The first dielectric layer is disposed on substrate to cover the first conductive pattern, and the first dielectric layer has the first contact hole so that the subregion of the first conductive pattern is exposed.The second conductive pattern is disposed on the first dielectric layer.The second dielectric layer is disposed on the first dielectric layer to cover the second conductive pattern, and the second dielectric layer has the second contact hole and the 3rd contact hole, and the second contact hole exposes the subregion of the second conductive pattern, and the 3rd contact hole is positioned at the first contact hole top.The 3rd conductive pattern is disposed on the second dielectric layer, the 3rd conductive pattern comprises the simple metal layer being disposed on the second dielectric layer and is disposed at the transparency conducting layer on simple metal layer, wherein simple metal layer is electrically connected by the second contact hole and the second conductive pattern, and simple metal layer is by the first contact hole and the 3rd contact hole and the electric connection of the first conductive pattern.Electrophoretic display thin film is disposed on the second dielectric layer.
In one embodiment of this invention, above-mentioned electrophoretic display thin film comprises conductive layer, insulation course and multiple electrophoretic display medium.Insulation course is disposed on conductive layer, and wherein insulation course has multiple micro-cups that are arrayed, and insulation course is between conductive layer and active component array base board.Electrophoretic display medium is disposed in micro-cup of insulation course.
In one embodiment of this invention, above-mentioned each electrophoretic display medium comprises electrophoresis liquid and multiple electrically charged particle, and wherein electrically charged particle is doped in electrophoresis liquid.
In one embodiment of this invention, above-mentioned electrophoresis liquid is black electrophoresis liquid, and electrically charged particle is white electrically charged particle.
In one embodiment of this invention, the second above-mentioned dielectric layer comprises protective seam and flatness layer.Protective seam is disposed on the first dielectric layer to cover the second conductive pattern.Flatness layer is disposed on protective seam, and electrophoretic display thin film is disposed on flatness layer.
In one embodiment of this invention, the second above-mentioned conductive pattern does not cover the first contact hole.
In one embodiment of this invention, above-mentioned simple metal layer comprises titanium layer or molybdenum layer.
Based on above-mentioned, in electrophoretic display panel of the present invention, by the bridging structure of the first conductive pattern and the second conductive pattern in improvement active component array base board, can reduce in active component array base board because of the oxidation and the metal erosion phenomenon that contact with air or adhesion layer causes, and then make electrophoretic display panel there is preferably resistance to corrosion.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Accompanying drawing explanation
Fig. 1 is the cut-away section schematic diagram of existing electrophoretic display device (EPD).
Fig. 2 is the diagrammatic cross-section according to the electrophoretic display panel of first embodiment of the invention.
Fig. 3 is the diagrammatic cross-section according to the electrophoretic display panel of second embodiment of the invention.
Fig. 4 is the diagrammatic cross-section according to the electrophoretic display panel of third embodiment of the invention.
Wherein, Reference numeral:
100: electrophoretic display device (EPD)
110: thin-film transistor array base-plate
112,212,312,412: substrate
114: the first metal layer
116: dielectric layer
118: the second metal levels
120,324, PV: protective seam
122, PL: flatness layer
124: the three metal levels
126,426: transparency conducting layer
130,230: electrophoretic display thin film
140,240: adhesion layer
200,300,400: electrophoretic display panel
210,310,410: active component array base board
214,314,414: the first conductive patterns
216,316,416: the first dielectric layers
216a: contact hole
218,318,418: the second conductive patterns
220,320,420: the second dielectric layers
232: conductive layer
234: insulation course
234a: micro-cup
236: electrophoretic display medium
236a: electrophoresis liquid
236b: electrically charged particle
316a, 416a: the first contact hole
320a, 420a: the second contact hole
320b, 420b: the 3rd contact hole
322,422: the three conductive patterns
326: the four conductive patterns
424: simple metal layer
CH: channel layer
D: drain electrode
G: grid
GI: gate insulation layer
PE: pixel electrode
S: source electrode
T: active member
Embodiment
[the first embodiment]
Fig. 2 is the diagrammatic cross-section according to the electrophoretic display panel of first embodiment of the invention.Please refer to Fig. 2, the electrophoretic display panel 200 of the present embodiment comprises active component array base board 210 and electrophoretic display thin film 230.Active component array base board 210 comprises substrate 212, the first conductive pattern 214, the first dielectric layer 216, the second conductive pattern 218 and the second dielectric layer 220.
Substrate 212 is for example hard substrate (rigid substrate) or flexible base plate (flexible substrate).In one embodiment, substrate 212 is for example the hard substrate of glass substrate, quartz base plate or other material.In other embodiments, substrate 212 is for example the flexible base plate of plastic base or other material.In addition, the first conductive pattern 214 is disposed on substrate 212, and the material of the first conductive pattern 214 is for example metal or alloy.
The first dielectric layer 216 is disposed on substrate 212 has contact hole 216a so that the subregion of the first conductive pattern 214 is exposed to cover the first conductive pattern 214, the first dielectric layers 216.The material of the first dielectric layer 216 is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.
The second conductive pattern 218 is disposed on the first dielectric layer 216, and the second conductive pattern 218 is electrically connected by contact hole 216a and the first conductive pattern 214.The material of the second conductive pattern 218 is for example metal or alloy.
The second dielectric layer 220 is disposed on the first dielectric layer 216 to cover the second conductive pattern 218.In this embodiment, the second dielectric layer 220 comprises protective seam PV and flatness layer PL.Protective seam PV is disposed on the first dielectric layer 216 to cover the second conductive pattern 218.Flatness layer PL is disposed on protective seam PV.The material of protective seam PV is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.Flatness layer PL can be single layer structure or sandwich construction, and its material is for example the combination of inorganic material, organic material or above-mentioned material.
Particularly, active component array base board 210 also comprises multiple active member T and multiple pixel electrode PE.Active member T and pixel electrode PE are disposed on substrate 212, and pixel electrode PE and active member T electric connection.Active member T is for example thin film transistor (TFT).In one embodiment, active member T is mainly the gate insulation layer GI that comprises grid G, cover gate G, channel layer CH, source S and the drain D that is positioned at grid G I top, and wherein protective seam PV and flatness layer PL cover source S and drain D.Grid G and source S are electrically connected with sweep trace (not illustrating) and data line (not illustrating) respectively, and pixel electrode PE is electrically connected by opening and the drain D of protective seam PV and flatness layer PL.What specify is, in this embodiment, the first conductive pattern 214 is for example to be formed by identical conductive film layer patterning with the grid G of active member T, and the second conductive pattern 218 is for example to be formed by identical conductive film layer patterning with source S and the drain D of active member T.Pixel electrode PE can be single layer structure or sandwich construction, and its material is for example that transparent material is (as indium tin oxide (indium tin oxide, ITO), indium-zinc oxide (indium zinc oxide, IZO), aluminum zinc oxide (Al doped ZnO, AZO), indium gallium zinc oxide (Indium-Gallium-Zinc Oxide, IGZO), gallium-doped zinc oxide (Ga doped zinc oxide, GZO), zinc tin oxide (zinc-tin oxide, ZTO), indium oxide (In 2o 3), zinc paste (ZnO) or tin ash (SnO 2)), non-transparent material (as oxide, the oxides of nitrogen of above-mentioned material or the combination of above-mentioned material of the nitride of the alloy of gold, silver, copper, aluminium, molybdenum, titanium, tantalum, other suitable material, above-mentioned material, above-mentioned material, above-mentioned material), or the combination of above-mentioned transparent material and non-transparent material.
Electrophoretic display thin film 230 is disposed on the second dielectric layer 220.As shown in Figure 2, electrophoretic display thin film 230 is to be for example disposed on flatness layer PL.Electrophoretic display thin film 230 comprises conductive layer 232, insulation course 234 and multiple electrophoretic display medium 236.The material of conductive layer 232 is for example transparent conductive material, as indium tin oxide (indium tin oxide, ITO), indium-zinc oxide (indium zinc oxide, IZO), aluminum zinc oxide (Al doped ZnO, AZO), indium gallium zinc oxide (Indium-Gallium-Zinc Oxide, IGZO), gallium-doped zinc oxide (Ga doped zinc oxide, GZO), zinc tin oxide (zinc-tin oxide, ZTO), indium oxide (In 2o 3), zinc paste (ZnO) or tin ash (SnO 2) etc.
Insulation course 234 has multiple micro-glass of 234a that are arrayed via patterning, and insulation course 234 is between conductive layer 232 and active component array base board 210.Each micro-glass of 234a can be polygon cylinder space, Elliptic Cylinder space or cylindrical space, and the present invention does not do special restriction in this.The material of insulation course 234 can be dielectric material.
Electrophoretic display medium 236 is disposed in micro-glass of 234a of insulation course 234.In one embodiment, each electrophoretic display medium 236 comprises electrophoresis liquid 236a and multiple electrically charged particle 236b, and wherein electrically charged particle 236b dopant profiles is in electrophoresis liquid 236a.Electrophoresis liquid 236a is for example black electrophoresis liquid, and electrically charged particle 236b is for example white electrically charged particle.Certainly, in other embodiments, electrophoresis liquid 236a and charged particle 236b also can have other color.
In one embodiment, electrophoretic display panel 200 more comprises adhesion layer 240, and it is disposed between active component array base board 210 and electrophoretic display thin film 230, to engage active component array base board 210 and electrophoretic display thin film 230.The material of adhesion layer 240 is for example polyacrylate.
Say in detail, in this embodiment, adhesion layer 240 is to be for example attached between flatness layer PL and electrophoretic display thin film 230, and active component array base board 210 and electrophoretic display thin film 230 are engaged with each other by adhesion layer 240.Thus, when in order to meet feeler switch (test key), chip bonding area (IC-bonding area), demands such as electric static discharge protector (ESD protection device) or pixel indoor design and while overlapping the first conductive pattern 214 and the second conductive pattern 218, can utilize the second conductive pattern 218 to be electrically connected and to form direct overlap joint (direct contact) structure by contact hole 216a and the first conductive pattern 214, therefore must be by existing outermost metal structure (the 3rd metal level 124 as shown in Figure 1) overlap joint the first conductive pattern 214 and the second conductive pattern 218.In addition, first conductive pattern 214 of the present embodiment and the common direct bridging arrangement forming of the second conductive pattern 218 are subject to the two-layer protection of top protective seam PV and flatness layer PL, can contribute to significantly to strengthen the erosion-resisting ability of electrophoretic display panel 200.
[the second embodiment]
Fig. 3 is the diagrammatic cross-section according to the electrophoretic display panel of second embodiment of the invention.It is noted that, in Fig. 3, the member identical with Fig. 2 uses identical label and the description thereof will be omitted.Please refer to Fig. 3, electrophoretic display panel 300 comprises active component array base board 310 and electrophoretic display thin film 230.The chief component member of the electrophoretic display panel 200 in electrophoretic display panel 300 and first embodiment of the present embodiment is roughly similar, but difference is between the two mainly the thin portion structure that is active component array base board 310.Active component array base board 310 comprises substrate 312, the first conductive pattern 314, the first dielectric layer 316, the second conductive pattern 318, the second dielectric layer 320, the 3rd conductive pattern 322, protective seam 324 and the 4th conductive pattern 326.
Substrate 312 is for example hard substrate or flexible base plate.In one embodiment, substrate 312 is for example the hard substrate of glass substrate, quartz base plate or other material.In other embodiments, substrate 212 is for example the flexible base plate of plastic base or other material.In addition, the first conductive pattern 314 is disposed on substrate 312, and the material of the first conductive pattern 314 is for example metal or alloy.
The first dielectric layer 316 is disposed on substrate 312 has the first contact hole 316a so that the subregion of the first conductive pattern 314 is exposed to cover the first conductive pattern 314, the first dielectric layers 316.The material of the first dielectric layer 316 is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.
The second conductive pattern 318 is disposed on the first dielectric layer 316.In one embodiment, the second conductive pattern 318 does not cover the first contact hole 316a.The material of the second conductive pattern 318 is for example metal or alloy.
The second dielectric layer 320 is disposed on the first dielectric layer 316 to cover the second conductive pattern 318, the second dielectric layer 320 has the second contact hole 320a and the 3rd contact hole 320b, the second contact hole 320a exposes the subregion of the second conductive pattern 318, and the 3rd contact hole 320b is positioned at the first contact hole 316a top.The material of the second dielectric layer 320 is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.
The 3rd conductive pattern 322 is disposed on the second dielectric layer 320, wherein the 3rd conductive pattern 322 is electrically connected by the second contact hole 320a and the second conductive pattern 318, and the 3rd conductive pattern 322 is electrically connected by the first contact hole 316a and the 3rd contact hole 320b and the first conductive pattern 314.The material of the 3rd conductive pattern 322 is for example metal or alloy.
Protective seam 324 is disposed on the second dielectric layer 320 to cover the 3rd conductive pattern 322.Protective seam 324 can be single layer structure or sandwich construction, and its material is for example the combination of inorganic material, organic material or above-mentioned material.
The 4th conductive pattern 326 is disposed on protective seam 324.The material of the 4th conductive pattern 326 can be transparent conductive material, as indium tin oxide (indium tin oxide, ITO), indium-zinc oxide (indium zinc oxide, IZO), aluminum zinc oxide (Al doped ZnO, AZO), indium gallium zinc oxide (Indium-Gallium-Zinc Oxide, IGZO), gallium-doped zinc oxide (Ga doped zinc oxide, GZO), zinc tin oxide (zinc-tin oxide, ZTO), indium oxide (In 2o 3), zinc paste (ZnO) or tin ash (SnO 2) etc.
Active component array base board 310 also comprises multiple active member T and multiple pixel electrode PE.In this embodiment, the first conductive pattern 314 is for example to be formed by identical conductive film layer patterning with the grid G of active member T, and the second conductive pattern 318 is for example to be formed by identical conductive film layer patterning with source S and the drain D of active member T, and the 4th conductive pattern 326 is for example to be formed by identical conductive film layer patterning with pixel electrode PE.
Electrophoretic display thin film 230 is disposed on the second dielectric layer 320.As shown in Figure 3, electrophoretic display thin film 230 is to be for example disposed on the 4th conductive pattern 326.In this embodiment, adhesion layer 240 is to be for example attached between the 4th conductive pattern 326 and electrophoretic display thin film 230, and active component array base board 310 and electrophoretic display thin film 230 are engaged with each other by adhesion layer 240.It is worth mentioning that, the adhesion layer 240 of the present embodiment does not directly contact with the 3rd conductive pattern 322.In other words, between adhesion layer 240 and the 3rd conductive pattern 322 across protective seam 324.Be electrically connected the first conductive pattern 314 and the second conductive pattern 318 by being arranged at the 3rd conductive pattern 322 of protective seam 324 belows; so the mode that kind forms inside lap by the 3rd conductive pattern 322 can utilize protective seam 324 further to protect the 3rd conductive pattern 322, and reduce the chance that the 3rd conductive pattern 322 is corroded.
[the 3rd embodiment]
Fig. 4 is the diagrammatic cross-section according to the electrophoretic display panel of third embodiment of the invention.It is noted that, in Fig. 4, the member identical with Fig. 2 uses identical label and the description thereof will be omitted.Please refer to Fig. 4, electrophoretic display panel 400 comprises active component array base board 410 and electrophoretic display thin film 230.The chief component member of the electrophoretic display panel 200 in electrophoretic display panel 400 and first embodiment of the present embodiment is roughly similar, but difference is between the two mainly the thin portion structure that is active component array base board 410.Active component array base board 410 comprises substrate 412, the first conductive pattern 414, the first dielectric layer 416, the second conductive pattern 418, the second dielectric layer 420 and the 3rd conductive pattern 422.
Substrate 412 is for example hard substrate or flexible base plate.In one embodiment, substrate 212 is for example the hard substrate of glass substrate, quartz base plate or other material.In other embodiments, substrate 212 is for example the flexible base plate of plastic base or other material.In addition, the first conductive pattern 414 is disposed on substrate 412, and the material of the first conductive pattern 414 is for example metal or alloy.
The first dielectric layer 416 is disposed on substrate 412 has the first contact hole 416a so that the subregion of the first conductive pattern 414 is exposed to cover the first conductive pattern 414, the first dielectric layers 416.The material of the first dielectric layer 416 is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.
The second conductive pattern 418 is disposed on the first dielectric layer 416.In one embodiment, the second conductive pattern 418 does not cover the first contact hole 416a.The material of the second conductive pattern 418 is for example metal or alloy.
The second dielectric layer 420 is disposed on the first dielectric layer 416 to cover the second conductive pattern 418, the second dielectric layer 420 has the second contact hole 420a and the 3rd contact hole 420b, the second contact hole 420a exposes the subregion of the second conductive pattern 418, and the 3rd contact hole 420b is positioned at the first contact hole 416a top.In this embodiment, the second dielectric layer 420 comprises protective seam PV and flatness layer PL.Protective seam PV is disposed on the first dielectric layer 416 to cover the second conductive pattern 418.Flatness layer PL is disposed on protective seam PV.The material of protective seam PV is for example the dielectric materials such as silicon nitride, monox or silicon oxynitride.Flatness layer PL can be single layer structure or sandwich construction, and its material is for example the combination of inorganic material, organic material or above-mentioned material.
The 3rd conductive pattern 422 is disposed on the second dielectric layer 420, the 3rd conductive pattern 422 comprises and is disposed at the simple metal layer 424 on the second dielectric layer 420 and is disposed at the transparency conducting layer 426 on simple metal layer 424, wherein simple metal layer 424 is electrically connected by the second contact hole 420a and the second conductive pattern 418, and simple metal layer 424 is electrically connected by the first contact hole 416a and the 3rd contact hole 420b and the first conductive pattern 414.Simple metal layer 424 is for example titanium layer or molybdenum layer, or the layer of selecting other anti-oxidation metal to form.The material of transparency conducting layer 426 is for example indium tin oxide (indium tin oxide, ITO), indium-zinc oxide (indium zinc oxide, IZO), aluminum zinc oxide (Al doped ZnO, AZO), indium gallium zinc oxide (Indium-Gallium-Zinc Oxide, IGZO), gallium-doped zinc oxide (Ga doped zinc oxide, GZO), zinc tin oxide (zinc-tin oxide, ZTO), indium oxide (In 2o 3), zinc paste (ZnO) or tin ash (SnO 2) etc.
Active component array base board 410 also comprises multiple active member T and multiple pixel electrode PE.In this embodiment, the first conductive pattern 414 is for example to be formed by identical conductive film layer patterning with the grid G of active member T, and the second conductive pattern 418 is for example to be formed by identical conductive film layer patterning with source S and the drain D of active member T, and transparency conducting layer 426 in the 3rd conductive pattern 422 is for example to be formed by identical conductive film layer patterning with pixel electrode PE.
Electrophoretic display thin film 230 is disposed on the flatness layer PL of the second dielectric layer 420.As shown in Figure 4, electrophoretic display thin film 230 is to be for example disposed on the transparency conducting layer 426 of the 3rd conductive pattern 422.In this embodiment, adhesion layer 240 is to be for example attached between the 3rd conductive pattern 422 and electrophoretic display thin film 230, and active component array base board 410 and electrophoretic display thin film 230 are engaged with each other by adhesion layer 240.It is worth mentioning that, even only dispose transparency conducting layer 426 between adhesion layer 240 and simple metal layer 424, but the simple metal layer 424 of the present embodiment has oxidation resistance, therefore can reduce adhesion layer 240 corrode simple metal layer 424 situation occur.In addition, this kind comprises that the 3rd conductive pattern 422 structures of simple metal layer 424 can be applicable to various active component array base boards.
Described herein, although be that the present invention is not limited to this simple metal layer 424 is disposed on flatness layer PL as example describes in the 3rd embodiment.According to other embodiment; the present invention also can change to simple metal material (as titanium or molybdenum) by the 3rd conductive pattern 322 materials that are positioned at protective seam 324 belows in the second embodiment, and enters an anti-corrosion effects that promotes the electrophoretic display panel 300 of the second embodiment.
For confirming that the electrophoretic display panel of the above embodiment of the present invention has excellent resistance to corrosion really, next the several electrophoretic display panels that utilize existing electrophoretic display device (EPD) and above-described embodiment are illustrated respectively to its anti-corrosion effects for example.Following table 1 is listed respectively the time that occurs metal erosion according to the electrophoretic display panel 200,300,400 shown in the existing electrophoretic display device (EPD) 100 shown in Fig. 1 and Fig. 2 to Fig. 4 to judge erosion-resisting effect.
Table 1
There is metal erosion
Existing electrophoretic display device (EPD) 100 40 hours
Electrophoretic display panel 200 Exceed 500 hours
Electrophoretic display panel 300 Exceed 500 hours
Electrophoretic display panel 400 Exceed 168 hours
Result from above-mentioned table 1: existing electrophoretic display device (EPD) 100 as shown in Figure 1, under the condition of the hot and humid picture ongoing operation of 40 ℃ of RA and relative humidity 90% (RA 40/90), just there will be the phenomenon of metal erosion for 40 hours; Electrophoretic display panel 200 is as shown in Figure 2 under the condition of the hot and humid picture ongoing operation of 40 ℃ of RA and relative humidity 90%, even if be also difficult to observe the phenomenon of metal erosion after 500 hours; Electrophoretic display panel 300 is as shown in Figure 3 under the condition of the hot and humid picture ongoing operation of 40 ℃ of RA and relative humidity 90%, even if be also difficult to observe the phenomenon of metal erosion after 500 hours; Electrophoretic display panel 400 is as shown in Figure 4 under the condition of the hot and humid picture ongoing operation of 40 ℃ of RA and relative humidity 90%, even if be also difficult to observe the phenomenon of metal erosion after 168 hours.In other words,, compared to existing electrophoretic display device (EPD) 100, the present invention first all has better resistance to corrosion to the electrophoretic display panel 200,300,400 in the 3rd embodiment.
Described herein, although the distribution area of the distribution area of micro-glass of 234a and pixel electrode PE is suitable in the embodiment shown in Fig. 2 to Fig. 4, the present embodiment does not limit the distribution area of micro-glass of 234a and active member.In other feasible embodiment, the distribution area of micro-glass of 234a can be suitable with the distribution area of multiple pixel electrode PE.In addition in above-mentioned, be to there is the structure shown in Fig. 2 to Fig. 4 as example take electrophoretic display thin film 230, but electrophoretic display thin film 230 can also be other structure.In other words, the present invention is not limited the electrophoretic display thin film 230 in electrophoretic display panel 200,300,400, electrophoretic display thin film 230 can be any electrophoretic display thin film that is applicable to electrophoretic display panel, have and conventionally know that the knowledgeable is when knowing its variation and application by previous embodiment, therefore repeat no more in this in this technical field.
In sum; in electrophoretic display panel of the present invention; by making conductive pattern be subject to the protection of top protective seam and/or flatness layer; or select the designs such as oxidation resistant simple metal layer; and make the first conductive pattern and the second conductive pattern bridge joint, therefore can reduce in active component array base board because of the oxidation and the metal erosion phenomenon that contact with air or adhesion layer causes.Thus, active component array base board can have preferably element characteristic, and then can improve display quality or the reliability of electrophoretic display device (EPD).In addition, in electrophoretic display panel of the present invention, the first conductive pattern of active component array base board and the second conductive pattern overlapping mode can be integrated in existing technique, and can extremely various electrophoretic display panels of widespread use.
Certainly; the present invention also can have other various embodiments; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art can make according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the claims in the present invention.

Claims (11)

1. an electrophoretic display panel, is characterized in that, comprising:
One active component array base board, comprising:
One substrate;
One first conductive pattern, is disposed on this substrate;
One first dielectric layer, is disposed on this substrate to cover this first conductive pattern, and this first dielectric layer has a contact hole so that the subregion of this first conductive pattern is exposed;
One second conductive pattern, is disposed on this first dielectric layer, and this second conductive pattern is electrically connected by this contact hole and this first conductive pattern; And
One second dielectric layer, is disposed on this first dielectric layer to cover this second conductive pattern; This second dielectric layer comprises:
One protective seam, is disposed on this first dielectric layer to cover this second conductive pattern; And
One flatness layer, is disposed on this protective seam, and the material of this flatness layer is the combination of inorganic material, organic material or above-mentioned material;
One electrophoretic display thin film, is disposed on this flatness layer; And
One adhesion layer, is disposed between this active component array base board and this electrophoretic display thin film,
Wherein, active component array base board also comprises active member and multiple pixel electrode, this pixel electrode and this active member are electrically connected, this active member comprises grid, the gate insulation layer of cover gate, be positioned at the channel layer of grid top, source electrode and drain electrode, this first conductive pattern is formed by identical conductive film layer patterning with this grid of this active member, this second conductive pattern is formed by identical conductive film layer patterning with this source electrode and this drain electrode of this active member, this pixel electrode is electrically connected by opening and this drain electrode of this protective seam and this flatness layer.
2. electrophoretic display panel according to claim 1, is characterized in that, this electrophoretic display thin film comprises:
One conductive layer;
One insulation course, is disposed on this conductive layer, and wherein this insulation course has multiple micro-cups that are arrayed, and this insulation course is between this conductive layer and this active component array base board; And
Multiple electrophoretic display mediums, this that is disposed at this insulation course is slightly in cup.
3. electrophoretic display panel according to claim 2, is characterized in that, respectively this electrophoretic display medium comprises:
One electrophoresis liquid; And
Multiple electrically charged particles, are doped in this electrophoresis liquid.
4. electrophoretic display panel according to claim 3, is characterized in that, this electrophoresis liquid is a black electrophoresis liquid, and those electrically charged particles are white electrically charged particle.
5. electrophoretic display panel according to claim 1, is characterized in that, this flatness layer is that the material of sandwich construction and this first conductive pattern and this second conductive pattern is metal or alloy.
6. an electrophoretic display panel, comprising:
One active component array base board, comprising:
One substrate;
One first conductive pattern, is disposed on this substrate;
One first dielectric layer, is disposed on this substrate to cover this first conductive pattern, and this first dielectric layer has one first contact hole so that the subregion of this first conductive pattern is exposed;
One second conductive pattern, is disposed on this first dielectric layer;
One second dielectric layer, be disposed on this first dielectric layer to cover this second conductive pattern, this second dielectric layer has one second contact hole and one the 3rd contact hole, this second contact hole exposes the subregion of this second conductive pattern, the 3rd contact hole is positioned at this first contact hole top, this second dielectric layer comprises a protective seam and a flatness layer, this protective seam is disposed on this first dielectric layer to cover this second conductive pattern, this flatness layer is disposed on this protective seam, and the material of this flatness layer is the combination of inorganic material, organic material or above-mentioned material; And
One the 3rd conductive pattern, be disposed on this second dielectric layer, the 3rd conductive pattern comprises that a simple metal layer and being disposed on this second dielectric layer is disposed at the transparency conducting layer on this simple metal layer, wherein this simple metal layer is electrically connected by this second contact hole and this second conductive pattern, and this simple metal layer is by this first contact hole and the 3rd contact hole and the electric connection of this first conductive pattern, and this simple metal layer is titanium layer or molybdenum layer; And
One electrophoretic display thin film, is disposed on this flatness layer,
One adhesion layer, is disposed between this active component array base board and this electrophoretic display thin film,
Wherein, active component array base board also comprises active member and multiple pixel electrode, this pixel electrode and this active member are electrically connected, this active member comprises grid, the gate insulation layer of cover gate, be positioned at the channel layer of grid top, source electrode and drain electrode, this first conductive pattern is formed by identical conductive film layer patterning with this grid of this active member, this second conductive pattern is formed by identical conductive film layer patterning with this source electrode and this drain electrode of this active member, this transparency conducting layer in the 3rd conductive pattern is formed by identical conductive film layer patterning with this pixel electrode, this pixel electrode is electrically connected by opening and this drain electrode of this protective seam and this flatness layer.
7. electrophoretic display panel according to claim 6, is characterized in that, this electrophoretic display thin film comprises:
One conductive layer;
One insulation course, is disposed on this conductive layer, and wherein this insulation course has multiple micro-cups that are arrayed, and this insulation course is between this conductive layer and this active component array base board; And
Multiple electrophoretic display mediums, this that is disposed at this insulation course is slightly in cup.
8. electrophoretic display panel according to claim 7, is characterized in that, respectively this electrophoretic display medium comprises:
One electrophoresis liquid; And
Multiple electrically charged particles, are doped in this electrophoresis liquid.
9. electrophoretic display panel according to claim 8, is characterized in that, this electrophoresis liquid is a black electrophoresis liquid, and those electrically charged particles are white electrically charged particle.
10. electrophoretic display panel according to claim 6, is characterized in that, this flatness layer is that the material of sandwich construction and this first conductive pattern and this second conductive pattern is metal or alloy.
11. electrophoretic display panels according to claim 6, is characterized in that, this second conductive pattern does not cover this first contact hole.
CN201110396325.2A 2011-07-08 2011-11-29 Electrophoretic display panel Active CN102495506B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW100124262 2011-07-08
TW100124262A TWI444742B (en) 2011-07-08 2011-07-08 Electrophoretic display panel

Publications (2)

Publication Number Publication Date
CN102495506A CN102495506A (en) 2012-06-13
CN102495506B true CN102495506B (en) 2014-07-09

Family

ID=46187342

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110396325.2A Active CN102495506B (en) 2011-07-08 2011-11-29 Electrophoretic display panel

Country Status (2)

Country Link
CN (1) CN102495506B (en)
TW (1) TWI444742B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103969907B (en) 2013-02-05 2017-07-14 辉达公司 Display panel and the Flat electronic equipment with it
TWI505010B (en) * 2013-11-12 2015-10-21 E Ink Holdings Inc Active device array substrate
TWI702457B (en) 2019-04-23 2020-08-21 元太科技工業股份有限公司 Reflective active device array substrate and manufacturing method thereof and reflective display device and manufacturing method thereof
CN111856832A (en) * 2019-04-23 2020-10-30 元太科技工业股份有限公司 Reflective active element array substrate, manufacturing method thereof and reflective display device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006203121A (en) * 2005-01-24 2006-08-03 Seiko Epson Corp Semiconductor device, active matrix type electro-optical device, electronic apparatus, and manufacturing method of semiconductor device
CN1837935A (en) * 2005-03-25 2006-09-27 精工爱普生株式会社 Electro-optical device, method of manufacturing the same, and electronic apparatus
CN101038930A (en) * 2006-03-14 2007-09-19 精工爱普生株式会社 Electroluminescence device, manufacturing method thereof, and electronic apparatus
JP2007250306A (en) * 2006-03-15 2007-09-27 Seiko Epson Corp Light-emitting device and electronic equipment
CN101923263A (en) * 2009-06-10 2010-12-22 华映光电股份有限公司 Electrophoretic display device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1975547A (en) * 2005-11-28 2007-06-06 元太科技工业股份有限公司 Electronic ink displaying device
JP5589359B2 (en) * 2009-01-05 2014-09-17 セイコーエプソン株式会社 Electro-optical device and electronic apparatus
US8247276B2 (en) * 2009-02-20 2012-08-21 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor, method for manufacturing the same, and semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006203121A (en) * 2005-01-24 2006-08-03 Seiko Epson Corp Semiconductor device, active matrix type electro-optical device, electronic apparatus, and manufacturing method of semiconductor device
CN1837935A (en) * 2005-03-25 2006-09-27 精工爱普生株式会社 Electro-optical device, method of manufacturing the same, and electronic apparatus
CN101038930A (en) * 2006-03-14 2007-09-19 精工爱普生株式会社 Electroluminescence device, manufacturing method thereof, and electronic apparatus
JP2007250306A (en) * 2006-03-15 2007-09-27 Seiko Epson Corp Light-emitting device and electronic equipment
CN101923263A (en) * 2009-06-10 2010-12-22 华映光电股份有限公司 Electrophoretic display device

Also Published As

Publication number Publication date
TW201303462A (en) 2013-01-16
TWI444742B (en) 2014-07-11
CN102495506A (en) 2012-06-13

Similar Documents

Publication Publication Date Title
CN102955312B (en) Array substrate and manufacture method thereof and display device
US8259265B2 (en) Liquid crystal display panel, liquid crystal display apparatus and manufacturing method thereof
CN103474436B (en) A kind of array base palte and preparation method thereof, display unit
CN109427817A (en) Thin film transistor base plate and display
CN104166278B (en) Image element array substrates
CN104656323A (en) Display panel
CN103605241A (en) Liquid crystal display panel
CN106886107B (en) Display panel
TW200711143A (en) Organic thin film transistor display panel
CN103926760B (en) Dot structure and image element array substrates
US8896799B2 (en) Liquid crystal display including circuitry between sealants
CN102495506B (en) Electrophoretic display panel
CN204270000U (en) A kind of array base palte and display panels
CN102967978A (en) Array substrate, manufacture method thereof and display device
CN101872770B (en) Pixel unit, coplane conversion type liquid crystal display device and manufacturing method
CN104460160A (en) Pixel structure
CN105116582A (en) Liquid crystal display device and manufacture method of same
CN105183220A (en) Touch display device and driving method thereof
TWI532192B (en) Thin film transistor and pixel structure
CN102466932A (en) Liquid crystal panel, TFT (Thin Film Transistor) array substrate and manufacturing method of TFT array substrate
US8780063B2 (en) Touch display panel and method of manufacturing the same
CN203337963U (en) Array substrate and liquid crystal display device
CN104752442A (en) Array substrate
CN206961834U (en) Thin film transistor (TFT) and dot structure
CN203551921U (en) Array substrate and display device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20151013

Address after: Taiwan, China Hsinchu science and Technology Park Road, No. 3

Patentee after: Yuantai Science and Technology Industry Co., Ltd.

Address before: Taiwan, China Hsinchu science and Technology Industrial Park, Hsinchu Road, No. two, No. 1

Patentee before: AU Optronics Corporation