TWI532192B - Thin film transistor and pixel structure - Google Patents
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- TWI532192B TWI532192B TW103105715A TW103105715A TWI532192B TW I532192 B TWI532192 B TW I532192B TW 103105715 A TW103105715 A TW 103105715A TW 103105715 A TW103105715 A TW 103105715A TW I532192 B TWI532192 B TW I532192B
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- 239000010409 thin film Substances 0.000 title claims description 43
- 229910044991 metal oxide Inorganic materials 0.000 claims description 84
- 150000004706 metal oxides Chemical class 0.000 claims description 84
- 230000004888 barrier function Effects 0.000 claims description 62
- 239000004065 semiconductor Substances 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 23
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- 239000011787 zinc oxide Substances 0.000 claims description 8
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 3
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 3
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 3
- 229910052735 hafnium Inorganic materials 0.000 claims description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 3
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 239000007769 metal material Substances 0.000 description 7
- -1 IGZO) Chemical compound 0.000 description 6
- 239000010408 film Substances 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 125000004430 oxygen atom Chemical group O* 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 238000009413 insulation Methods 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 4
- 229910010272 inorganic material Inorganic materials 0.000 description 4
- 239000011147 inorganic material Substances 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 229920000620 organic polymer Polymers 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- WHXAGNPBEKUGSK-UHFFFAOYSA-N zinc antimony(3+) indium(3+) oxygen(2-) Chemical compound [Sb+3].[Zn+2].[O-2].[In+3].[O-2].[O-2].[O-2] WHXAGNPBEKUGSK-UHFFFAOYSA-N 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 2
- BCZWPKDRLPGFFZ-UHFFFAOYSA-N azanylidynecerium Chemical compound [Ce]#N BCZWPKDRLPGFFZ-UHFFFAOYSA-N 0.000 description 2
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 229920001744 Polyaldehyde Polymers 0.000 description 1
- 229920000265 Polyparaphenylene Polymers 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229920000233 poly(alkylene oxides) Polymers 0.000 description 1
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- 229920001470 polyketone Polymers 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
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- 238000004062 sedimentation Methods 0.000 description 1
- 150000005846 sugar alcohols Polymers 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
本發明是有關於一種半導體元件，且特別是有關於一種薄膜電晶體及畫素結構。 This invention relates to a semiconductor component, and more particularly to a thin film transistor and a pixel structure.
隨著現代資訊科技的進步，各種不同規格的顯示器已被廣泛地應用在消費者電子產品的螢幕之中，例如手機、筆記型電腦、數位相機以及個人數位助理(Personal Digital Assistant，PDA)等。在這些顯示器中，由於液晶顯示器(Liquid Crystal Display，LCD)及有機電激發光顯示器(Organic Electro-luminescent Display，OELD或稱為OLED)具有輕薄以及消耗功率低的優點，因此在市場中成為主流商品。LCD與OLED的製程包括將半導體元件陣列排列於基板上，而半導體元件包含薄膜電晶體(Thin Film Transistor，TFT)以及畫素結構。 With the advancement of modern information technology, displays of various specifications have been widely used in the screens of consumer electronic products, such as mobile phones, notebook computers, digital cameras, and personal digital assistants (PDAs). Among these displays, liquid crystal displays (LCDs) and organic electro-luminescent displays (OELDs or OLEDs) have become the mainstream products in the market due to their advantages of thinness and low power consumption. . The process of LCD and OLED includes arranging an array of semiconductor elements on a substrate, and the semiconductor element comprises a Thin Film Transistor (TFT) and a pixel structure.
一般而言，具有金屬氧化物半導體層(例如氧化銦鎵鋅(Indium Gallium Zinc Oxide，IGZO))的薄膜電晶體的起始電壓(threshold voltage，Vt)通常為負值(亦即，Vt<0)，因此在未施加電壓下處於導通狀態的薄膜電晶體會導致漏電流的問題。起始電 壓為負值的原因包括受到環境影響以及沉積影響。環境影響是由於外界環境中的水氣或後續膜層在形成時(例如使用氫電漿)的氫原子容易擴散至金屬氧化物半導體層並提供載子(電子)，因此容易影響其電性而使得起始電壓為負值。沉積影響是由於沉積的金屬氧化物半導體層會因為氧空缺而產生載子(電子)，因此本身即為導通狀態需藉由起始電壓為負值來排斥載子(電子)而使通道空乏，故起始電壓一般為負值。亦即，金屬氧化物半導體層的氧空缺的現象會使起始電壓通常為負值。由於起始電壓為負值的薄膜電晶體會導致漏電流的問題，因此如何開發出起始電壓為正值(亦即，Vt>0)的薄膜電晶體實為研發者所欲達成的目標之一。 In general, a thin film transistor having a metal oxide semiconductor layer (for example, Indium Gallium Zinc Oxide (IGZO)) has a negative threshold voltage (Vt) (ie, Vt<0). Therefore, a thin film transistor that is in an on state without applying a voltage causes a problem of leakage current. Starting electricity The reasons for the negative pressure include environmental impact and sedimentation. The environmental impact is due to the fact that hydrogen atoms in the external environment or subsequent layers are easily diffused to the metal oxide semiconductor layer and provide carriers (electrons) when they are formed (for example, using hydrogen plasma), thus easily affecting their electrical properties. Make the starting voltage a negative value. The deposition effect is due to the fact that the deposited metal oxide semiconductor layer will generate carriers (electrons) due to oxygen vacancies. Therefore, the conduction state itself needs to be negative by the initial voltage to repel the carriers (electrons) and the channel is depleted. Therefore, the starting voltage is generally negative. That is, the phenomenon of oxygen vacancies in the metal oxide semiconductor layer causes the initial voltage to be generally negative. Since a thin film transistor with a negative starting voltage causes a problem of leakage current, how to develop a thin film transistor whose positive starting voltage is positive (that is, Vt>0) is a goal that the developer wants to achieve. One.
本發明提供一種薄膜電晶體及畫素結構，可使得起始電壓為正值(亦即，Vt>0)。 The present invention provides a thin film transistor and a pixel structure that allows the starting voltage to be positive (i.e., Vt > 0).
本發明提出一種薄膜電晶體。薄膜電晶體配置於基板上。薄膜電晶體包括閘極、絕緣層、金屬氧化物半導體層、蝕刻阻擋層、源極、汲極、有機絕緣層以及金屬氧化物阻障層。絕緣層覆蓋閘極。金屬氧化物半導體層位於閘極上方的絕緣層上。蝕刻阻擋層覆蓋金屬氧化物半導體層，且蝕刻阻擋層具有第一接觸窗以及第二接觸窗。源極以及汲極分別相對設置於蝕刻阻擋層上，其中源極透過第一接觸窗與金屬氧化物半導體層電性連接，且汲極透過第二接觸窗與金屬氧化物半導體層電性連接。有機絕 緣層覆蓋蝕刻阻擋層、源極以及汲極。金屬氧化物阻障層覆蓋有機絕緣層。 The present invention provides a thin film transistor. The thin film transistor is disposed on the substrate. The thin film transistor includes a gate electrode, an insulating layer, a metal oxide semiconductor layer, an etch barrier layer, a source, a drain, an organic insulating layer, and a metal oxide barrier layer. The insulating layer covers the gate. The metal oxide semiconductor layer is on the insulating layer above the gate. The etch barrier layer covers the metal oxide semiconductor layer, and the etch barrier layer has a first contact window and a second contact window. The source and the drain are respectively disposed on the etch barrier layer, wherein the source is electrically connected to the metal oxide semiconductor layer through the first contact window, and the drain is electrically connected to the metal oxide semiconductor layer through the second contact window. Organic The edge layer covers the etch stop, the source, and the drain. The metal oxide barrier layer covers the organic insulating layer.
本發明另提出一種畫素結構。畫素結構包括薄膜電晶體以及畫素電極。薄膜電晶體配置於基板上。薄膜電晶體包括閘極、絕緣層、金屬氧化物半導體層、蝕刻阻擋層、源極、汲極、有機絕緣層以及金屬氧化物阻障層。絕緣層覆蓋閘極。金屬氧化物半導體層位於閘極上方的絕緣層上。蝕刻阻擋層覆蓋金屬氧化物半導體層，且蝕刻阻擋層具有第一接觸窗以及第二接觸窗。源極以及汲極分別相對設置於蝕刻阻擋層上，其中源極透過第一接觸窗與金屬氧化物半導體層電性連接，且汲極透過第二接觸窗與金屬氧化物半導體層電性連接。有機絕緣層覆蓋蝕刻阻擋層、源極以及汲極。金屬氧化物阻障層覆蓋有機絕緣層。畫素電極位於薄膜電晶體上且與汲極電性連接。 The invention further proposes a pixel structure. The pixel structure includes a thin film transistor and a pixel electrode. The thin film transistor is disposed on the substrate. The thin film transistor includes a gate electrode, an insulating layer, a metal oxide semiconductor layer, an etch barrier layer, a source, a drain, an organic insulating layer, and a metal oxide barrier layer. The insulating layer covers the gate. The metal oxide semiconductor layer is on the insulating layer above the gate. The etch barrier layer covers the metal oxide semiconductor layer, and the etch barrier layer has a first contact window and a second contact window. The source and the drain are respectively disposed on the etch barrier layer, wherein the source is electrically connected to the metal oxide semiconductor layer through the first contact window, and the drain is electrically connected to the metal oxide semiconductor layer through the second contact window. The organic insulating layer covers the etch barrier, the source, and the drain. The metal oxide barrier layer covers the organic insulating layer. The pixel electrode is located on the thin film transistor and electrically connected to the drain.
基於上述，由於金屬氧化物阻障層配置於薄膜電晶體的最外層，因此金屬氧化物阻障層可用以阻擋來自外界環境中的水氣或後續膜層在形成時(例如使用氫電漿)的氫原子擴散至金屬氧化物半導體層而影響其電性。再者，由於具有氧原子的有機絕緣層配置於金屬氧化物半導體層與金屬氧化物阻障層之間，因此有機絕緣層可用以提供氧原子至金屬氧化物半導體層而改善氧空缺的問題。如此一來，本實施例的薄膜電晶體的設計可使得起始電壓為正值(亦即，Vt>0)，進而可改善漏電流的問題。 Based on the above, since the metal oxide barrier layer is disposed on the outermost layer of the thin film transistor, the metal oxide barrier layer can be used to block moisture from the external environment or a subsequent film layer is formed (for example, using hydrogen plasma). The hydrogen atoms diffuse into the metal oxide semiconductor layer to affect its electrical properties. Furthermore, since the organic insulating layer having oxygen atoms is disposed between the metal oxide semiconductor layer and the metal oxide barrier layer, the organic insulating layer can be used to provide oxygen atoms to the metal oxide semiconductor layer to improve the problem of oxygen vacancies. In this way, the thin film transistor of the present embodiment is designed such that the starting voltage is positive (ie, Vt>0), thereby improving the leakage current problem.
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉 實施例，並配合所附圖式作詳細說明如下。 In order to make the above features and advantages of the present invention more apparent, the following is a special The embodiments are described in detail below in conjunction with the drawings.
10‧‧‧基板 10‧‧‧Substrate
10a‧‧‧表面 10a‧‧‧ surface
12‧‧‧畫素陣列層 12‧‧‧ pixel array
20‧‧‧對向基板 20‧‧‧ opposite substrate
30‧‧‧顯示介質 30‧‧‧Display media
50‧‧‧顯示面板 50‧‧‧ display panel
100‧‧‧薄膜電晶體 100‧‧‧film transistor
102‧‧‧閘極 102‧‧‧ gate
104‧‧‧絕緣層 104‧‧‧Insulation
106‧‧‧金屬氧化物半導體層 106‧‧‧Metal oxide semiconductor layer
108‧‧‧蝕刻阻擋層 108‧‧‧ etching barrier
108a‧‧‧第一接觸窗 108a‧‧‧First contact window
108b‧‧‧第二接觸窗 108b‧‧‧second contact window
110‧‧‧源極 110‧‧‧ source
112‧‧‧汲極 112‧‧‧汲polar
114‧‧‧有機絕緣層 114‧‧‧Organic insulation
116‧‧‧金屬氧化物阻障層 116‧‧‧Metal oxide barrier
140、240‧‧‧接觸窗 140, 240‧‧‧Contact window
150、250‧‧‧畫素電極 150, 250‧‧‧ pixel electrodes
200A、200B‧‧‧畫素結構 200A, 200B‧‧‧ pixel structure
210‧‧‧共用電極 210‧‧‧Common electrode
230‧‧‧絕緣層 230‧‧‧Insulation
250S‧‧‧狹縫 250S‧‧‧slit
DL‧‧‧資料線 DL‧‧‧ data line
I-I’‧‧‧線 I-I’‧‧‧ line
SL‧‧‧掃描線 SL‧‧‧ scan line
圖1A為依照本發明的第一實施例的畫素結構的上視示意圖。 1A is a top plan view of a pixel structure in accordance with a first embodiment of the present invention.
圖1B為圖1A的薄膜電晶體的放大示意圖。 FIG. 1B is an enlarged schematic view of the thin film transistor of FIG. 1A.
圖2為圖1A的畫素結構沿線I-I’的剖面示意圖。 Figure 2 is a cross-sectional view of the pixel structure of Figure 1A taken along line I-I'.
圖3為依照本發明的第二實施例的畫素結構的上視示意圖。 3 is a top plan view of a pixel structure in accordance with a second embodiment of the present invention.
圖4為圖3的畫素結構沿線I-I’的剖面示意圖。 Figure 4 is a cross-sectional view of the pixel structure of Figure 3 taken along line I-I'.
圖5為依照本發明的一實施例的顯示面板的剖面示意圖。 FIG. 5 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention.
圖1A為依照本發明的第一實施例的畫素結構的上視示意圖，圖1B為圖1A的薄膜電晶體的放大示意圖，而圖2為圖1A的畫素結構沿線I-I’的剖面示意圖。請同時參照圖1A、圖1B及圖2，畫素結構200A包括掃描線SL、資料線DL、薄膜電晶體100以及畫素電極150。 1A is a top plan view of a pixel structure in accordance with a first embodiment of the present invention, FIG. 1B is an enlarged schematic view of the thin film transistor of FIG. 1A, and FIG. 2 is a cross-sectional view of the pixel structure of FIG. 1A along line II' schematic diagram. Referring to FIG. 1A, FIG. 1B and FIG. 2 simultaneously, the pixel structure 200A includes a scan line SL, a data line DL, a thin film transistor 100, and a pixel electrode 150.
掃描線SL與資料線DL的延伸方向不相同，較佳的是掃描線SL的延伸方向與資料線DL的延伸方向垂直。此外，掃描線SL與資料線DL是位於不相同的膜層，且兩者之間夾有絕緣層(未繪示)。掃描線SL與資料線DL主要用來傳遞驅動此畫素結構200A的驅動訊號。掃描線SL與資料線DL一般是使用金屬材料。然而， 本發明不限於此。根據其他實施例，掃描線SL與資料線DL也可以使用其他導電材料例如是包括合金、金屬材料的氧化物、金屬材料的氮化物、金屬材料的氮氧化物或是金屬材料與其它導電材料的堆疊層。 The scanning line SL is different from the extending direction of the data line DL. Preferably, the extending direction of the scanning line SL is perpendicular to the extending direction of the data line DL. In addition, the scan line SL and the data line DL are different film layers, and an insulating layer (not shown) is interposed therebetween. The scan line SL and the data line DL are mainly used to transmit a driving signal for driving the pixel structure 200A. The scan line SL and the data line DL are generally made of a metal material. however, The invention is not limited thereto. According to other embodiments, the scan line SL and the data line DL may also use other conductive materials such as an alloy, an oxide of a metal material, a nitride of a metal material, an oxynitride of a metal material, or a metal material and other conductive materials. Stack layers.
薄膜電晶體100配置於基板10上。基板10的材料可為玻璃、石英、有機聚合物或是金屬等等。薄膜電晶體100包括閘極102、絕緣層104、金屬氧化物半導體層106、蝕刻阻擋層108、源極110、汲極112、有機絕緣層114以及金屬氧化物阻障層116。再者，薄膜電晶體100與掃描線SL以及資料線DL電性連接。更詳細來說，閘極102與掃描線SL電性連接，而源極110與資料線DL電性連接。換言之，當有控制訊號輸入掃描線SL時，掃描線SL與閘極102之間會電性導通；當有控制訊號輸入資料線DL時，資料線DL會與源極110電性導通。 The thin film transistor 100 is disposed on the substrate 10. The material of the substrate 10 may be glass, quartz, an organic polymer or a metal or the like. The thin film transistor 100 includes a gate 102, an insulating layer 104, a metal oxide semiconductor layer 106, an etch barrier layer 108, a source 110, a drain 112, an organic insulating layer 114, and a metal oxide barrier layer 116. Furthermore, the thin film transistor 100 is electrically connected to the scan line SL and the data line DL. In more detail, the gate 102 is electrically connected to the scan line SL, and the source 110 is electrically connected to the data line DL. In other words, when the control signal is input to the scan line SL, the scan line SL and the gate 102 are electrically connected; when the control signal is input to the data line DL, the data line DL is electrically connected to the source 110.
閘極102配置於基板10的表面10a上。閘極102之材料例如是包括金屬、合金、金屬氧化物、金屬氮化物、金屬氮氧化物或是金屬材料與上述材料的堆疊層，本發明不限於此。 The gate 102 is disposed on the surface 10a of the substrate 10. The material of the gate 102 is, for example, a metal, an alloy, a metal oxide, a metal nitride, a metal oxynitride or a stacked layer of a metal material and the above materials, and the present invention is not limited thereto.
絕緣層104覆蓋閘極102以及基板10的表面10a。在此，絕緣層104又可稱為閘極絕緣層，其材料例如是包括無機材料、有機材料或上述之組合。無機材料例如是包括氧化矽、氮化矽、氮氧化矽或上述至少二種材料的堆疊層。 The insulating layer 104 covers the gate 102 and the surface 10a of the substrate 10. Here, the insulating layer 104 may also be referred to as a gate insulating layer, and the material thereof includes, for example, an inorganic material, an organic material, or a combination thereof. The inorganic material is, for example, a stacked layer including cerium oxide, cerium nitride, cerium oxynitride or at least two of the above materials.
金屬氧化物半導體層106位於閘極102上方的絕緣層104上。金屬氧化物半導體層106的材料例如是包括氧化銦鎵鋅 (Indium Gallium Zinc Oxide，IGZO)、氧化銦鎵(Indium Gallium Oxide，IGO)、氧化銦鋅(Indium Zinc Oxide，IZO)、氧化銦錫鋅(Indium Tin Zinc Oxide，ITZO)、氧化鋅(Zinc oxide，ZnO)或其他合適的材料。 The metal oxide semiconductor layer 106 is on the insulating layer 104 above the gate 102. The material of the metal oxide semiconductor layer 106 is, for example, including indium gallium zinc oxide. (Indium Gallium Zinc Oxide, IGZO), Indium Gallium Oxide (IGO), Indium Zinc Oxide (IZO), Indium Tin Zinc Oxide (ITZO), Zinc Oxide (Zinc Oxide, ZnO) or other suitable material.
蝕刻阻擋層108覆蓋金屬氧化物半導體層106以及絕緣層104。蝕刻阻擋層108具有第一接觸窗108a以及第二接觸窗108b。第一接觸窗108a以及第二接觸窗108b分別暴露出部分金屬氧化物半導體層106。蝕刻阻擋層108的材料例如是包括氮化矽、氧化矽、氮氧化矽或其他合適的材料。 The etch barrier layer 108 covers the metal oxide semiconductor layer 106 and the insulating layer 104. The etch stop layer 108 has a first contact window 108a and a second contact window 108b. The first contact window 108a and the second contact window 108b expose a portion of the metal oxide semiconductor layer 106, respectively. The material of the etch stop layer 108 includes, for example, tantalum nitride, hafnium oxide, hafnium oxynitride or other suitable materials.
源極110以及汲極112分別相對設置於蝕刻阻擋層108上，其中源極110透過第一接觸窗108a與金屬氧化物半導體層106電性連接，且汲極112透過第二接觸窗108b與金屬氧化物半導體層106電性連接。源極110以及汲極112之材料例如是包括金屬、合金、金屬氧化物、金屬氮化物、金屬氮氧化物或是金屬材料與上述材料的堆疊層。 The source 110 and the drain 112 are respectively disposed on the etch barrier layer 108. The source 110 is electrically connected to the MOS layer 106 through the first contact window 108a, and the drain 112 is transmitted through the second contact window 108b and the metal. The oxide semiconductor layer 106 is electrically connected. The material of the source 110 and the drain 112 is, for example, a stacked layer including a metal, an alloy, a metal oxide, a metal nitride, a metal oxynitride or a metal material and the above materials.
有機絕緣層114覆蓋蝕刻阻擋層108、源極110以及汲極112。在此，有機絕緣層114又可稱為平坦層。有機絕緣層114的材料例如是包括聚酯類(PET)、聚烯類、聚丙醯類、聚碳酸酯類、聚環氧烷類、聚苯烯類、聚醚類、聚酮類、聚醇類、聚醛類、其它合適的材料、或上述之組合。有機絕緣層114的厚度例如是1.5~3μm，較佳是2~2.5μm。 The organic insulating layer 114 covers the etch barrier layer 108, the source electrode 110, and the drain electrode 112. Here, the organic insulating layer 114 may also be referred to as a flat layer. The material of the organic insulating layer 114 includes, for example, polyester (PET), polyolefin, polypropylene, polycarbonate, polyalkylene oxide, polyphenylene, polyether, polyketone, polyalcohol. Classes, polyaldehydes, other suitable materials, or combinations of the foregoing. The thickness of the organic insulating layer 114 is, for example, 1.5 to 3 μm, preferably 2 to 2.5 μm.
金屬氧化物阻障層116覆蓋有機絕緣層114。金屬氧化物 阻障層116的材料例如是包括氧化鋁、氧化鈦或其他合適的金屬氧化物材料。金屬氧化物阻障層116的厚度例如是大於60Å，較佳是300~400Å。金屬氧化物阻障層116的形成方法例如是物理氣相沉積法(Physical Vapor Deposition，PVD)或其他合適的方法，以形成具有緻密結構的金屬氧化物阻障層116。再者，金屬氧化物阻障層116與有機絕緣層114具有接觸窗140，接觸窗140暴露出部分汲極112。 The metal oxide barrier layer 116 covers the organic insulating layer 114. Metal oxide The material of the barrier layer 116 is, for example, aluminum oxide, titanium oxide or other suitable metal oxide material. The thickness of the metal oxide barrier layer 116 is, for example, greater than 60 Å, preferably 300 to 400 Å. The metal oxide barrier layer 116 is formed by, for example, Physical Vapor Deposition (PVD) or other suitable method to form a metal oxide barrier layer 116 having a dense structure. Furthermore, the metal oxide barrier layer 116 has a contact window 140 with the organic insulating layer 114, and the contact window 140 exposes a portion of the drain 112.
畫素電極150位於薄膜電晶體100上且與薄膜電晶體100電性連接。更詳細來說，畫素電極150位於金屬氧化物阻障層116上。畫素電極150可透過接觸窗140與汲極112電性連接，其中接觸窗140穿過金屬氧化物阻障層116以及有機絕緣層114。畫素電極150為透明導電材料，其包括金屬氧化物，例如是銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層。 The pixel electrode 150 is located on the thin film transistor 100 and electrically connected to the thin film transistor 100. In more detail, the pixel electrode 150 is located on the metal oxide barrier layer 116. The pixel electrode 150 is electrically connected to the drain 112 through the contact window 140 , wherein the contact window 140 passes through the metal oxide barrier layer 116 and the organic insulating layer 114 . The pixel electrode 150 is a transparent conductive material including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, Or a stacked layer of at least two of the above.
值得一提的是，本實施例的薄膜電晶體100包括依序堆疊的金屬氧化物半導體層106、蝕刻阻擋層108、有機絕緣層114以及金屬氧化物阻障層116。由於具有緻密結構的金屬氧化物阻障層116配置於薄膜電晶體100的最外層，因此金屬氧化物阻障層116可用以阻擋來自外界環境中的水氣或後續膜層(未繪示)在形成時(例如使用氫電漿)的氫原子擴散至金屬氧化物半導體層106而影響其電性。再者，由於具有氧原子的有機絕緣層114配置於金屬氧化物半導體層106與金屬氧化物阻障層116之間，因此有機 絕緣層114可用以提供氧原子至金屬氧化物半導體層106而改善氧空缺的問題。如此一來，本實施例的薄膜電晶體100的設計可使得起始電壓(threshold voltage，Vt)為正值(亦即，Vt>0)，進而可改善漏電流的問題。 It is worth mentioning that the thin film transistor 100 of the present embodiment includes the metal oxide semiconductor layer 106, the etching stopper layer 108, the organic insulating layer 114, and the metal oxide barrier layer 116 which are sequentially stacked. Since the metal oxide barrier layer 116 having a dense structure is disposed on the outermost layer of the thin film transistor 100, the metal oxide barrier layer 116 can be used to block moisture or a subsequent film layer (not shown) from the external environment. Hydrogen atoms at the time of formation (for example, using a hydrogen plasma) diffuse to the metal oxide semiconductor layer 106 to affect electrical conductivity. Furthermore, since the organic insulating layer 114 having oxygen atoms is disposed between the metal oxide semiconductor layer 106 and the metal oxide barrier layer 116, organic The insulating layer 114 can be used to provide oxygen atoms to the metal oxide semiconductor layer 106 to improve oxygen vacancies. As a result, the thin film transistor 100 of the present embodiment is designed such that the threshold voltage (Vt) is a positive value (that is, Vt>0), thereby improving the leakage current.
圖1A至圖2之實施例是以畫素結構200A包括畫素電極150為例來說明，但本發明不限於此。在其他實施例中，畫素結構亦可以是邊際場切換式(Fringe Field Switching，FFS)液晶顯示面板或其他合適的顯示面板。換句話說，只要畫素結構包括上述圖1A至圖2之實施例所述的薄膜電晶體100即落入本發明的範疇中，本發明不特別限定畫素電極的結構。 The embodiment of FIGS. 1A to 2 is described by taking the pixel structure 200A including the pixel electrode 150 as an example, but the present invention is not limited thereto. In other embodiments, the pixel structure may also be a Fringe Field Switching (FFS) liquid crystal display panel or other suitable display panel. In other words, as long as the pixel structure 100 includes the above-described thin film transistor 100 described in the embodiment of Figs. 1A to 2, which falls within the scope of the present invention, the structure of the pixel electrode is not particularly limited in the present invention.
圖3為依照本發明的第二實施例的畫素結構的上視示意圖，而圖4為圖3的畫素結構沿線I-I’的剖面示意圖。圖3至圖4中與上述實施例相同或相似的元件符號於此不再贅述。圖3至圖4之實施例與上述圖1A至圖2之實施例的不同之處在於，畫素結構200B包括共用電極210、絕緣層230以及畫素電極250。 3 is a top plan view of a pixel structure in accordance with a second embodiment of the present invention, and FIG. 4 is a cross-sectional view of the pixel structure of FIG. 3 taken along line I-I'. The same or similar elements in FIGS. 3 to 4 as those of the above embodiment will not be described again. The embodiment of FIGS. 3 to 4 differs from the embodiment of FIGS. 1A to 2 described above in that the pixel structure 200B includes a common electrode 210, an insulating layer 230, and a pixel electrode 250.
共用電極210位於金屬氧化物阻障層116上。共用電極210與共用電壓(Vcom)電性連接。共用電極210例如是圖案化或未圖案化的透明電極層，本發明不特別限定。共用電極210的材料包括金屬氧化物，例如是銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層。 The common electrode 210 is located on the metal oxide barrier layer 116. The common electrode 210 is electrically connected to the common voltage (Vcom). The common electrode 210 is, for example, a patterned or unpatterned transparent electrode layer, and the present invention is not particularly limited. The material of the common electrode 210 includes a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or at least two of the above. Stacked layers.
絕緣層230覆蓋共用電極210以及金屬氧化物阻障層 116。絕緣層230的材料例如是包括無機材料、有機材料或上述之組合。無機材料例如是包括氧化矽、氮化矽、氮氧化矽或上述至少二種材料的堆疊層。再者，絕緣層230、金屬氧化物阻障層116及有機絕緣層114具有接觸窗240，接觸窗240暴露出部分汲極112。 The insulating layer 230 covers the common electrode 210 and the metal oxide barrier layer 116. The material of the insulating layer 230 is, for example, an inorganic material, an organic material, or a combination thereof. The inorganic material is, for example, a stacked layer including cerium oxide, cerium nitride, cerium oxynitride or at least two of the above materials. Furthermore, the insulating layer 230, the metal oxide barrier layer 116 and the organic insulating layer 114 have a contact window 240, and the contact window 240 exposes a portion of the drain 112.
畫素電極250位於薄膜電晶體100上且與薄膜電晶體100電性連接。更詳細來說，畫素電極250位於絕緣層230上且對應共用電極210設置。因此，絕緣層230配置於畫素電極250與共用電極210之間，以使畫素電極250與共用電極210電性絕緣。再者，畫素電極250可透過接觸窗240與汲極112電性連接，其中接觸窗240穿過絕緣層230、金屬氧化物阻障層116及有機絕緣層114。畫素電極250例如是圖案化的透明導電層，且具有多個彼此平行的條狀的狹縫250S，但本發明不限於此。在其他實施例中，狹縫250S的形狀亦可以包括矩形、正方形、圓形、橢圓形、三角形、菱形、多邊形或其他合適的形狀。畫素電極250的材料包括金屬氧化物，例如是銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層。 The pixel electrode 250 is located on the thin film transistor 100 and is electrically connected to the thin film transistor 100. In more detail, the pixel electrode 250 is located on the insulating layer 230 and disposed corresponding to the common electrode 210. Therefore, the insulating layer 230 is disposed between the pixel electrode 250 and the common electrode 210 to electrically insulate the pixel electrode 250 from the common electrode 210. Furthermore, the pixel electrode 250 can be electrically connected to the drain electrode 112 through the contact window 240 , wherein the contact window 240 passes through the insulating layer 230 , the metal oxide barrier layer 116 and the organic insulating layer 114 . The pixel electrode 250 is, for example, a patterned transparent conductive layer, and has a plurality of strip-shaped slits 250S parallel to each other, but the present invention is not limited thereto. In other embodiments, the shape of the slit 250S may also include a rectangle, a square, a circle, an ellipse, a triangle, a diamond, a polygon, or other suitable shape. The material of the pixel electrode 250 includes a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or at least The stack of the two.
圖5為依照本發明的一實施例的顯示面板的剖面示意圖。請參照圖5，顯示面板50包括基板10、畫素陣列層12、對向基板20以及顯示介質30。顯示面板50例如是液晶顯示面板(例如邊際場切換式液晶顯示面板等)、有機發光二極體顯示面板、電泳 顯示面板、電漿顯示面板或其他合適的顯示面板。 FIG. 5 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention. Referring to FIG. 5 , the display panel 50 includes a substrate 10 , a pixel array layer 12 , an opposite substrate 20 , and a display medium 30 . The display panel 50 is, for example, a liquid crystal display panel (for example, a margin field switching liquid crystal display panel, etc.), an organic light emitting diode display panel, and electrophoresis. Display panel, plasma display panel or other suitable display panel.
基板10的材料可為玻璃、石英、有機聚合物或是金屬等等。基板10的表面10a上包括配置有畫素陣列層12，其中所述畫素陣列層12是由上述多個畫素結構200A(如圖1A至圖2所示)或畫素結構200B(如圖3至圖4所示)組成陣列形式所構成。 The material of the substrate 10 may be glass, quartz, an organic polymer or a metal or the like. The surface 10a of the substrate 10 includes a pixel array layer 12 disposed thereon, wherein the pixel array layer 12 is composed of the plurality of pixel structures 200A (as shown in FIGS. 1A to 2) or the pixel structure 200B (as shown in FIG. 1). 3 to 4) constitutes an array form.
對向基板20位於基板10的對向。對向基板20的材料可為玻璃、石英或有機聚合物等等。根據本發明之另一實施例，對向基板20上可更包括設置有彩色濾光陣列層(未繪示)，其包括紅、綠、藍色濾光圖案。另外，對向基板20上可更包括設置遮光圖案層(未繪示)，其又可稱為黑矩陣，其設置於彩色濾光陣列層的圖案之間。 The counter substrate 20 is located opposite to the substrate 10. The material of the opposite substrate 20 may be glass, quartz or an organic polymer or the like. According to another embodiment of the present invention, the opposite substrate 20 may further include a color filter array layer (not shown) including red, green, and blue filter patterns. In addition, the opposite substrate 20 may further include a light shielding pattern layer (not shown), which may be referred to as a black matrix, which is disposed between the patterns of the color filter array layers.
顯示介質30位於基板10上的畫素陣列層12與對向基板20之間。當顯示面板50為液晶顯示面板時，顯示介質30例如是液晶分子。在其他實施例中，當顯示面板50為有機發光二極體顯示面板時，顯示介質30例如是有機發光層。當顯示面板50為電泳顯示面板時，顯示介質30例如是電泳顯示介質。當顯示面板50為電漿顯示面板時，顯示介質30例如是電漿顯示介質。 The display medium 30 is located between the pixel array layer 12 on the substrate 10 and the opposite substrate 20. When the display panel 50 is a liquid crystal display panel, the display medium 30 is, for example, liquid crystal molecules. In other embodiments, when the display panel 50 is an organic light emitting diode display panel, the display medium 30 is, for example, an organic light emitting layer. When the display panel 50 is an electrophoretic display panel, the display medium 30 is, for example, an electrophoretic display medium. When the display panel 50 is a plasma display panel, the display medium 30 is, for example, a plasma display medium.
綜上所述，在本發明的薄膜電晶體及畫素結構中，依序堆疊了金屬氧化物半導體層、蝕刻阻擋層、有機絕緣層以及金屬氧化物阻障層。由於具有緻密結構的金屬氧化物阻障層配置於薄膜電晶體的最外層，因此金屬氧化物阻障層可用以阻擋來自外界環境中的水氣或後續膜層在形成時(例如使用氫電漿)的氫原子擴 散至金屬氧化物半導體層而影響其電性。再者，由於具有氧原子的有機絕緣層配置於金屬氧化物半導體層與金屬氧化物阻障層之間，因此有機絕緣層可用以提供氧原子至金屬氧化物半導體層而改善氧空缺的問題。如此一來，本實施例的薄膜電晶體的設計可使得起始電壓為正值(亦即，Vt>0)，進而可改善漏電流的問題。 In summary, in the thin film transistor and pixel structure of the present invention, a metal oxide semiconductor layer, an etch barrier layer, an organic insulating layer, and a metal oxide barrier layer are sequentially stacked. Since the metal oxide barrier layer having a dense structure is disposed on the outermost layer of the thin film transistor, the metal oxide barrier layer can be used to block moisture from the external environment or a subsequent film layer is formed (for example, using hydrogen plasma) Hydrogen atom expansion Disperse to the metal oxide semiconductor layer to affect its electrical properties. Furthermore, since the organic insulating layer having oxygen atoms is disposed between the metal oxide semiconductor layer and the metal oxide barrier layer, the organic insulating layer can be used to provide oxygen atoms to the metal oxide semiconductor layer to improve the problem of oxygen vacancies. In this way, the thin film transistor of the present embodiment is designed such that the starting voltage is positive (ie, Vt>0), thereby improving the leakage current problem.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
10‧‧‧基板 10‧‧‧Substrate
10a‧‧‧表面 10a‧‧‧ surface
100‧‧‧薄膜電晶體 100‧‧‧film transistor
102‧‧‧閘極 102‧‧‧ gate
104‧‧‧絕緣層 104‧‧‧Insulation
106‧‧‧金屬氧化物半導體層 106‧‧‧Metal oxide semiconductor layer
108‧‧‧蝕刻阻擋層 108‧‧‧ etching barrier
108a‧‧‧第一接觸窗 108a‧‧‧First contact window
108b‧‧‧第二接觸窗 108b‧‧‧second contact window
110‧‧‧源極 110‧‧‧ source
112‧‧‧汲極 112‧‧‧汲polar
114‧‧‧有機絕緣層 114‧‧‧Organic insulation
116‧‧‧金屬氧化物阻障層 116‧‧‧Metal oxide barrier
140‧‧‧接觸窗 140‧‧‧Contact window
150‧‧‧畫素電極 150‧‧‧pixel electrodes
I-I’‧‧‧線 I-I’‧‧‧ line
Claims (10)
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