CN103926760B - Dot structure and image element array substrates - Google Patents

Dot structure and image element array substrates Download PDF

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Publication number
CN103926760B
CN103926760B CN201310012752.5A CN201310012752A CN103926760B CN 103926760 B CN103926760 B CN 103926760B CN 201310012752 A CN201310012752 A CN 201310012752A CN 103926760 B CN103926760 B CN 103926760B
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opening
electrode
dot structure
characteristic length
insulating barrier
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CN103926760A (en
Inventor
刘轩辰
张宪政
唐大庆
吴建豪
王景昭
林荣震
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Hannstar Display Corp
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Hannstar Display Corp
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Priority to CN201310012752.5A priority Critical patent/CN103926760B/en
Priority to US13/831,992 priority patent/US8890157B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78678Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Abstract

The invention discloses a kind of dot structure, including substrate, the thin film transistor (TFT) being arranged on substrate, the first insulating barrier being covered on thin film transistor (TFT) and substrate, common electrode, connection electrode, the second insulating barrier and pixel electrode.Thin film transistor (TFT) includes a drain electrode.First insulating barrier has one first opening, exposes drain electrode.Common electrode is arranged on the first insulating barrier with connection electrode.Connection electrode is extended to be electrically connected with the drain in the first opening, and connection electrode is electrically insulated with common electrode.Second insulating barrier is covered in the first insulating barrier, connection electrode and common electrode, and with one second opening, exposes connection electrode.Pixel electrode is arranged on the second insulating barrier, and is electrically connected with by the second opening and connection electrode.Whereby, the aperture opening ratio of dot structure can effectively be lifted.

Description

Dot structure and image element array substrates
Technical field
It is more particularly to a kind of that there is lifting pixel aperture ratio the present invention relates to a kind of dot structure and image element array substrates Dot structure and image element array substrates, that is, a kind of HUA (HannStar Ultra-high Aperture) technology.
Background technology
Liquid crystal display panel has that external form is frivolous, power consumption is few and the characteristic such as radiationless pollution, has been widely used On the portable type information products such as notebook (notebook), personal digital assistant (PDA), and gradually substitution has been passed The CRT monitor of system desktop PC.
Available liquid crystal display panel is made up of colored filter substrate, image element array substrates and liquid crystal layer, and liquid Crystal layer is arranged between colored filter substrate and image element array substrates, and passes through the rotation side for the liquid crystal molecule for adjusting liquid crystal layer Always control pixel is bright dark.Fig. 1 is refer to, Fig. 1 show the section view signal of the dot structure of existing image element array substrates Figure.As shown in figure 1, dot structure 10 include substrate 12, thin film transistor (TFT) 14, bridging line 16, protective layer 18, flatness layer 20 and Pixel electrode 22.Thin film transistor (TFT) 14 is arranged on substrate 12, and includes grid 14a, source electrode 14b, drain electrode 14c and passage Layer 14d.Bridging line 16 is arranged on substrate 12.Protective layer 18 is covered on thin film transistor (TFT) 14 and substrate 12, and with first Be open 18a, exposes drain electrode 14c.Flatness layer 20 is covered on protective layer 18, and with the second opening 20a, correspondence first is open 18a, to expose drain electrode 14c.Pixel electrode 22 is arranged on flatness layer 20, and is electrically connected by opening 18a, 20a with drain electrode 14c Connect.Also, bridging line 16 is overlapping with pixel electrode 22, bridging line 16, pixel electrode 22, protective layer 18 is set to be constituted with flatness layer 20 Storage capacitors.
However, the first opening 18a has bit errors, and the second opening in the drain electrode 14c of alignment thin film transistor 14 20a also has bit errors when being directed at the first opening 18a.Furthermore, the covering of pixel electrode 22 second be open 20a when also have pair Position error.Because the bit errors of the first opening 18a, the second opening 20a and pixel electrode 22 can influence each other, electricity thus be accordingly used in Property connection pixel electrode 22 and thin film transistor (TFT) 14 the drain electrode 14c size of attachment structure 24 can be open simultaneously by first The influence of 18a, the second opening 20a and pixel electrode 22 bit errors, and the characteristic length L1 of attachment structure 24 need to be designed For the characteristic length L2 more than the first opening 18a, and 4 to 8 times of characteristic length L2 of the about slightly first opening 18a, for example:20 To 28 microns so that pixel electrode 22 can be in contact by the first opening 18a and the second opening 20a with drain electrode 14c.So One, the attachment structure 24 for connecting pixel electrode 22 and drain electrode 14c can influence the area of the pixel electrode 22 for display, And then limit the aperture opening ratio of dot structure 10.
Therefore, under the increased trend of resolution ratio of image element array substrates, the aperture opening ratio actually industry of dot structure is lifted The target of effort.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of dot structure and image element array substrates, to lift pixel knot The aperture opening ratio of structure and image element array substrates.
In order to solve the above technical problems, the invention provides a kind of dot structure, including substrate, thin film transistor (TFT), first Insulating barrier, transparent conductive layer, the second insulating barrier and pixel electrode.Thin film transistor (TFT) is arranged on substrate, and film is brilliant Body pipe includes a grid, a source electrode and a drain electrode.First insulating barrier is covered on thin film transistor (TFT) and substrate, and first exhausted Edge layer has one first opening, exposes drain electrode.Transparent conductive layer is arranged on the first insulating barrier, and transparent conductive patterns Layer includes common electrode and connection electrode.Connection electrode is extended to be electrically connected with the drain in the first opening, and connection electrode It is electrically insulated with common electrode.Second insulating barrier is covered in the first insulating barrier and transparent conductive layer, and the second insulating barrier With one second opening, connection electrode is exposed.Pixel electrode is arranged on the second insulating barrier, and by the second opening with being connected Electrode is electrically connected with.Drain electrode, the first opening, connection electrode, the second opening constitute an attachment structure with pixel electrode
In order to solve the above technical problems, present invention also offers a kind of image element array substrates, including multiple dot structures, being in An array mode is arranged.The common electrode positioned at the wantonly two adjacent dot structures of same a line is connected to each other.
The dot structure of the present invention is electrically connected with the drain electrode of pixel electrode and thin film transistor (TFT) by connection electrode, therefore First opening is not limited and the second superposition of end gap or not overlapping.So, the leakage for being electrically connected with pixel electrode and thin film transistor (TFT) 1 to the 2.5 of the characteristic length of reducible slightly first opening of characteristic length of the attachment structure of pole or the characteristic length of the second opening Times, the big I of attachment structure is effectively reduced whereby, and then can effectively lift the aperture opening ratio of dot structure.
Brief description of the drawings
Fig. 1 show the schematic cross-sectional view of the dot structure of existing image element array substrates.
Fig. 2 show the upper schematic diagram of the image element array substrates of first embodiment of the invention.
Fig. 3 show the enlarged diagram of Fig. 2 single dot structure.
Fig. 4 show schematic cross-sectional views of the Fig. 3 along Section line A-A '.
Fig. 5 is the schematic cross-sectional view of the dot structure of second embodiment of the invention.
Fig. 6 is the upper schematic diagram of the dot structure of third embodiment of the invention.
Fig. 7 is the upper schematic diagram of the dot structure of fourth embodiment of the invention.
Wherein, description of reference numerals is as follows:
10th, 100,200,300,400 dot structure
12nd, 104 substrate
14th, 112 thin film transistor (TFT)
14a, 112a grid
14b, 112c source electrode
14c, 112d drain
14d, 122 channel layers
16 bridging lines
18 protective layers
18a, 114a first is open
20 flatness layers
20a, 118a second is open
22nd, 120 pixel electrode
102 dot structures
106 data wires
108 scan lines
110 gate insulators
112b semiconductor layers
114 first insulating barriers
114b, 118b, 128a, L1, L2 characteristic length
116 transparent conductive layers
118 second insulating barriers
124 ohmic contact layers
126 common electrodes
126a breach
128 connection electrodes
130 attachment structures
Embodiment
Fig. 2 to Fig. 4 is refer to, Fig. 2 show the upper schematic diagram of the image element array substrates of first embodiment of the invention, schemed 3 show the enlarged diagram of Fig. 2 single dot structure, and Fig. 4 show section view signals of the Fig. 3 along Section line A-A ' Figure.
As shown in Fig. 2 to Fig. 4, the image element array substrates 100 of the present embodiment include multiple dot structures 102, in an array Mode is arranged.Also, it is brilliant that dot structure 102 includes substrate 104, data wire 106, scan line 108, gate insulator 110, film Body pipe 112, the first insulating barrier 114, transparent conductive layer 116, the second insulating barrier 118 and pixel electrode 120.
Wherein, data wire 106 is arranged on substrate 104 with scan line 108, and interlaced with each other, and thin film transistor (TFT) 112 is set It is placed on substrate 104, and proximity data line 106 and the staggered place of scan line 108.Also, thin film transistor (TFT) 112 includes grid 112a, semiconductor layer 112b, source electrode 112c and drain electrode 112d.Grid 112a is electrically connected with scan line 108, and source electrode 112c electricity Property connection data wire 106.
In the present embodiment, the grid 112a of thin film transistor (TFT) 112 is an extension of scan line 108 so that scan line 108 can be electrically connected with grid 112a, and scan line 108 and grid 112a is made up of the first metal layer M1.Also, grid Insulating barrier 110 is covered on the first metal layer M1 grid 112a constituted and scan line 108 and substrate 104, and is partly led Body layer 112b is arranged on gate insulator 110, and positioned at grid 112a surface.
The source electrode 112c of thin film transistor (TFT) 112 is an extension of data wire 106 so that data wire 106 can be with source electrode 112c is electrically connected with, and data wire 106, source electrode 112c and drain electrode 112d are made up of second metal layer M2.Second metal layer M2 is arranged on gate insulator 110 and semiconductor layer 112b, therefore gate insulator 110 can be used for first metal that is electrically insulated Layer M1 and second metal layer M2.Furthermore, source electrode 112c and drain electrode 112d be not contacting one another, but is respectively arranged at correspondence grid On the semiconductor layer 112b of pole 112a both sides, and partly overlapped respectively with grid 112a.
Also, semiconductor layer 112b may include channel layer 122 and ohmic contact layer 124.It is exhausted that channel layer 122 is arranged at grid In edge layer 110, and non-crystalline silicon, polysilicon, metal oxide semiconductor material or other semi-conducting materials are can be for example, but do not limited In this.Ohmic contact layer 124 be arranged between channel layer 122 and source electrode 112c and channel layer 122 and drain electrode 112d between, use Contact resistance between reduction silicon and metal material, and can be for example non-crystalline silicon, polysilicon, the metal oxidation doped with ion Thing semi-conducting material or other semi-conducting materials, but the present invention is not limited.
The thin film transistor (TFT) of the present invention, the structure of scan line and data wire are not limited to said structure, or its Its change structure, e.g. thin film transistor (TFT) can be the transistor of other species.Or, scan line is not by same with grid One metal level is constituted, or data wire, source electrode and drain electrode are made up of same metal level.
In addition, HUA (HannStar Ultra-high Aperture) technology that the present invention is provided, its first insulating barrier 114 are covered on thin film transistor (TFT) 112, data wire 106 and gate insulator 110, and the first insulating barrier 114 has the first opening 114a, exposes drain electrode 112d.For example, first opening 114a can be a square openings, and first opening 114a one Characteristic length 114b, for example:The length of side, reducible slightly 4 microns, but not limited to this, the first opening 114a can also be other shapes Opening, for example:Circle, characteristic length is then diameter.
First insulating barrier 114 of the present embodiment may include photoresist, but not limited to this, can also include organic material or Inorganic material.Transparent conductive layer 116 is arranged on the first insulating barrier 114, and can be made up of transparent conductive material, example Such as:Tin indium oxide, indium zinc oxide, aluminum oxide tin or aluminum zinc oxide, but not limited to this.
The HUA technologies that the present invention is provided, its transparent conductive layer 116 includes common electrode 126 and connection electrode 128.Common electrode 126 is used to transmit shared signal.Connection electrode 128 is extended in the first opening 114a to connect with the 112d that drains Touch, and be electrically connected with drain electrode 112d.Also, connection electrode 128 is not in contact with common electrode 126, therefore connection electrode 128 It is electrically insulated with common electrode 126.
In the present embodiment, the common electrode 126 positioned at the wantonly two adjacent dot structures 102 of same a line is to be connected with each other Connect so that the common electrode 126 with the dot structure 102 of a line can be connected to each other to a bridging line.Also, common electrode 126 May extend to it is overlapping with scan line 108 with thin film transistor (TFT) 112, data wire 106, therefore common electrode 126 can be used for shielding with Completely cut off produced by the electrode being positioned above and the thin film transistor (TFT) 112 being disposed below, data wire 106 and scan line 108 Coupling effect, to reduce the thin film transistor (TFT) 112, data wire 106 and scan line 108 of the lower section of common electrode 126 to common electrode The electrode of 126 tops produces the influence of potential change.
In the alternate embodiment of the present invention, the common electrode positioned at wantonly two adjacent dot structures of same row can also that This is connected.Or, common electrode can only with data line overlap, or common electrode can also only with scan line and film crystal Pipe is overlapping.
Furthermore, the second insulating barrier 118 is covered on the insulating barrier 114 of transparent conductive layer 116 and first, and the second insulation Layer 118 has the second opening 118a, exposes connection electrode 128.For example, the second opening 118a can open for a square Mouthful, and the second opening 118a reducible slightly 4 microns, but not limited to this of a characteristic length 118b, the second opening 114a can also It is other shapes of opening, for example:Circle, characteristic length is then diameter.Also, in order to avoid common electrode 126 and drain electrode 112d and connection electrode 128 are electrically connected with, and common electrode 126 has a breach 126a, the opening of correspondence first 114a and second Be open 118a so that common electrode 126 is not overlapping with the first opening 114a and the second opening 118a.
In the present embodiment, the second opening 118a and the first opening 114a have formed objects, but not limited to this.In this hair In bright alternate embodiment, the first opening can also have different size with the second opening.
Pixel electrode 120 is arranged on the second insulating barrier 118, and is connected by the second opening 118a with connection electrode 128 Touch, and be electrically connected with connection electrode 128, pixel electrode 120 can electrically be connected by connection electrode 128 with drain electrode 112d whereby Connect.When image element array substrates 100 and colored filter substrate and liquid crystal layer composition liquid crystal display panel, pixel electrode 120 Voltage can be used for control liquid crystal layer in liquid crystal molecule orientation.Also, pixel electrode 120, the second insulating barrier 118 are together A storage capacitors are may make up with electrode 126, the voltage signal of pixel electrode is sent to store.
It is noted that the common electrode 126 of the present embodiment is extended to thin film transistor (TFT) 112, data wire 106 with sweeping Retouch line 108 overlapping, therefore common electrode 126 can be used for shielding pixel electrode 120 to be protected from thin film transistor (TFT) 112, data wire 106 influence with the electric charge of scan line 108, to reduce coupling effect, the pixel between pixel electrode 120 and thin film transistor (TFT) 112 The coupling effect between coupling effect and pixel electrode 120 and scan line 108 between electrode 120 and data wire 106.
Consequently, it is possible to which by foregoing HUA technologies, the pixel electrode 120 of the present embodiment can be closer to thin film transistor (TFT) 112nd, data wire 106 and scan line 106.For example, pixel electrode 120 can be overlapping with data wire 106 so that in the prior art Region between pixel electrode and data wire can be effectively used to display pixel, and then can lift pixel aperture ratio.In this hair In bright alternate embodiment, pixel electrode can also be with scanning line overlap, but not limited to this.
In addition, the drain electrode 112d of the thin film transistor (TFT) 112 of the present embodiment, the first opening 114a, connection electrode 128, second The 118a that is open constitutes an attachment structure 130 with pixel electrode 120.It is worth noting that, connection electrode 128 is by the first opening 114a and thin film transistor (TFT) 112 drain electrode 112d are electrically connected with, and pixel electrode 120 is with being connected electricity by the second opening 114b Pole 128 is electrically connected with, thus when connection electrode 128 simultaneously with first opening 114a and second opening 118a it is overlapping when, pixel Electrode 120 can be electrically connected with by the drain electrode 112d of connection electrode 128 and thin film transistor (TFT) 112.
It follows that the first opening 114a does not limit overlapping or not overlapping with the second opening 118a, therefore first opened in design During the openings of mouth 114a and second 114b size, the drain electrode 112d of the first opening 114a alignment thin films transistor 112 contraposition is missed Difference can't influence the bit errors of the second opening 118a alignment connection electrodes 128.Consequently, it is possible to for being electrically connected with pixel electricity Pole 120 and the reducible slightly first opening 114a of characteristic length 128a of the drain electrode 112d of thin film transistor (TFT) 112 connection electrode 128 1 to 2.5 times of characteristic length 118b of the openings of characteristic length 114b or second 118a, the big I of attachment structure 130 whereby Effectively reduced, and then can effectively lift the aperture opening ratio of dot structure 102.
In the present embodiment, the first opening 114a is not overlapping with the second opening 118a, therefore the connection electricity of the present embodiment The minimum 118a that rough can be open with the first characteristic length 114b and second for being open 114a of the characteristic length 128a of pole 128 spy The totalling for levying length 118b is identical.For example, when the first opening 114a size is identical with the second opening 118a size, More than 2 times of the reducible slightly first opening 114a of characteristic length 128a of connection electrode 128 characteristic length 114b, for example:8 is micro- Rice, but the invention is not restricted to this.
It follows that the characteristic length 128a of the connection electrode 128 of the present embodiment, the about slightly size of attachment structure 130, It can be effectively reduced from 4 to 8 times of the first opening 114a characteristic length 114b as 2.5 times, therefore the pixel electrode of light-permeable 120 area can be increased, to lift the aperture opening ratio of dot structure 102.
In addition, the connection electrode 128 of the present embodiment is by same 116 structures of transparent conductive layer with common electrode 126 Into, therefore connection electrode 128 can be formed simultaneously when forming common electrode 126 so that the setting of connection electrode 128 can't increase Plus processing step, it will not also lift cost of manufacture.
Also, the second opening 118a of the present embodiment is correspondence connection electrode 128, therefore is etching the second insulating barrier 118 To be formed during the second opening 118a, connection electrode 128 can be used for the first insulating barrier 114 of protection from the destruction of etching liquid so that Common electrode 126 can avoid because the first insulating barrier 114 is destroyed and when pixel electrode 120 is formed with the electricity of pixel electrode 120 Property connection.
The dot structure of the present invention is not limited with above-described embodiment.It will hereafter continue to disclose other embodiments of the invention Or change shape, so for the purpose of simplifying the description and highlight each embodiment or change shape between difference, hereinafter using identical label mark Same components are noted, and no longer counterweight is partly repeated again.
Fig. 5 is refer to, Fig. 5 is the schematic cross-sectional view of the dot structure of second embodiment of the invention.As shown in figure 5, comparing First embodiment, the second opening 118a of the dot structure 200 of the present embodiment is overlapping with the first opening 114a, therefore the present embodiment Connection electrode 128 characteristic length 128a can more narrow down to it is rough with first opening 114a characteristic length 114b or second open Mouth 118a characteristic length 118b is identical.For example, when the first opening 114a size and the second opening 118a size phase Meanwhile, more than 1 times of the reducible slightly first opening 114a of characteristic length 128a of connection electrode 128 characteristic length 114b, example Such as:4 microns so that the size of attachment structure 130 can more narrow down to the rough characteristic length 114b or the with the first opening 114a Two opening 118a characteristic length 118b is identical, but the invention is not restricted to this.
It follows that the characteristic length 128a of the connection electrode 128 of the present embodiment can from first opening 114a feature it is long 4 to 8 times of degree 114b are effectively reduced as 1 times, therefore the area of the pixel electrode 120 of light-permeable can be increased, to lift picture The aperture opening ratio of plain structure 200.
Fig. 6 is refer to, Fig. 6 is the upper schematic diagram of the dot structure of third embodiment of the invention.As shown in fig. 6, comparing First embodiment, the common electrode 126 of the dot structure 300 of the present embodiment is not overlapping with data wire 106, and only with scan line 108 and thin film transistor (TFT) 112 it is overlapping.
Fig. 7 is refer to, Fig. 7 is the upper schematic diagram of the dot structure of fourth embodiment of the invention.As shown in fig. 7, comparing First embodiment, the common electrode 126 of the dot structure 400 of the present embodiment not with scan line 108 and the weight of thin film transistor (TFT) 112 It is folded, and it is only overlapping with data wire 106.
In summary, dot structure of the invention is electrically connected with pixel electrode and thin film transistor (TFT) by connection electrode Drain, therefore the first opening is not limited and the second superposition of end gap or not overlapping.So, it is brilliant with film for being electrically connected with pixel electrode The characteristic length or the characteristic length of the second opening of reducible slightly first opening of characteristic length of the connection electrode of the drain electrode of body pipe 1 to 2.5 times, the big I of attachment structure is effectively reduced whereby, and then can effectively lift the aperture opening ratio of dot structure.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies Change, equivalent substitution, improvement etc., should be included in the scope of the protection.

Claims (12)

1. a kind of dot structure, it is characterised in that including:
One substrate;
One thin film transistor (TFT), is arranged on the substrate, and the thin film transistor (TFT) includes a grid, a source electrode and a leakage Pole;
One data wire and scan line, are arranged on the substrate, and interlaced with each other;
One first insulating barrier, is covered on the thin film transistor (TFT), the data wire and the substrate, and first insulating barrier With one first opening, the drain electrode is exposed;
One transparent conductive layer, is arranged on first insulating barrier, and the transparent conductive layer includes:
One common electrode;And
One connection electrode, extend to it is described first opening in it is described drain electrode be electrically connected with, and the connection electrode with it is described common It is electrically insulated with electrode;
One second insulating barrier, is covered in first insulating barrier and the transparent conductive layer, and second insulating barrier With one second opening, the connection electrode is exposed;And
One pixel electrode, is arranged on second insulating barrier, and is electrically connected with the connection electrode by the described second opening Connect;
Wherein, the data wire is respectively formed in different metal layer, the drain electrode, first opening, institute with the scan line State connection electrode, second opening and constitute an attachment structure with the pixel electrode.
2. dot structure as claimed in claim 1, it is characterised in that the characteristic length of the connection electrode is opened for described first 1 to 2.5 times of the characteristic length of the characteristic length of mouth or second opening.
3. dot structure as claimed in claim 1, it is characterised in that the characteristic length of the connection electrode is minimum with described the The totalling of the characteristic length of the characteristic length of one opening and second opening is identical.
4. dot structure as claimed in claim 1, it is characterised in that first opening has identical with the described second opening Size.
5. dot structure as claimed in claim 4, it is characterised in that the characteristic length of the connection electrode is opened for described first More than twice of the characteristic length of the characteristic length of mouth or second opening.
6. dot structure as claimed in claim 1, it is characterised in that second opening and first superposition of end gap.
7. dot structure as claimed in claim 6, it is characterised in that the characteristic length of the connection electrode is opened for described first More than one times of the characteristic length of the characteristic length of mouth or second opening.
8. dot structure as claimed in claim 1, it is characterised in that the common electrode is overlapping with the thin film transistor (TFT).
9. dot structure as claimed in claim 1, it is characterised in that source electrode described in the data line electrical connection, described to sweep Retouch line and be electrically connected with the grid.
10. dot structure as claimed in claim 9, it is characterised in that the common electrode and the data wire described are swept Retouch line overlap.
11. dot structure as claimed in claim 1, it is characterised in that the common electrode not with the described first opening and Second superposition of end gap.
12. a kind of image element array substrates, it is characterised in that including:
Multiple dot structures as claimed in claim 1, are arranged in an array mode;
Wherein, the common electrode positioned at the wantonly two adjacent dot structures of same a line is connected to each other.
CN201310012752.5A 2013-01-14 2013-01-14 Dot structure and image element array substrates Active CN103926760B (en)

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CN201310012752.5A CN103926760B (en) 2013-01-14 2013-01-14 Dot structure and image element array substrates
US13/831,992 US8890157B2 (en) 2013-01-14 2013-03-15 Pixel structure having patterned transparent conductive layer

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