CN102468196A - 具有铜块电极的分立电路元件及其制造方法 - Google Patents

具有铜块电极的分立电路元件及其制造方法 Download PDF

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CN102468196A
CN102468196A CN2010105887051A CN201010588705A CN102468196A CN 102468196 A CN102468196 A CN 102468196A CN 2010105887051 A CN2010105887051 A CN 2010105887051A CN 201010588705 A CN201010588705 A CN 201010588705A CN 102468196 A CN102468196 A CN 102468196A
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electrode
copper base
pair
opposite end
copper
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于振海
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Abstract

一种具有铜块电极的分立电路元件，将简单的铜基板用作元件的基础，该元件通过提供在主基板中预制的电极分离孔而制成。电极分离孔导致构成分立元件产品的制造简化。由于电极分离孔的存在，当每个制成的设备从主生产矩阵中脱离时，对于处于生产最终阶段的每个设备，两个凝结铜块自动成形。

Description

具有铜块电极的分立电路元件及其制造方法
技术领域
本发明一般涉及分立电路元件，尤其涉及分具有良好电气特性和散热特性的分立电路元件的主体封装。本发明更涉及一种具有铜块电极的分立电路元件封装及其相应的制造方法。
背景技术
为了构造电子设备，大量且广泛地使用如晶体管、二极管、电阻以及电容等有源和无源分立电路元件。与IC相反，分立类型的电路元件可用在多种不同的封装中，在这些封装中无铅封装是最普遍的一种。多个无铅分立电路元件封装的生产包括印刷电路板技术的使用。多个封装依靠用于设备芯片(dice)和封装电极之间的电连接的镀通孔(plated through hole)。
然而，这些基于PCB技术的分立电路元件封装设计在其电气性能和热性能两方面都受限。因此，与PCB技术中的薄铜箔的层相比较，已经尝试在构造分立电路元件的过程中寻求使用厚铜板。然而，由于传统的基于铜基板的分立电路元件生产依靠蚀刻来塑造铜电极，因此它们是复杂的且包括对环境不利的工艺。
发明内容
因此，本发明的一个目的是提供一种具有铜块电极的分立电路元件及其相应的制造方法，其提供良好电气特性和热特性。
本发明的另一个目的是提供一种具有铜块电极的分立电路元件及其相应的制造方法，其集合了简单的、久经考验的以及成熟的制造技术步骤的最少步骤，从而降低了成本并提高了可靠性。
为了达到上述和其它目的，本发明提供了一种具有铜块电极的分立电路元件及其相应的制造方法，其利用构造设备基础的简单的铜基板。在主初始基板中执行的电极分离孔导致用于构造所发明的分立元件产品的制造程序简单。从字面上讲，由于电极分离孔的存在，从而当每个设备从主生产矩阵上脱离时，在生产最终阶段，对于每个所制造的设备，两个铜凝结块(concreteblocks)自动成形。
在一个优选实施例中，本发明用于制作具有铜块电极的分立电路元件的方法包括：首先在主铜基板中形成电极分离孔。然后，在所述铜基板上放置电路芯片，所述芯片具有一个电极，该电极在所述电极分离孔的第一对相对端的每一个的外部附近电连接到所述铜基板。然后，利用密闭密封材料来密封所述芯片。然后，所述密封材料经历沿所述元件的外围边缘进行切割的切割程序，以脱开所述元件。所述切割切入与所述第一对相对端基本上正交的所述铜基板中的所述电极分离孔的第二对相对端的每一个的内部。
附图说明
图1为示意性示出用作构造本发明所发明的分立电路元件的基础的压印铜基板的一部分的透视图。
图2为图1的基板的平面图。
图3A、图4A、图5和图6示意性示出使用图1的基板在所发明的元件封装的制造的不同连续阶段中的横截面。
图3B和图4B分别示出在图3A和图4A中示出的基板上的元件封装构造的俯视图。
图7示意性示出根据本发明优选实施例的元件封装的透视图。
图8示意性示出所发明的元件封装的另一实施例的横截面构造。
图9和图10示意性示出所发明的元件封装的另外两个实施例的横截面构造。
图11为示意性示出用作构造本发明所发明的分立电路元件的基础的图案化铜基板的一部分的另一基板的平面图。
图12示意性示出图11的基板的横截面。
具体实施方式
为了获得更好的电气特性和热特性，所发明的分立电路元件将整片铜基板用作构造元件封装的基础。根据本发明的优选实施例，可在典型厚度为0.12mm的一片铜板上开始进行例如符合JEDEC 0201设备规格标准的瞬态电压抑制器(TVS)二极管的构造。
如在如下段落中将要参见附图进行描述的，实质上将本设备基板整个厚度用作设备电极，从而保证所制造的设备的良好的电气特性和热特性。图1为示意性示出用作构造本发明所发明的分立电路元件的基础的压印铜基板的一部分的透视图。图2为图1的基板的平面图。
如附图所示，所发明的电路元件封装的构造开始于制备具有孔的铜基板102，所述孔是制造阶段的生产阶段特征，称为电极分离孔114。如附图所示，这些孔114优选在压印程序中形成并以在基板102上达到最大设备总体密度(device population device)的二维矩阵的方式排列。
例如，以二维阵列的形式顺序地排列通过细虚线161、162、163以及164在图1中标出的单位面积(将单个分立元件的“占据面”(real estate)分配给基板102上的每个单位面积)，该二维阵列例如在同一竖列上具有封装单元161、162以及163(还有其它更多未被标出的封装单元)，并在同一横行上具有单元162和164(同样还有其它更多未被标出的封装单元)。
设备封装分配的单位面积的所有这些行和列可组装铜基板102的最大可能的表面。例如，为了与现今印刷电路板制作设施兼容并为了利用现今印刷电路板制造设施，基板102的适合尺寸例如可为某种60mmx40mm的尺寸。采用这一基板尺寸，只要在单个基板上即可生产尺寸为0402的分立电路元件的某些2000封装，这是在商业上经济并且有效的批量生产方式。
要注意，如图1所示，每个制造的封装的每一单位面积具有一个孔114。也要注意，孔114优选为贯穿每个封装单位面积的占据面的纵向方向的细长的长方形形状。优选地，孔114实质上位于其单位面积的中心处。如图1所示，每个孔114的一个实质特征就是其纵向长度必须穿过每个元件占据面的宽度且延伸到每个元件占据面的宽度之外。如下文描述的段落所示，由于它从整个制造基板102上被切掉，因此这是为了保证每个封装单元的两个电极能够自动地彼此电分离。
图3A、图4A、图5和图6示意性示出使用图1的基板在所发明的元件封装的制造的不同连续阶段中的横截面。图3B和图4B分别示出在图3A和图4A中示出的基板上的元件封装构造的俯视图。在图3A和图3B示出的制造阶段中，基板102首先使其每个设备封装单位面积获取一对焊盘122和124。要注意，图3A中的横截面图沿图3B的俯视图中示出的线3A-3A截取，类似的，图4A中的视图沿图4B中的线4A-4A截取。
焊盘122和124例如可使用简单的且低成本的丝网印刷技术而形成在铜基板102的表面上，其中该丝网印刷技术一般用于例如含银锡膏丝网印刷的PCB制造中。
在图3A和图3B的描述实例中，焊盘122和124可具有不同的尺寸。优选地，焊盘122应具有大到足以给其上的设备芯片的尺寸提供适当地物理及电气保障，该设备芯片可为二极管或其它任意元件。反之，如图4A和4B所清楚示出的，由于另一焊盘124仅用于承受一条接合线的末端的接合，因此其尺寸可以小得多。
然而，可以理解，在安装接合布线141之前，应将一个电路芯片131置于整个基板102上的每个焊盘122上。使用在电路板的制造中日常可见的传统的自动拾取放置技术(robotic pick and place technique)可以完成上述操作。
然后，如图5的剖面图所示，将其尺寸与铜基板102兼容的板状的支撑和孔堵塞固定装置302置于基板下方，如附图所示。连同使用未示出的顶部模具，这样会允许注入密封环氧树脂152，从而可以密闭地密封已经安装在其相应焊盘122和124上的所有芯片131和接合布线141。
要注意，在该阶段(图5)，数百个或更多电路芯片的整个矩阵被模制成一个单片，具有由附图标记160表示的虚线框所标出的一个设备单元。
然后，在图6中，使用如机械切割或激光燃烧切割手段，能够使每个密封电路元件单元160与大规模的矩阵分离。能够沿预设的切割路径(例如跨过如图6所示的设备单元160的纵轴的切割路径402和404及沿未示出的设备纵轴的切割路径)而实现分离切割。
图7示意性示出根据如图1-图6所描述的本发明优选实施例的元件封装的透视图。所示的设备仰视图展示的是呈整块铜形式(保证设备160的良好电气特性以及热特性)的电极106和108。
图8示意性示出所发明的元件封装的另一实施例的横截面构造。除了最开始的铜基板压印程序略为不同之外，能够使用实质上与上述方法相同的方法来制造元件260。实质上，铜基板的压印在用于支持设备芯片231的表面中的两个电极206和208之间形成的较窄间隔。这样就允许形成较大焊垫222，该较大焊垫222能够容纳如较大额定功率所需的较大设备芯片231。
图9和图10示意性示出所发明的元件封装的另外两个实施例的横截面构造。这些封装960和1060使用无线接合来进行位于设备芯片931和1031的底部的电极与各个封装906、908以及1006、1008的电连接。可代替地，如本领域普通技术人员所理解的，将设备芯片直接置于基板上方，其电极焊接到每个基板电极。封装960和1060之间的区别为在1060中得到较小的电极分离以容纳较小的设备芯片。
图11为另一基板的平面图，示意性示出用作构造本发明所发明的分立电路元件的基础的图案化铜基板1102的一部分。与图2的情况类似，孔图案化基板1102用作所发明的电路元件封装的基础。每个孔114均为生产阶段特征(production phase feature)，即电极分离孔。代替图2中的简单的水平长方形孔114，孔1114具有轮廓类似字母“H”的外形。
实质上，在每个H形孔1114的每个基本矩形孔的四角处形成四个狭窄的竖直槽。此外，在每个H形孔1114的中心顶部和底部处形成两个水平槽或凹陷1116。图12示意性示出沿图11的12A-12A线的图11的基板的横截面。
与图1和图2的基板102的情况相比，由于预切割了在基板1102上所制造的各分立元件的两个铜块电极的每一个的至少三侧，从而使它们更容易彼此分离。采用连通槽(through slot)或厚度减小的凹陷，从而容易切开第四侧(位于每个元件的纵向末端)。当每个所制造的元件经历脱离程序时，尤其当使用机械切割程序时，这允许减小其引起的机械应力。
此外，孔1114和槽/凹陷1116能够在机械压印程序中形成，尽管也能够应用本领域公知的铜蚀刻程序。要注意，图12中示出的这些槽/凹陷1116是非贯穿性的凹槽。
属于本发明所发明的封装设计的良好的电气特性和热特性直接转换成小至0201的分立二极管元件的大设备电流、高设备电压，以及良好的设备散热。所有这些期望的性能特性都是呈整个铜块形式的设备电极的结果。
此外，所发明的分立电路元件封装的制造包括简单的、久经考验的以及成熟的制造技术步骤的最少步骤的集合。不包括增加总生产成本的瓶颈工艺(如导电板状通孔制作和/或将它们堵塞)。
关于本发明的分立电路元件封装设计的一个重要方案是对构成设备基础的简单铜基板的使用。在初始阶段的整个过程中，基板用作在整个制造工艺过程中运送封装的设备芯片的刚性载体。在制造的最后阶段，为每个设备切割铜基板的整个板，并且将铜基板的整个板变为每个设备的刚性且坚固的电极。
因此，在主基板中执行的电极分离孔为用于产品构成的制造程序的简单特性的关键。从字面上讲，由于孔的存在，从而当每个所制造的设备从主生产矩阵上脱离时，对于处于生产最终阶段的每个设备，铜电极的两个凝结块自动成形。
更重要地，不需要会造成环境损害的金属蚀刻工艺。已经制作了二极管设备的实验性雏形，其显示了远超传统设计的等同设备的良好电气规范和热规范。这种优良的电气性能和热性能的理由很简单，因为整个铜块用作设备电极且设备芯片直接坐落在一个块上。
尽管上述内容是本发明特定实施例的全面描述，但是也可使用各种变型、替代构造以及等同物。因此，上述描述和说明不应作为对本发明范围的限制。

Claims (9)

1.一种用于制造具有铜块电极的分立电路元件的方法，包括如下步骤：
在主铜基板中形成电极分离孔；
在所述铜基板上放置电路芯片，所述芯片具有一个电极，该电极在所述电极分离孔的第一对相对端的每一个的外部附近电连接到所述铜基板；
利用密闭密封材料来密封所述芯片；
沿所述元件的外围边缘切割所述密封材料以脱开所述元件，其中所述切割切入所述铜基板中的所述电极分离孔的第二对相对端的每一个的内部，所述第二对相对端与所述第一对相对端基本上正交。
2.根据权利要求1所述的方法，其中所述铜基板中的所述电极分离孔具有沿与所述第二对相对端的边缘平行的方向延伸的延伸槽，如此延伸的所述延伸槽向外远离所述第一对相对端与所述第二对相对端交汇的每个节点处的所述孔，从而所述电极分离孔具有字母H的形状。
3.根据权利要求1所述的方法，还包括如下步骤：
在与所述电极分离孔的所述第一对相对端的所述边缘平行的所述元件的外围边缘形成至少一个槽。
4.根据权利要求3所述的方法，其中所述槽为贯穿槽。
5.根据权利要求3所述的方法，其中所述槽为铜基板厚度减小的槽。
6.根据权利要求1所述的方法，其中所述电路芯片为二极管的芯片。
7.根据权利要求1所述的方法，其中所述电路芯片的至少一个电极利用布线接合连接到所述铜基板。
8.根据权利要求1所述的方法，其中所述电路芯片的所有电极都直接焊接到所述铜基板上。
9.一种利用权利要求1所述的方法制造的分立电路元件。
CN2010105887051A 2010-10-29 2010-12-10 具有铜块电极的分立电路元件及其制造方法 Pending CN102468196A (zh)

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