CN102386164A - 半导体装置及半导体装置的制造方法 - Google Patents

半导体装置及半导体装置的制造方法 Download PDF

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CN102386164A
CN102386164A CN2011102547048A CN201110254704A CN102386164A CN 102386164 A CN102386164 A CN 102386164A CN 2011102547048 A CN2011102547048 A CN 2011102547048A CN 201110254704 A CN201110254704 A CN 201110254704A CN 102386164 A CN102386164 A CN 102386164A
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semiconductor device
substrate
diaphragm
metal film
electrode
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右田达夫
江泽弘和
山下创一
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Toshiba Corp
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Toshiba Corp
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Abstract

公开一种半导体装置及半导体装置的制造方法。根据实施例，设置焊盘电极、保护膜、基底阻挡金属膜和电极布线部。焊盘电极在半导体基板形成。保护膜以使所述焊盘电极的表面露出的方式在所述半导体基板上形成。基底阻挡金属膜在所述焊盘电极及所述保护膜上形成。电极布线部隔着所述基底阻挡金属膜在所述焊盘电极上形成。另外，所述基底阻挡金属膜的表面反射率在波长800nm中为30％以上，所述电极布线部的直径为140μm以下。

Description

半导体装置及半导体装置的制造方法
关联申请的参照
本申请享受2010年8月31日申请的日本专利申请编号2010-195092的优先权，该日本专利申请的全部内容在本申请中援用。
技术领域
一般地说，本实施例涉及半导体装置及半导体装置的制造方法。
背景技术
为了实现半导体装置的高集成化和高功能化，要求装置的操作速度的提高和存储器的大容量化。根据装置，还开发了通过Chip On Chip(CoC)连接将逻辑电路和大容量DRAM封装化的芯片来取代单芯片的eDRAM。
例如，用CoC连接逻辑电路和大容量DRAM的场合，为了实现广带域的传送速度，寻求在芯片内的特定的区域形成大量的凸点。为了形成大量的凸点，要求尽可能微细地形成凸点间距及凸点直径。
另外，在半导体基板上形成再布线、凸点等时，有通过光刻工序在感光性材料形成图形开口的情况。此时，根据基底的表面状态，有因为光的漫反射等而使感光性材料的感光状态改变，开口形状变形，开口直径偏差的情况。
若开口形状变形，开口直径偏差，则在该开口部分形成的凸点的高度偏差，成为CoC连接中的可靠性降低的主要原因，因此，要求适当管理感光性材料的基底的表面状态。
发明内容
根据实施例，设置焊盘电极、保护膜、基底阻挡金属膜和电极布线部。焊盘电极在半导体基板形成。保护膜以使所述焊盘电极的表面露出的方式在所述半导体基板上形成。基底阻挡金属膜在所述焊盘电极及所述保护膜上形成。电极布线部隔着所述基底阻挡金属膜在所述焊盘电极上形成。另外，所述基底阻挡金属膜的表面反射率在波长800nm中为30％以上，所述电极布线部的直径为140μm以下。
附图说明
图1(a)-(c)是一实施例的半导体装置的制造方法的截面图。
图2(a)-(c)是一实施例的半导体装置的制造方法的截面图。
图3(a)-(c)是一实施例的半导体装置的制造方法的截面图。
图4(a)-(c)是一实施例的半导体装置的制造方法的截面图。
图5是相对于波长800nm的Ti/Cu膜的反射率及其表面状态的关系的示图。
图6是光刻胶膜的基底的反射率和光刻胶开口直径的关系的截面图及表面图。
具体实施方式
以下，参照附图说明实施例的半导体装置及半导体装置的制造方法。另外，这些实施例不限定本发明。
图1(a)～(c)、图2(a)～(c)、图3(a)～(c)及图4(a)～(c)是涉及一实施例的半导体装置的制造方法的截面图。
图1(a)中，在基体材料层1上形成焊盘电极2，并以覆盖焊盘电极2的方式形成保护膜3。另外，作为基体材料层1，例如，可以采用形成了逻辑电路或DRAM等的集成电路的半导体基板。另外，焊盘电极2的材料例如可以采用以Al或以Al为主要成分的金属。另外，保护膜3的材料例如可以采用硅氧化膜或硅酸氮化膜或硅氮化膜等的无机绝缘体。
然后，通过采用光刻技术，在保护膜3上形成在焊盘电极2上具有开口部4a的光刻胶图形4。
接着，如图1(b)所示，以光刻胶图形4为掩模，通过在保护膜3进行RIE等的各向异性蚀刻，在保护膜3形成开口部3a。这里，在保护膜3形成开口部3a时，焊盘电极2的表面被蚀刻，焊盘电极2的蚀刻残渣2a飞散，从而，在光刻胶图形4的表面附着了蚀刻残渣2a。
接着，如图1(c)所示，通过灰化等的方法，除去保护膜3上的光刻胶图形4。这里，除去光刻胶图形4时，蚀刻残渣2a残留在保护膜3上，在保护膜3的表面附着了蚀刻残渣2a。
接着，如图2(a)所示，通过蚀刻保护膜3的表面，使蚀刻残渣2a离开，从保护膜3的表面除去蚀刻残渣2a。另外，作为保护膜3的表面的蚀刻方法，例如，在保护膜3的表面由氧化膜或氮化膜构成的场合，可以采用以稀氢氟酸为药液的湿蚀刻。
接着，如图2(b)所示，采用溅射、电镀、CVD、ALD或蒸镀等的方法，在焊盘电极2及保护膜3上形成基底阻挡金属膜5。另外，作为基底阻挡金属膜5，例如，可以采用Ti和其上的Cu的层叠构造。另外，也可以取代Ti，采用TiN、TiW、W、Ta、Cr、Co等的材料。也可以取代Cu，采用Al、Pd、Au、Ag等的材料。
这里，通过除去保护膜3的表面的蚀刻残渣2a后在保护膜3上形成基底阻挡金属膜5，与不除去保护膜3的表面的蚀刻残渣2a的场合比，可以缓和基底阻挡金属膜5的表面粗糙度，增加基底阻挡金属膜5的表面反射率。
接着，如图2(c)所示，通过采用旋涂等的方法，在基底阻挡金属膜5上形成光刻胶膜6。另外，光刻胶膜6的材料可以采用负型感光性光刻胶。
接着，如图3(a)所示，通过以形成了遮光膜12的原版11为掩模进行光刻胶膜6的曝光，在光刻胶膜6形成在图3(b)的开口部6a的周围配置的潜像6′。
这里，光刻胶膜6的材料为负型感光性光刻胶的场合，在开口部6a中，曝光光RI被遮蔽，曝光光RI入射开口部6a的周围的光刻胶膜6。然后，曝光光RI透过光刻胶膜6，达到基底阻挡金属膜5的表面后，根据基底阻挡金属膜5的表面粗糙度，曝光光RI漫反射，漫反射光RF入射作为开口部6a除去的光刻胶膜6的部分。
接着，如图3(b)所示，通过进行光刻胶膜6的显影，在光刻胶膜6形成在焊盘电极2上配置的开口部6a。另外，开口部6a的开口直径为140μm以下的场合，光刻胶膜6的基底的表面反射率在波长800nm中最好为80％以上。
另外，开口部6a的开口直径为40μm以下的场合，光刻胶膜6的基底的表面反射率在波长800nm中最好在90％以上。另外，开口部6a的开口直径为20μm以下的场合，光刻胶膜6的基底的表面反射率在波长800nm中最好在98％以上。
这里，图3(a)的工序中，漫反射光RF入射作为开口部6a除去的光刻胶膜6的部分后，在该部分也形成潜像6′，由于开口部6a的直径变小，因此开口部6a的直径发生偏差。
此时，在保护膜3上形成基底阻挡金属膜5前，通过除去保护膜3的表面的蚀刻残渣2a，可使光刻胶膜6的基底的表面反射率增大。因而，可降低透过光刻胶膜6的曝光光RI在光刻胶膜6的基底漫反射，减少漫反射光RF入射作为开口部6a除去的光刻胶膜6的部分的情况。其结果，可抑制开口部6a的直径变小，减少开口部6a的直径的偏差。
这里，开口部6a的开口直径为140μm以下的场合，光刻胶膜6的基底的表面反射率在波长800nm中设为80％以上，这是因为，表面反射率若比80％小，则在保护膜3的表面残留的蚀刻残渣2a的量变多，对开口部6a的直径的偏差的影响大。
另外，开口部6a的开口直径若变小，则将表面反射率设为大，这是因为，开口部6a的直径的偏差对埋入开口部6a的突出电极的高度的偏差造成的影响大。
接着，如图3(c)所示，通过电解电镀，在开口部6a依次埋入阻挡层7及焊接层8、9，隔着基底阻挡金属膜5在焊盘电极2上形成突出电极。另外，例如，阻挡层7的材料可以采用Ni，焊接层8的材料可以采用Cu，焊接层9的材料可以采用Sn。
接着，如图4(a)所示，通过灰化等的方法，除去基底阻挡金属膜5上的光刻胶膜6。
接着，如图4(b)所示，以阻挡层7及焊接层8、9组成的突出电极为掩模，蚀刻基底阻挡金属膜5，从而除去阻挡层7及焊接层8、9组成的突出电极的周围的基底阻挡金属膜5。
接着，如图4(c)所示，通过回流焊接层8、9，使焊接层8、9合金化，在阻挡层7上形成合金焊接层10。
以上的工序可以在基体材料层1为晶片的状态进行。在以上的工序后，通过将该晶片单片化，可切出半导体芯片。
这里，通过减少开口部6a的直径的偏差，即使在开口部6a依次埋入的阻挡层7及焊接层8、9的量不接近开口部6a的直径而保持一定的场合，也可以减少阻挡层7及焊接层8、9组成的突出电极的高度的偏差，提高CoC连接中的可靠性。
此时，阻挡层7及焊接层8、9组成的突出电极的直径为140μm以下的场合，基底阻挡金属膜5的表面反射率在波长800nm中最好为80％以上。另外，阻挡层7及焊接层8、9组成的突出电极的直径在40μm以下的场合，基底阻挡金属膜5的表面反射率在波长800nm中最好为90％以上。另外，阻挡层7及焊接层8、9组成的突出电极的直径在20μm以下的场合，基底阻挡金属膜5的表面反射率在波长800nm中最好在98％以上。
另外，所述实施例中，作为突出电极，说明了采用焊球的方法，但是也可以采用镍凸点、金凸点或铜凸点等。另外，所述实施例中，作为基底阻挡金属膜5，说明了采用Ti和Cu的层叠构造的方法，但是，也可以采用单体Ti或Cu，也可以采用单体的Cr、Pt、W等，也可以采用这些金属的层叠构造。Ti也可以采用其他的TiN、TiW、W、Ta、Cr、Co等的材料或者其层叠构造。
另外，作为CoC连接中的突出电极的接合方法，可以采用焊接接合、合金接合等的金属接合，也可以采用ACF(Anisotropic conductive Film：异向导电膜)接合、NCF(Nonconductive Film：非导电膜)接合、ACP(Anisotropic Conductive Paste：异向导电膏)接合、NCP(NonconductivePaste：非导电膏)接合等。
图5是相对于波长800nm的Ti/Cu膜的反射率和其表面状态的关系的示图。
图5中，作为无蚀刻残渣2a时的光刻胶膜6的基底的样品W1，采用在一对Si基板上溅射Ti/Cu膜(膜厚200/300μm)而形成的样品。该样品W1的表面反射率在波长800nm中为98.3％。
接着，作为有蚀刻残渣2a时的光刻胶膜6的基底的样品W3，采用在图1(b)及图1(c)的工序获得的样品上溅射Ti/Cu膜(膜厚200/300μm)而形成的样品。另外，该样品W3中，保护膜3采用硅氮化膜。另外，该样品W3中，可确认蚀刻残渣2a附着在保护膜3上，Ti/Cu膜的表面则没有。该样品W3的表面反射率在波长800nm中为30.9％。
另外，样品W1、W3的表面反射率的测定采用反射率分光膜厚计FE-3000(大冢电子制)。
这样，Ti/Cu膜下的蚀刻残渣2a的有无与Ti/Cu膜的表面反射率之间存在相关，随着Ti/Cu膜下的蚀刻残渣2a增大，Ti/Cu膜的表面反射率降低。因而，通过计测Ti/Cu膜的表面反射率，可评价Ti/Cu膜下的蚀刻残渣2a的量，估计Ti/Cu膜上形成的光刻胶开口部的直径的偏差。
图6是光刻胶膜的基底的反射率和光刻胶开口直径的关系的截面图及表面图。
图6中，作为光刻胶膜的基底，准备波长800nm的表面反射率为98％、78％、27％的样品。另外，为了改变光刻胶的基底的表面反射率，改变光刻胶膜的基底的表面粗糙度。
然后，在这些基底上通过旋涂来涂覆光刻胶膜，在同一的曝光条件及同一的显影条件下，在这些光刻胶膜形成开口部。然后，通过电子扫描显微镜观察在这些光刻胶膜形成的开口部的顶面形状及截面形状。
其结果，表面反射率为98％的样品中，开口直径为21.0μm，表面反射率为78％的样品中，开口直径为19.8μm，表面反射率为27％的样品中，开口直径为17.6μm，可确认随着表面反射率降低，开口直径变小。
另外，所述实施例中，说明了按光刻胶膜6的基底的表面反射率规定为了减少开口部6a的直径的偏差的光刻胶膜6的基底的表面状态的方法，但是，也可以采用将光刻胶膜6的基底的表面反射率换算为表面粗糙度的值。
另外，所述实施例中，说明了电极布线部采用突出电极的情况的例子，但是，作为电极布线部，也可以采用柱状物、再布线或焊盘等。
虽然说明本发明的几个实施例，但是这些实施例只是作为例示，而不是限定发明的范围。这些新实施例可以各种各样的形态实施，在不脱离发明的要旨的范围，可进行各种省略、置换、变更。这些实施例及其变形也是发明的范围、要旨所包含的，同时也是权利要求的范围所述的发明及其均等的范围所包含的。

Claims (20)

1.一种半导体装置，其特征在于，具备：
在半导体基板形成的焊盘电极；
以使所述焊盘电极的表面露出的方式在所述半导体基板上形成的保护膜；
在所述焊盘电极及所述保护膜上形成的基底阻挡金属膜；
隔着所述基底阻挡金属膜在所述焊盘电极上形成的电极布线部，
所述基底阻挡金属膜的表面反射率在波长800nm中为30％以上，所述电极布线部的直径为140μm以下。
2.权利要求1所述的半导体装置，其特征在于，
所述基底阻挡金属膜的表面反射率在波长800nm中为80％以上，所述电极布线部的直径为40μm以下。
3.权利要求1所述的半导体装置，其特征在于，
所述基底阻挡金属膜的表面反射率在波长800nm中为98％以上，所述电极布线部的直径为20μm以下。
4.权利要求1所述的半导体装置，其特征在于，
所述电极布线部为突出电极。
5.权利要求4所述的半导体装置，其特征在于，
所述突出电极为焊球。
6.权利要求1所述的半导体装置，其特征在于，
所述电极布线部为柱状物、再布线或焊盘。
7.权利要求1所述的半导体装置，其特征在于，
所述基底阻挡金属膜的下层为选择Ti、TiN、TiW、W、Ta、Cr、CoTi中的一个、所述基底阻挡金属膜的上层为选择Cu、Al、Pd、Au、Ag中的一个的层叠构造。
8.权利要求1所述的半导体装置，其特征在于，
在所述半导体基板形成了集成电路。
9.权利要求1所述的半导体装置，其特征在于，
所述保护膜为无机绝缘体。
10.权利要求1所述的半导体装置，其特征在于，
从所述保护膜的表面除去了所述保护膜的蚀刻残渣。
11.一种半导体装置的制造方法，其特征在于，包括：
在半导体基板上形成焊盘电极的工序；
以覆盖所述焊盘电极的方式在所述半导体基板上形成保护膜的工序；
在所述保护膜上形成在所述焊盘电极上具有第1开口部的第1光刻胶图形的工序；
通过以所述第1光刻胶图形为掩模来蚀刻所述保护膜，在所述保护膜形成使所述焊盘电极露出的第2开口部的工序；
除去形成了所述第2开口部的所述保护膜上的所述第1光刻胶图形的工序；
通过蚀刻所述保护膜的表面，从所述保护膜的表面除去所述焊盘电极的蚀刻残渣的工序；
在所述焊盘电极上及从表面除去了所述焊盘电极的蚀刻残渣的保护膜上形成基底阻挡金属膜的工序；
在所述基底阻挡金属膜上形成在所述焊盘电极上具有第3开口部的第2光刻胶图形的工序；
在所述基底阻挡金属膜上形成埋入所述第3开口部的电极布线部的工序；
除去形成了所述电极布线部的所述基底阻挡金属膜上的所述第2光刻胶图形的工序；
通过以所述电极布线部为掩模来蚀刻所述基底阻挡金属膜，除去所述电极布线部的周围的所述基底阻挡金属膜的工序。
12.权利要求11所述的半导体装置的制造方法，其特征在于，
所述第2光刻胶图形的基底的表面反射率在波长800nm中为30％以上，所述第3开口部的开口直径在140μm以下。
13.权利要求11所述的半导体装置的制造方法，其特征在于，
所述第2光刻胶图形的基底的表面反射率在波长800nm中为80％以上，所述第3开口部的开口直径在40μm以下。
14.权利要求11所述的半导体装置的制造方法，其特征在于，
所述第2光刻胶图形的基底的表面反射率在波长800nm中为98％以上，所述第3开口部的开口直径在20μm以下。
15.权利要求11所述的半导体装置的制造方法，其特征在于，
所述电极布线部是突出电极。
16.权利要求15所述的半导体装置的制造方法，其特征在于，
所述突出电极是焊球。
17.权利要求11所述的半导体装置的制造方法，其特征在于，
所述电极布线部是柱状物、再布线或焊盘。
18.权利要求11所述的半导体装置的制造方法，其特征在于，
所述基底阻挡金属膜的下层为选择Ti、TiN、TiW、W、Ta、Cr、CoTi中的一个、所述基底阻挡金属膜的上层为选择Cu、Al、Pd、Au、Ag中的一个的层叠构造。
19.权利要求11所述的半导体装置的制造方法，其特征在于，
在所述半导体基板形成了集成电路。
20.权利要求11所述的半导体装置的制造方法，其特征在于，
所述保护膜是无机绝缘体，通过以稀氢氟酸为药液的湿蚀刻，从所述保护膜的表面除去所述焊盘电极的蚀刻残渣。
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