CN102347301B - 芯片封装件积层的系统和方法 - Google Patents

芯片封装件积层的系统和方法 Download PDF

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CN102347301B
CN102347301B CN201110264934.2A CN201110264934A CN102347301B CN 102347301 B CN102347301 B CN 102347301B CN 201110264934 A CN201110264934 A CN 201110264934A CN 102347301 B CN102347301 B CN 102347301B
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naked core
redistributing layer
adhesive phase
chip package
substrate
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CN102347301A (zh
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P·A·麦康内利
K·M·迪罗歇
S·史密斯
L·A·普林西普
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General Electric Co
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General Electric Co
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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Die Bonding (AREA)
  • Solid State Image Pick-Up Elements (AREA)
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Abstract

本发明涉及芯片封装件积层的系统和方法。公开了一种制造芯片封装件的系统和方法。该芯片封装件包括：具有在其中形成的开口的基底再分布层(16)；粘合剂层(24)，其具有在其中形成的没有粘合剂材料的窗口(26)；以及裸芯(12)，其通过该粘合剂层(24)粘附到该基底再分布层(16)，该裸芯(12)与该窗口(26)对准使得只有该裸芯(12)的周边与该粘合剂层(24)接触。遮蔽元件(20)安置在该基底再分布层(16)和该粘合剂层(24)之间，其一般与形成在该基底再分布层(16)中的开口和该粘合剂层(24)的该窗口(26)对准，使得只有该遮蔽元件(20)的周边贴附到该粘合剂层(24)。该遮蔽元件(20)通过气隙(36)与该裸芯(12)隔离，并且配置成选择性地能从该粘合剂层(24)移除，以便暴露裸芯(12)的正面(52)。

Description

芯片封装件积层的系统和方法
技术领域
大体上，本发明的实施例涉及集成电路芯片封装件，更具体地涉及芯片封装件积层(build-up)。使用在该芯片封装件的积层工艺期间保护裸芯(die)免受污染的技术制造芯片封装件。
背景技术
集成电路(IC)芯片封装件典型地制造成包括贴附到层压再分布层的一个或多个裸芯。该层压再分布层由介电层压材料构成，例如卡普顿等，并且通过粘合剂层粘附到裸芯。裸芯通过金属互连电连接到输入/输出系统，该金属互连被路由通过粘贴到基底再分布层的多个另外层压再分布层。
标准芯片封装件制造或积层工艺典型地从提供基底层压再分布层和在其一个表面上施加粘合剂开始。通过将裸芯的正面或有源面施加到该粘合剂层上，使得在裸芯的有源面和跨裸芯的整个面的粘合剂层之间形成接合，一个或多个裸芯然后相对于基底层压再分布层固定。然后形成金属互连，并且金属互连被路由通过基底层压再分布层，以及通过在芯片封装件积层期间随后增加的任何另外层压再分布层。
然而，采用该方式将裸芯沉积到基底层压再分布层具有关于生产工艺和所生产的所得芯片封装件的结构和功能的固有限制。即，在一些应用中，保护裸芯的有源面在芯片封装件的积层工艺期间免受可能的污染是可取的。例如，对于在例如超级拍摄装置(ultracamera)或相似感测装置等成像装置中的芯片封装件的应用，期望保护成像器区(即裸芯)在积层工艺期间免受污染。因为在这样的应用中当芯片封装件的积层完成时，成像器区/裸芯将处于暴露状态，它对于要在积层工艺期间在裸芯的有源面和跨裸芯的整个面的粘合剂层之间形成的接合是不可取的。这样的积层将要求随后将粘合剂从成像区移除，并且可能向成像区引入污染，由此不利地影响超级拍摄装置/感测装置的性能。
因此，需要有用于芯片封装件制造的方法，其保护裸芯在积层工艺期间免受污染。进一步需要有容易纳入组装工艺的与激光钻孔兼容的可升级的且提供低成本组装的制造方法。
发明内容
本发明的实施例通过提供芯片制造的方法克服了前面提到的缺点，在该方法中芯片封装件使用可移除的遮蔽元件制造，该遮蔽元件放置在裸芯上方并且通过气穴与其隔离。该遮蔽元件保护裸芯在积层工艺期间免受污染，并且可以随后从该处移除以暴露裸芯的清洁的正面。
根据本发明的一个方面，芯片封装件包括其中形成有开口的基底再分布层(该开口在该基底再分布层的中心区域形成)，施加于该基底再分布层的一侧的粘合剂层(该粘合剂层具有在其中形成的没有粘合剂材料的窗口)，以及具有通过该粘合剂层粘附到该基底再分布层的正面的裸芯，其中该裸芯与在该粘合剂层中形成的该窗口对准，使得仅该裸芯的正面的周边与该粘合剂层接触。该芯片封装件还包括：在基底再分布层中形成的多个通孔以及多个金属互连，以将基底再分布层电连接到裸芯；以及遮蔽元件，其安置在基底再分布层和粘合剂层之间，并且一般与在基底再分布层中形成的开口和粘合剂层的窗口对准，使得仅该遮蔽元件的周边贴附到粘合剂层，其中该遮蔽元件通过气隙与裸芯隔离。该遮蔽元件配置成可选择性地从粘合剂层移除，以便暴露裸芯的正面。
根据本发明的另一个方面，形成芯片封装件的方法包括提供初始聚合物层压层，将金属遮蔽元件沉积在该初始聚合物层压层的一个表面上以便覆盖其的一部分，以及将粘合剂层施加到该初始聚合物层压层并且在该金属遮蔽元件的上方，该粘合剂层的其中一部分从该粘合剂层移除以在该粘合剂层中形成窗口，该窗口大致上对应于该金属遮蔽元件的表面区域并且与其对准。该方法还包括通过该粘合剂层将裸芯粘贴到该初始聚合物层压层，其中该裸芯安置在窗口上方，使得该裸芯的周边与该粘合剂层接触，并且在该裸芯的中心部分和该遮蔽元件之间形成气穴。该方法进一步包括图案化该初始聚合物层压层以包括多个通孔和多个金属互连，以便将该初始聚合物层压层电连接到该裸芯，限定对应于该粘合剂层中的窗口的该初始聚合物层压层的一部分，并且从该粘合剂层移除该初始聚合物层压层的该部分以及该金属遮蔽元件，以便暴露该裸芯的正面。
根据本发明的再另一个方面，用于制造芯片模块的方法包括提供基底再分布层，将遮蔽元件沉积在该基底再分布层的一个表面上以便覆盖其的一部分，将粘合剂层施加到该基底再分布层和在该遮蔽元件的上方，烧蚀处在邻近该遮蔽元件的区域中的粘合剂层的一部分以便暴露出至少大部分该遮蔽元件，并且将裸芯的正面施加到粘合剂层使得该裸芯与该遮蔽元件对准，其中该裸芯的周边与该粘合剂层接触，并且该裸芯的中心部分与该遮蔽元件通过在其间形成的气隙隔离。该方法还包括在形成多个通孔和多个金属互连来将该基底再分布层电连接到该裸芯的该基底再分布层的随后图案化期间，保持遮蔽元件在适当的位置；烧蚀邻近该遮蔽元件的该基底再分布层的一部分；以及移除该遮蔽元件和该基底再分布层的该部分以便暴露该裸芯的正面。
从下列连同附图提供的本发明的优选实施例的详细说明，将更容易地理解这些以及其他优势和特征。
附图说明
附图图示目前设想用于实施本发明的实施例。
在附图中：
图1是根据本发明的实施例的多个嵌入式芯片封装件的顶视图。
图2-11是根据本发明的实施例在制造/积层工艺的各种阶段期间嵌入式芯片封装件的截面侧视图和顶视图。
具体实施方式
本发明的实施例提供形成芯片封装件的方法。该芯片封装件在该芯片封装件的积层和层压再分布层的图案化期间使用遮蔽元件或保护层来保护裸芯表面而制造。
参照图1，示出多个制造的芯片封装件10或芯片模块。每个芯片封装件10包括与多个再分布层14(即层压层)连接的裸芯12。每个裸芯12由单晶硅锭或多晶硅锭形成，并且制备成使得在它的表面上形成集成电路(IC)布图。根据本发明的一个实施例，裸芯12配置成在成像装置中使用，例如超级拍摄装置、蜂窝电话拍摄装置或相似感测装置。从而，裸芯12构造为“拍摄装置裸芯”，其形成用于图像感测的成像区。关于芯片封装件10的再分布层14，多个再分布层14中的每个都采用可以相对于该裸芯12放置的预先形成的层压薄片或膜的形式。该再分布层14可以由卡普顿聚四氟乙烯(PTFE)或例如液晶聚合物(LCP)或聚酰亚胺材料等另一个聚合物膜形成。如在图1中示出的，每个芯片封装件10都通过在邻近芯片封装件10之间的区域中切穿再分布层14来形成。
如在图2-9中示出的，根据本发明的实施例阐述用于制造多个芯片封装件10(即芯片积层)的技术中的步骤，其中示出在积层工艺的各种阶段的芯片封装件10的侧向截面图和顶视图。参照图2，提供初始或基底再分布层16的完整框架，并且安装在框架18上以允许在其上进行另外的制造步骤。如上文阐述的，该初始再分布层16采用挠性聚合物层压层的形式，例如卡普顿聚四氟乙烯(PTFE)或另一个聚合物/聚酰亚胺膜，并且具有允许从其生产多个芯片封装件10的大小。
在图3-9中示出初始再分布层16的整个框架以及添加到其的另外的层和部件的一部分，使得图示单个芯片封装件10的积层。如在图3中示出的，提供初始再分布层16。根据积层工艺，如在图4A和4B中示出的，金属层18然后沉积在初始再分布层16的一侧，其中该金属层18由将提供与将随后施加的粘合剂适当接合的材料(例如，Ti/Cu/Ti、铬等等)形成。该金属层18可溅射在初始再分布层16上或采用任何其他适当的方式添加，例如电镀等。图案化该金属层18，使得形成保护性遮蔽元件20，其具有根据一个实施例大致上匹配随后添加到芯片封装件10的裸芯12(图1)的面积的面积，如将在下文详细说明的。备选地，认识到保护性遮蔽元件20可以形成为具有比裸芯12(图1)的面积小得多的面积。如进一步在图4A和4B中示出的，进一步图案化金属层18来形成通气孔基底21，其从遮蔽元件20延伸向外延伸经过要添加的裸芯12(图1)的区域。根据一个实施例，金属层18可进一步图案化以便在初始再分布层16上形成多个基底金属互连22。
现在参照图5，在芯片封装件10的积层技术的下一个步骤中，粘合剂层24施加到初始再分布层16和金属层18上。该粘合剂层24可通过可烧蚀的环氧树脂的旋涂施加而施加到初始再分布层16，或可备选地采用施加到初始再分布层16上的粘合剂膜的形式。然后该粘合剂层24部分地固化或烘烤。当部分地固化时，烧蚀粘合剂层24(例如通过紫外(UV)激光)以便形成如在图6A和6B中示出的窗口。特别地，激光烧蚀施加到遮蔽元件20上的粘合剂层24，以便形成暴露该遮蔽元件20的窗口26。另外，激光烧蚀施加到通气孔基底21上方的粘合剂层24，以便形成通向裸芯区域外部(即，从窗口26向外延伸)的小的通气孔28。认识到在激光烧蚀粘合剂层24以形成窗口26和通气孔28期间，遮蔽元件20和通气孔基底21充当“背面阻挡”，其阻止激光从其中通过而到达初始再分布层16。
在芯片封装件10的积层的制造技术的备选实施例中，认识到预先切割的层压膜可以施加到初始再分布层16。即，不是通过旋涂施加连续的粘合剂层24并且随后激光烧蚀粘合剂层24来形成窗口26(如在图5和6A/6B中示出的)，而是可以向初始再分布层16施加具有预先在其中形成的窗口的粘合剂膜，使得不需要激光烧蚀粘合剂层。
当完成激光烧蚀粘合剂层24时，围绕烧蚀区域(即窗口26)的粘合剂层24的一部分30暴露于UV光。该UV光曝光部分地固化该部分30，使得防止粘合剂层24侵占到烧蚀的窗口26中。
现在参照图7A和7B，芯片封装件10的积层继续进行，其中通过粘合剂层24将裸芯12(即，IC)对准并且放置到初始再分布层16上。该裸芯12位于窗口26上方的中心位置，并且压到粘合剂层24上，这时粘合剂层24完全固化以便将裸芯12固定到初始再分布层16，例如通过真空层压和压力烘烤固化工艺等。如在图7A和7B中示出的，裸芯12的大小适合它向外延伸经过遮蔽元件20。有益的是，绕裸芯12的外围形成裸芯焊盘32从而安置在由遮蔽元件20覆盖的裸芯12的区域的外部，其允许随后与裸芯焊盘32的电连接。另外，由于裸芯12向外延伸经过遮蔽元件20，从而该裸芯12搁在粘合剂层24上，并且在裸芯12和遮蔽元件20之间形成气穴36。该气隙36与遮蔽元件20一起起作用来保持裸芯12的顶面清洁不受污染。如在图5中在上文阐述的，通气孔口28被烧蚀而进入粘合剂层24中，其中该通气孔口28从气穴36向外延伸到在被裸芯12覆盖的外部的芯片封装件10的区域。由于该通气孔口28在气隙36和在被裸芯12覆盖的区域外部的周边环境之间提供了流体连通，气隙36中的气压从而可以受控制，例如否则可能在与芯片封装件10的积层工艺关联的温度循环期间在气穴36中增加的压力等。
现在参照图8，当将裸芯12固定到初始再分布层16时，图案化初始再分布层16，以形成多个通孔38，其钻穿形成再分布层16的聚合物材料。根据示范性实施例，通孔38通过激光烧蚀或激光钻孔工艺形成，并且在对应于基底金属互连22和裸芯焊盘32的位置形成，以便暴露基底金属互连22和裸芯焊盘32。备选地，还认识到通孔38可通过其他方法形成，包括：等离子蚀刻，光限定，或机械钻孔工艺。
如在图8中进一步示出的，图案化初始再分布层16包括将金属层/材料(例如籽金属和/或铜)施加到再分布层16，例如通过溅射或电镀工艺以及沉积的金属层/材料的随后的图案化/蚀刻来形成金属互连40。根据本发明的一个实施例，图案化并且蚀刻金属层/材料使得形成金属互连40，其从初始再分布层16的顶面延伸并且向下通过通孔38。金属互连40从而形成与基底金属互连22和裸芯焊盘32的电连接。
现在参照图9，在制造技术的下一步骤中，在与施加裸芯12相反的芯片封装件10的侧上，一个或多个另外的再分布层42层压到初始再分布层16上。该另外的再分布层42通过一系列层压和图案化步骤而施加到初始再分布层16。在初始再分布层16和另外的再分布层42之间施加粘合剂层44。在该另外的再分布层42中形成多个通孔38，并且形成/图案化金属互连40以向下延伸通过通孔38并且通过该另外的再分布层42，以便电连接每个另外的再分布层42。虽然仅示出一个另外的再分布层42施加到初始再分布层16以形成芯片封装件10，但认识到基于期望的配置，可以施加更多再分布层。如在图9中示出的，在积层工艺的另外的步骤中，焊接掩模46可以施加到最外面的另外再分布层42，并且随后图案化以便向其提供保护。还设想例如无源器件(未示出)等另外的部件也可以添加到芯片封装件10，其中进行无源贴附同时保护性遮蔽20在适当位置，使得裸芯12在这样的无源贴附期间受到保护。
在芯片制造技术的下一个步骤中，并且如在图10中示出的，初始再分布层16、另外再分布层42以及粘合剂层44沿路径48被激光烧蚀，该路径48对应于保护性遮蔽20的周边，以便限定或隔开初始再分布层16、另外再分布层42以及粘合剂层44的一部分50。进行激光烧蚀通过初始再分布层16、另外再分布层42以及粘合剂层44向下到达保护性遮蔽20，在此激光被保护性遮蔽20阻挡。当完成烧蚀后，被进行激光烧蚀的安置在保护性遮蔽20的上方的初始再分布层16、另外再分布层42以及粘合剂层44的部分50与保护性遮蔽20一起从芯片封装件10移除。即，保护性遮蔽20粘住初始再分布层16，并且容易从粘合剂层24剥离，使得它可以在单个移除步骤中与部分50一起从芯片封装件10移除。根据本发明的实施例，部分50和保护性遮蔽20可以通过例如真空吸取(vacuumpickup)或水洗(waterscrubbing)等若干技术中的一个移除。
如在图11中示出的，在完成的芯片封装件10中移除部分50和保护性遮蔽20来暴露裸芯12的正面52(即，裸芯前部)。有益地，并且基于保护性遮蔽20在裸芯前部52的上方的存在(通过气穴36与其分隔)，在积层工艺持续期间，裸芯前部52应该是清洁无污染的。
有益地，根据图2-9中图示的技术，芯片封装件10的构造提供芯片封装件积层，其保护裸芯12在积层工艺期间免受污染。另外，该积层技术提供具有减小厚度的芯片封装件10的制造，受限的仅是裸芯12和再分布层16、42的最小厚度要求。这样的减小厚度的芯片封装件10可配置用于在成像装置中使用，例如超级拍摄装置、蜂窝电话拍摄装置或相似的感测装置，其中积层工艺允许拍摄装置透镜(未示出)直接安装到芯片封装件10。然而，还认识到该减小厚度的芯片封装件10可以配置成在其他装置类型中使用，例如微波装置，或将从上文阐述的制造技术中获益的其他装置等。
尽管本发明仅连同有限数量的实施例详细描述，应当容易理解本发明不限于这样公开的实施例。相反，本发明可以修改以包含此前未描述的许多变化、改动、替代或等同设置，但其与本发明的精神和范围相当。另外，尽管描述了本发明的各种实施例，要理解本发明的方面可仅包括描述的实施例中的一些。因此，本发明不视为由前面的描述限制，而仅由附上的权利要求的范围限制。
因此，根据本发明的一个实施例，芯片封装件包括其中形成有开口的基底再分布层(该开口在该基底再分布层的中心区域形成)，施加于该基底再分布层的一侧的粘合剂层(该粘合剂层具有在其中形成的没有粘合剂材料的窗口)，以及具有通过该粘合剂层粘附到该基底再分布层的正面的裸芯，其中该裸芯与在该粘合剂层中形成的该窗口对准，使得仅该裸芯的正面的周边与该粘合剂层接触。该芯片封装件还包括在基底再分布层中形成的多个通孔以及多个金属互连，以将基底再分布层电连接到裸芯；以及遮蔽元件，其安置在基底再分布层和粘合剂层之间，并且一般与在基底再分布层中形成的开口和粘合剂层的窗口对准，使得仅该遮蔽元件的周边贴附到粘合剂层，其中该遮蔽元件通过气隙与裸芯隔离。该遮蔽元件配置成选择性地能从粘合剂层移除，以便暴露裸芯的正面。
根据本发明的另一个实施例，形成芯片封装件的方法包括提供初始聚合物层压层，将金属遮蔽元件沉积在该初始聚合物层压层的一个表面上以便覆盖其的一部分，以及将粘合剂层施加到该初始聚合物层压层并且在该金属遮蔽元件的上方，该粘合剂层具有从其移除的一部分以在该粘合剂层中形成窗口，该窗口大致上对应于该金属遮蔽元件的表面区域并且与其对准。该方法还包括通过该粘合剂层将裸芯粘贴到该初始聚合物层压层，其中该裸芯安置在窗口上方，使得该裸芯的周边与该粘合剂层接触，并且在该裸芯的中心部分和该遮蔽元件之间形成气穴。该方法进一步包括图案化该初始聚合物层压层以包括多个通孔和多个金属互连，以便将该初始聚合物层压层电连接到该裸芯，限定对应于该粘合剂层中的窗口的该初始聚合物层压层的一部分，并且从该粘合剂层移除该初始聚合物层压层的该部分以及该金属遮蔽元件，以便暴露该裸芯的正面。
根据本发明的再另一个实施例，用于制造芯片模块的方法包括提供基底再分布层，将遮蔽元件沉积在该基底再分布层的一个表面以便覆盖其的一部分，将粘合剂层施加到该基底再分布层和在该遮蔽元件的上方，烧蚀处在邻近该遮蔽元件的区域中的粘合剂层的一部分以便暴露出至少大部分该遮蔽元件，并且将裸芯的正面施加到粘合剂层使得该裸芯与该遮蔽元件对准，其中该裸芯的周边与该粘合剂层接触，并且该裸芯的中心部分与该遮蔽元件通过在其间形成的气隙隔离。该方法还包括在形成多个通孔和多个金属互连来将该基底再分布层电连接到该裸芯的该基底再分布层的随后图案化期间，保持遮蔽元件在适当的位置；烧蚀邻近该遮蔽元件的该基底再分布层的一部分；以及移除该遮蔽元件和该基底再分布层的该部分以便暴露该裸芯的正面。

Claims (10)

1.一种芯片封装件(10)，包括：
其中形成有开口的基底再分布层(16)，所述开口在所述基底再分布层(16)的中心区域形成；
施加于所述基底再分布层(16)的一侧的粘合剂层(24)，所述粘合剂层(24)具有在其中形成的没有粘合剂材料的窗口(26)；
具有通过所述粘合剂层(24)粘附到所述基底再分布层(16)的正面(52)的裸芯(12)，其中所述裸芯(12)与在所述粘合剂层(24)中形成的所述窗口(26)对准，使得仅所述裸芯(12)的正面(52)的周边与所述粘合剂层(24)接触；
在所述基底再分布层(16)中形成的多个通孔(38)以及多个金属互连(40)，以将所述基底再分布层(16)电连接到所述裸芯(12)；以及
遮蔽元件(20)，其安置在所述基底再分布层(16)和所述粘合剂层(24)之间，并且与在所述基底再分布层(16)中形成的所述开口和所述粘合剂层(24)的所述窗口(26)对准，使得仅所述遮蔽元件(20)的周边贴附到所述粘合剂层(24)，所述遮蔽元件(20)通过气隙(36)与所述裸芯(12)隔离；
其中所述遮蔽元件(20)配置成选择性地能从所述粘合剂层(24)移除，以便暴露所述裸芯(12)的正面(52)。
2.如权利要求1所述的芯片封装件(10)，进一步包括在所述粘合剂层(24)中形成的通气孔口(28)，所述通气孔口(28)从所述气隙(36)向外延伸经过所述裸芯(12)的所述周边。
3.如权利要求2所述的芯片封装件(10)，其中所述通气孔口(28)配置成使所述气隙(36)与周边环境流体连通。
4.如权利要求2所述的芯片封装件(10)，进一步包括安置在所述通气孔口(28)下方的金属通气孔基底(21)以便形成所述通气孔口(28)。
5.如权利要求1所述的芯片封装件(10)，进一步包括：
至少一个另外的再分布层(42)，其在与所述裸芯(12)相反的侧上粘贴到所述基底再分布层(16)；以及
多个通孔(38)和多个金属互连(40)，其在所述另外的再分布层(42)的每个中形成。
6.如权利要求5所述的芯片封装件(10)，进一步包括安置在最顶部的另外的再分布层(42)上的焊接掩模(46)。
7.如权利要求1所述的芯片封装件(10)，其中所述遮蔽元件(20)包括图案化的金属遮蔽。
8.如权利要求1所述的芯片封装件(10)，其中所述裸芯(12)包括配置成形成图像感测区域的拍摄装置裸芯。
9.如权利要求1所述的芯片封装件(10)，其中所述遮蔽元件(20)具有小于所述裸芯(12)的面积的面积。
10.如权利要求9所述的芯片封装件(10)，其中所述裸芯(12)进一步包括绕其的周边形成的多个裸芯焊盘(32)，所述多个裸芯焊盘(32)安置在由遮蔽元件(20)覆盖的裸芯(12)的区域外部。
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