CN102237344A - 具有电力覆盖互连的压装模块 - Google Patents
具有电力覆盖互连的压装模块 Download PDFInfo
- Publication number
- CN102237344A CN102237344A CN2011101195662A CN201110119566A CN102237344A CN 102237344 A CN102237344 A CN 102237344A CN 2011101195662 A CN2011101195662 A CN 2011101195662A CN 201110119566 A CN201110119566 A CN 201110119566A CN 102237344 A CN102237344 A CN 102237344A
- Authority
- CN
- China
- Prior art keywords
- conductive
- semiconductor
- semiconductor package
- pol
- package part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 93
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims description 8
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 229920002379 silicone rubber Polymers 0.000 claims description 3
- 239000004945 silicone rubber Substances 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 2
- 238000012545 processing Methods 0.000 claims description 2
- 239000013536 elastomeric material Substances 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 12
- 125000006850 spacer group Chemical group 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 55
- 238000004806 packaging method and process Methods 0.000 description 51
- 229910052802 copper Inorganic materials 0.000 description 40
- 239000010949 copper Substances 0.000 description 40
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 34
- 238000010586 diagram Methods 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 239000004642 Polyimide Substances 0.000 description 8
- 229910001338 liquidmetal Inorganic materials 0.000 description 8
- 229920001721 polyimide Polymers 0.000 description 8
- 150000001879 copper Chemical class 0.000 description 6
- 229920001971 elastomer Polymers 0.000 description 6
- 239000012212 insulator Substances 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 238000005538 encapsulation Methods 0.000 description 5
- 238000004804 winding Methods 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 239000006262 metallic foam Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000006698 induction Effects 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007850 degeneration Effects 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 description 1
- NJWNEWQMQCGRDO-UHFFFAOYSA-N indium zinc Chemical class [Zn].[In] NJWNEWQMQCGRDO-UHFFFAOYSA-N 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1027—IV
- H01L2924/10272—Silicon Carbide [SiC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/1033—Gallium nitride [GaN]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
- H01L2924/1302—GTO - Gate Turn-Off thyristor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
- H01L2924/13034—Silicon Controlled Rectifier [SCR]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P2101/00—Special adaptation of control arrangements for generators
- H02P2101/15—Special adaptation of control arrangements for generators for wind-driven turbines
Abstract
提供用于利用电力覆盖(POL)技术和半导体压装技术以生产具有更高可靠性和功率密度的半导体封装件(50、70、78、80、90、100、110、120)的系统和方法。POL结构(40)可在半导体封装件(50、70、78、80、90、100、110、120)内互连半导体器件(48),并且某些实施例可实现以减小在导电板(58、60)的挤压期间损伤该半导体器件(48)的可能性。在一个实施例中,弹簧(54)和/或衬垫(56)可用于减小或控制由发射极板(58)施加到封装件(50、70、78、80、90、100、110、120)中的半导体器件(48)上的力。在另一个实施例中,发射极板(58)可凹陷以对POL结构(40)施加力,而不是直接向半导体器件(48)施加力。此外,在一些实施例中,POL结构(40)的导电层(42)可生长以起发射极板(58)的作用,并且可使导电层(40)的区域成为多孔性的以提供顺应性。
Description
技术领域
本文公开的主旨涉及电子装置,并且更特别地涉及使用电力覆盖互连的压装半导体模块。
背景技术
在各种电力电子系统中,压装半导体封装件可用于控制到该电力电子系统的各种应用和装置的配电。压装半导体封装件一般可包括许多半导体芯片,其起用于相对高电压范围的电流开关的作用。在该封装件中使用的半导体具有某些限制,例如最大击穿电压和载流能力。由于每个个体半导体的阻断电压限制,若干半导体可串联连接以获得要求的电压并且在更高功率系统中起作用。例如,绝缘栅双极晶体管(IGBT)可具有相对低的击穿电压,并且为了高电流能力,若干IGBT可在半导体封装件内并联互连,并且若干IGBT封装件可以在堆叠中串联连接以满足高电压要求,并且因此在相对高功率应用中实现开关。此外,由于电力电子系统中高电流的需要,半导体芯片还可设置在半导体封装件内的子组中。例如,若干组串联连接的IGBT还可并联设置在封装件中。
在压装半导体堆叠中的半导体芯片可通过用两个导电板接触半导体芯片的侧边(例如,顶侧和底侧)来互连。为了确保与封装件中的所有半导体芯片连接,该两个导电板可对封装件中的所有半导体的接触点施加一定量的压力。然而,由于用于更高功率应用的许多半导体芯片和/或设置在封装件中的许多子组芯片,商用技术发展水平的半导体封装件可使用复杂互连。此外,跨整个封装件,在封装件中的所有芯片的接触点可能不是精确平坦的。如此,由导电板施加以将半导体芯片互连的压力量可校准和/或操纵以确保芯片互连同时防止芯片损伤。
弹簧可用在压装半导体封装件中以补偿跨该压装封装件施加到每个半导体芯片的不精确的力。例如,弹簧可放置在每个半导体芯片的接触点处以提供与由导电板中的任一个或两个施加的某个范围的力相抵的压缩力。然而,在商用半导体封装件的复杂设计中,并且利用小尺寸的现有半导体芯片,典型的弹簧可能不足以与封装件中的半导体芯片准确对准。
发明内容
在一个实施例中,半导体封装件包括第一导电板、设置在该第一导电板之上的电力覆盖(POL)结构、一个或多个设置在该POL结构之上的弹簧和配置成大致上接触所有该一个或多个弹簧的第二导电板。该POL结构包括多个半导体器件、在该半导体封装件内电耦合该多个半导体器件的导电层和耦合于该导电层的介电层。
在另一个实施例中,半导体封装件包括集电极板和设置在该集电极板之上的电力覆盖(POL)结构。该POL结构包括多个半导体器件和导电层,其配置成在该半导体封装件内互连该多个半导体器件并且配置成起该多个半导体器件中的每个的第一发射极的作用。该POL结构还包括耦合于该导电层的介电层。
在再另一个实施例中,半导体封装件包括第一导电板和设置在该第一导电板之上的电力覆盖(POL)结构。该POL结构包括多个半导体器件、在该半导体封装件内连接该多个半导体器件的导电层和耦合于该导电层的介电层。该半导体封装件进一步包括远离该多个半导体器件凹陷的并且接触该POL结构的第二导电板。
附图说明
当下列详细说明参照附图(其中类似的符号在整个附图中代表类似的部件)阅读时,本发明的这些和其他特征、方面和优势将变得更好理解,其中:
图1图示根据本发明的实施例可包括半导体器件的电子系统的框图;
图2图示根据本发明的实施例连接半导体器件的电力覆盖(POL)结构的横截面侧视图;
图3图示根据本发明的实施例使用电力覆盖结构并且包括弹簧和衬垫的半导体压装的横截面侧视图;
图4图示根据本发明的实施例用厚的铜电力覆盖互连结构封装的半导体压装的横截面侧视图;
图5图示根据本发明的实施例的具有两层半导体器件和电力覆盖结构的半导体压装的横截面侧视图;
图6图示根据本发明的实施例的用具有凹陷导体板的电力覆盖结构封装的半导体压装的横截面侧视图;
图7图示根据本发明的实施例的用具有凹陷导电板的电力覆盖结构和在该导电板和该电力覆盖结构之间的液体金属来封装的半导体压装的横截面侧视图;
图8图示根据本发明的实施例的用包括金属柱和硅酮橡胶垫的电力覆盖结构封装的半导体压装的横截面侧视图;
图9图示根据本发明的实施例的用多孔铜电力覆盖结构封装的半导体压装的横截面侧视图;以及
图10图示根据本发明的实施例的用具有从铜层生长的铜弹簧的电力覆盖结构封装的半导体压装的横截面侧视图。
具体实施方式
转向附图,图1描绘根据本公开的可包括压装半导体模块的风力转换器系统10。该风力转换器系统10可适合使用涡轮机叶片12从风捕捉能量并且将该捕捉的风力转换成机械动力,并且将该机械动力转换成电力。该系统10可包括连接到该涡轮机叶片12的涡轮机转子14的变速箱16。该变速箱16可使涡轮机转子14的相对低的速度与发电机18的相对高的速度适应。
发电机18可将机械动力转换成电力,并且可例如是感应发电机或同步发电机。例如,在图1中图示的发电机18可是双馈感应发电机(DFIG),其包括转子绕组20和定子绕组22。发电机18的定子绕组22可连接到变压器28,其通过感应耦合的导体将电力变换到电网30的合适电压水平。该电网30可是将电力输送到各种其他电装置或网络的互连网络。发电机18的转子绕组20可通过转换器24和26连接到该电网30,该转换器24和26将机械和电频率去耦合(例如,以实现变速运行)。
系统10可包括由DC电容器电池32链接的两个三相AC-DC转换器24和26。连接到发电机18的转子绕组20的转换器24可称为转子侧转换器24,而由变压器28连接到电网30的转换器26可称为电网侧转换器26。该双向转换器24和26可实现输送到电网30的有功和无功电力的矢量控制,并且还可增加电力质量和角稳定性并且减少引入电网30的谐波含量(例如,凭借滤波器)。
因为转换器24和26可用于改变功率控制的水平,并且可使用相对高的功率(电压和电流),在转换器24和26中使用的晶体管可适合开关高电压。因为半导体开关可具有维持热稳定性的固有限制,若干半导体器件可封装在一起以控制系统10的功率。例如,转换器24和26可包括若干绝缘栅双极晶体管(IGBT)34。在一些实施例中,IGBT34或在转换器24和26中使用的任何其他晶体管可封装在根据本文描述的实施例构造和/或制造的一个或多个压装半导体封装件中。
本发明的技术效果包括利用电力覆盖(POL)技术和半导体压装技术以生产具有更高功率密度和可靠性的半导体封装件。POL技术可指使用平坦层导电互连在半导体封装件内互连多个半导体器件的方法,而不是典型的封装技术(例如,引线接合技术)。如在图2中图示的,POL结构40可包括在封装件内提供导电路线的铜层42、称为聚酰亚胺层44的电介质(例如,包括聚酰亚胺和/或环氧树脂)(其在封装件内提供绝缘)和可将半导体器件48贴附到该聚酰亚胺层44的粘合剂层46。实现用于互连器件的POL结构可实现具有减小的厚度和面积、减小的寄生电感和减小的接触电阻的封装件。
此外,传统的封装技术典型地使用聚合物材料和引线接合互连技术,其一般不能受到相对高的温度的连续暴露而没有可能存在的退化和不可靠性。对于牵涉非常冷的温度或宽热循环的应用,在传统封装技术中使用的有机粘合层还可引起对封装结构的不可取的热应力水平。另外,在没有气密性密封的封装结构中的聚合物还可在高湿度环境中引起问题,因为聚合物趋于吸收湿气,其可不可取地升高聚合物的介电常数并且增加寄生电容。
在一个或多个实施例中,POL结构可在介电结构中具有低热阻冷却路径和一个或多个空隙以在某些升高的温度下释放应力。POL技术还可提供能够经受由在升高的温度下运行引起的热应力的更坚固互连结构以及具有在导电板的挤压期间损伤半导体器件的减小的可能性。此外,POL结构可实现多层器件的堆叠用于增加的电压能力。不同的实施例包括各种电力覆盖设计,其包括在封装件中的半导体器件之间提供导电路线的结构,以及提供顺应性以保护器件在导电板的挤压期间不受损伤的结构。
包括POL互连和衬垫的压装半导体封装件的横截面侧视图在图3中图示。如将意识到的,在图3中图示的封装件50(以及将稍后论述的在图4-9中图示的那些)可能不按比例绘制。封装件50可包括设置在发射极板58和集电极板60之间的若干半导体芯片48。例如,衬垫可沿芯片48设置在集电极板60之上。半导体芯片48可指例如绝缘栅双极晶体管(IGBT)、金属氧化物半导体场效应晶体管(MOSFET)、双极结晶体管(BJT)、集成门极换流晶闸管(IGCT)、门极关断(GTO)晶闸管、硅可控整流器(SCR)、二极管或其他器件等半导体器件或包括例如硅(Si)、碳化硅(SiC)、氮化镓(GaN)、砷化镓(GaAs)等材料的器件的组合等。例如,半导体芯片48指可在如在图1中描述的风力转换器系统10中的电力转换中使用的任何适合的半导体器件。
芯片48可与集电极板60接触并且可通过包括铜层42、聚酰亚胺层44和粘合剂层46的POL结构在封装件50内互连。该铜层42可贴附到芯片48以提供封装件50中的每个芯片48的接触52之间的导电路线。例如,该铜层42可连接封装件50中的一个或多个芯片48处的发射极和/或阳极区。一些实施例可包括具有多个被连接的接触52的芯片48。例如,可以是IGBT的左边芯片48a可具有并联连接的两个接触52a和52b(例如,在两个发射极盘处),其中没有隔离设置在接触52中的每个之间。铜层42可经由它们的发射极盘连接一个IGBT到其他IGBT。一些实施例还可包括芯片48,其被连接以提供栅极隔离。例如,右边的芯片48b可包括在IGBT的发射极盘处的接触52c和在IGBT的栅极盘处的接触52d。该接触52c和52d可被隔离。
POL结构在芯片48层之上可是大致上平坦的,并且由发射极板58和/或集电极板60压向芯片48所引起的弹簧力可分布于设置在弹簧54下面的衬垫56。衬垫56可顺应而与弹簧54的力相抵,并且可向芯片48提供与弹簧54的力相抵的应力消除。在一些实施例中,衬垫56可通过机械加工或预先贴附集成进入集电极板60。此外,芯片48和衬垫56之间的区域可用凝胶62或任何其他材料填充,该材料可向每个芯片48提供绝缘并且可足够可压缩以经受来自衬垫56的横向膨胀。从而,发射极板58可经由由POL结构的铜层42提供的导电路线互连封装件50中的芯片48的发射极或阳极。在一些实施例中,如将论述的,铜层42可足够厚以充当封装件的发射极区,并且可消除发射极板58。
半导体压装封装件的另一个实施例提供在用厚铜POL结构封装的半导体的横截面侧视图中,如在图4中图示的。封装件70可包括互连设置在集电极板60上的若干半导体芯片48的POL结构。该POL结构包括可以是足够厚以能够充当封装件70的发射极板的铜板72。例如,在一些实施例中该铜板72可是大约几百微米厚。该铜板72可通过例如脉冲镀层或研磨大致上平坦化,并且可通过在栅极接触76和发射极板72之间提供绝缘而与器件的栅极76分开。一些实施例可包括可凭借绝缘体74在发射极和栅极结之间绝缘的芯片48。
在一些实施例中,更高的电压可通过串联堆叠两层芯片48和POL结构在单个封装件中获得。例如,在图5中图示的封装件78可包括设置在发射极板72之上的附加层芯片,以及也在封装件78内连接附加层芯片的包括第二粘合剂层、第二聚酰亚胺层和第二发射极板的附加POL结构。在这样的实施例中,封装件78的电压能力可增加而没有显著增加封装件78的大小。
图6是用凹陷发射极板封装的压装半导体的横截面侧视图的图示。在一个实施例中,封装件80包括凹陷的发射极板82,其凹陷以将发射极板82与到器件栅极86的导电路线分开。凹陷区域中的一些可用绝缘体74或适合提供发射极板82和连接和/或路由栅极86的POL铜层42的部分之间的栅极绝缘的凝胶材料填充。在一个实施例中,发射极板82可凹陷以不对封装件80中的芯片48施加直接力,而对直接在封装件80中的衬垫84中的一个或多个之上的铜层42的部分施加力。衬垫84可相对顺应并且可基于热膨胀性质的系数来选择。例如,衬垫84可用例如钼(其中聚酰亚胺层44提供到POL铜层42的电绝缘)或陶瓷等材料制成。由于凹陷的发射极板82可凹陷以对衬垫84而非芯片48施加力,在发射极板82压向封装件80中的铜层42期间对芯片48的可能损伤可减小和/或防止。
用凹陷发射极板和液体金属层封装的压装半导体的另一个实施例的横截面侧视图在图7中图示。与图6的封装件80相似,图7的封装件90还可包括凹陷发射极板82,其可凹陷以对封装件中的衬垫84施加力,从而减小和/或防止对芯片48的损伤。另外,封装件90可包括在发射极板82和POL铜层42之间的接触区中的液体金属层92。该液体金属层92可适应发射极板82和/或铜层42的不均匀性,并且可在发射极板82和铜层42之间提供改进的导电接触。在一些实施例中,液体金属层92可包括纯镓、基于镓的合金、铟锌复合物、铟锡复合物和/或具有大约低于50℃的熔点的任何金属材料。此外,在一些实施例中,封装件90可在液体金属层92和凹陷发射极板82和/或POL铜层42之间包括一个或多个阻挡层以保护板82和/或铜层42的表面免于被液体金属层92腐蚀。
在另一个实施例中,在图8中图示的半导体压装的横截面侧视图包括由设置在封装件100中的橡胶垫104内的金属柱102挤压的POL互连。当发射极板58朝芯片48的顶部挤压时,发射极板58可与金属柱102的一端建立接触同时金属柱102与POL铜层42建立接触。该橡胶垫104可包括硅酮橡胶或可担当将均匀压力分布到封装件100中的所有芯片48的弹簧的任何其他材料的组合。此外,封装件100还可包括衬垫56,其可适合经受由发射极板58通过橡胶垫104施加的力。衬垫56可是顺应的并且可保护芯片48不受由垫子104对芯片48层的力引起的可能损伤。在另一个实施例中,橡胶垫104和金属柱102可由金属泡沫代替,金属泡沫足够顺应的并且提供导电和导热性。
图9是包括多孔发射极板的压装半导体封装件的横截面侧视图的图示。该封装件110包括POL结构,其包括铜层42和聚酰亚胺层44,其由粘合剂层46贴附到封装件110中的芯片48层。多孔铜发射极板112可压向POL结构和芯片48。在一些实施例中,该多孔铜发射极板112可从POL铜层42生长,并且可镀成厚的并且通过镀层而平坦化(例如,脉冲镀层、常规镀层、机械研磨或其的任何组合)。发射极板112可凹陷以将器件的栅极116与发射极112分开,并且凹陷区可用绝缘体74填充以提供栅极绝缘。发射极板112的多孔性可致使发射极板112足够顺应而能够建立与芯片48的接触而没有弹簧或附加衬垫的辅助(例如,如在图3中的弹簧54和衬垫56)。例如,发射极板112可具有大约25-80%的多孔性。在一些实施例中,发射极板112可包括金属泡沫,并且可包括多孔导电金属。例如,发射极板112的金属泡沫的体积可具有大约10-95%的空洞空间。
包括从POL铜层生长的铜弹簧的压装半导体封装件的另一个实施例的横截面侧视图在图10中图示。该封装件120可包括在芯片48的后部附近生长铜弹簧124的POL铜层122。该铜弹簧124可通过微加工或掠射角沉积(或GLAD)生长,并且可采用任何结构的形式,包括弹簧状结构、杠杆或适合实现与发射极板58的接触的任何其他结构。此外,任何适合的金属可用于生长该铜弹簧124。因为铜(或其他适合的金属)弹簧124从导电POL铜层124生长,发射极板58和弹簧124之间的接触可实现发射极板58和芯片48之间的接触。封装件120还可包括设置在芯片48之间的衬垫56,其可顺应而与发射极板58施加的力相抵。
该书面说明使用示例以公开本发明,其包括最佳模式,并且还使本领域内技术人员能够实践本发明,包括制作和使用任何装置或系统和执行任何包含的方法。本发明的专利范围由权利要求限定,并且可包括本领域内技术人员想到的其他示例。这样的其他示例如果它们具有不与权利要求的书面语言不同的结构元件,或者如果它们包括与权利要求的书面语言无实质区别的等同结构元件则规定在权利要求的范围内。
部件列表
10 | 电子系统 | 12 | 处理器 |
14 | 电力系统 | 16 | 输入装置 |
20 | RF子系统 | 22 | 通信端口 |
24 | 外围设备 | 26 | 易失性存储器 |
28 | 非易失性存储器 | 30 | 功率控制 |
40 | 电力覆盖结构 | 42 | 铜层 |
44 | 聚酰亚胺层 | 46 | 粘合剂层 |
48 | 芯片 | 50 | 封装件 |
52 | 芯片接触 | 54 | 弹簧 |
56 | 衬垫 | 58 | 发射极板 |
60 | 集电极板 | 70 | 封装件 |
72 | 发射极板 | 74 | 绝缘体 |
76 | 栅极 | 78 | 封装件 |
80 | 封装件 | 82 | 凹陷发射极板 |
84 | 衬垫 | 86 | 栅极 |
90 | 封装件 | 92 | 液体金属 |
100 | 封装件 | 102 | 金属柱 |
104 | 橡胶垫 | 110 | 封装件 |
112 | 多孔发射极 | 114 | 铜层 |
116 | 栅极 | 120 | 封装件 |
122 | 铜层 | 124 | 弹簧 |
Claims (10)
1.一种半导体封装件(50、100、120),其包括:
第一导电板(60);
设置在所述第一导电板(60)之上的电力覆盖(POL)结构(40),所述POL结构(40)包括:
多个半导体器件(48);
在所述半导体封装件(50)内电耦合所述多个半导体器件(48)的导电层(42);以及
耦合于所述导电层(42)的介电层(44);
一个或多个设置在所述POL结构(40)之上的弹簧(54);以及
配置成大致上接触所述一个或多个弹簧(54)中的所有的第二导电板(58)。
2.如权利要求1所述的半导体封装件(50、100、120),其中所述一个或多个弹簧(54)中的每个放置在设置在多个衬垫(56)之上的所述POL结构(40)的一部分之上。
3.如权利要求1所述的半导体封装件(50、100、120),其中所述一个或多个弹簧(54)中的每个配置成通过所述POL结构(40)的所述导电层(42)中的导电路线电耦合所述第二导电板(58)至所述多个半导体器件(48)中的一个或多个。
4.如权利要求1所述的半导体封装件(120),其中所述一个或多个弹簧(54)中的每个从所述POL结构(40)的所述导电层(42)生长。
5.如权利要求4所述的半导体封装件(120),其中所述一个或多个弹簧(54)中的每个通过微加工、掠射角沉积(或GLAD)和薄膜沉积法中的一个或多个从所述导电层(42)生长。
6.如权利要求4所述的半导体封装件(50、100、120),其中所述一个或多个弹簧(54)中的每个放置在所述多个半导体器件(48)中的一个或多个的背面之上。
7.如权利要求1所述的半导体封装件(100),包括设置在所述POL结构(40)之上的多个导电柱(102),其中所述一个或多个弹簧(54)包括垫子(104),其包括类似弹簧的特性和多个孔,所述多个孔中的每个包括所述多个导电柱(102)中的每个。
8.如权利要求7所述的半导体封装件(100),其中所述垫子(104)包括硅酮橡胶、任何弹性材料或上述材料的任意组合。
9.如权利要求7所述的半导体封装件(50、100、120),其中所述多个导电柱(102)放置成经由所述POL结构(40)的所述导电层电耦合所述第二导电板(58)至所述多个半导体器件(48)。
10.如权利要求9所述的半导体封装件(50、100、120),其中所述多个导电柱(102)放置成对所述多个芯片(48)或衬垫(56)中的一个或多个施加力。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/771,892 US8531027B2 (en) | 2010-04-30 | 2010-04-30 | Press-pack module with power overlay interconnection |
US12/771892 | 2010-04-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102237344A true CN102237344A (zh) | 2011-11-09 |
CN102237344B CN102237344B (zh) | 2016-08-24 |
Family
ID=44315177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110119566.2A Active CN102237344B (zh) | 2010-04-30 | 2011-04-29 | 具有电力覆盖互连的压装模块 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8531027B2 (zh) |
EP (1) | EP2388817A3 (zh) |
CN (1) | CN102237344B (zh) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103579137A (zh) * | 2012-07-30 | 2014-02-12 | 通用电气公司 | 可靠的表面安装整体功率模块 |
CN103579136A (zh) * | 2012-07-30 | 2014-02-12 | 通用电气公司 | 用于表面安装模块的扩散阻挡层 |
CN105336723A (zh) * | 2014-07-28 | 2016-02-17 | 通用电气公司 | 半导体模块、半导体模块组件及半导体装置 |
CN105702576A (zh) * | 2014-12-10 | 2016-06-22 | 半导体元件工业有限责任公司 | 具有电子元件的电子器件和形成工艺 |
CN108281405A (zh) * | 2017-12-11 | 2018-07-13 | 全球能源互联网研究院有限公司 | 一种功率器件封装结构及方法 |
CN108281406A (zh) * | 2017-12-11 | 2018-07-13 | 全球能源互联网研究院有限公司 | 一种功率器件封装结构及其制造方法 |
CN108376702A (zh) * | 2018-01-07 | 2018-08-07 | 北京工业大学 | 一种用于压接式igbt模块的弹性多孔结构电极 |
CN110912421A (zh) * | 2018-09-14 | 2020-03-24 | 通用电气航空系统有限责任公司 | 电力覆盖架构 |
CN111162015A (zh) * | 2019-12-20 | 2020-05-15 | 珠海格力电器股份有限公司 | 一种智能功率模块及封装方法 |
CN112385037A (zh) * | 2018-07-11 | 2021-02-19 | 丹尼克斯半导体有限公司 | 半导体器件子组件 |
US11757264B2 (en) | 2018-09-14 | 2023-09-12 | Ge Aviation Systems Llc | Power overlay architecture |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9337163B2 (en) * | 2012-11-13 | 2016-05-10 | General Electric Company | Low profile surface mount package with isolated tab |
US9209151B2 (en) | 2013-09-26 | 2015-12-08 | General Electric Company | Embedded semiconductor device package and method of manufacturing thereof |
US9177943B2 (en) | 2013-10-15 | 2015-11-03 | Ixys Corporation | Power device cassette with auxiliary emitter contact |
US9806051B2 (en) | 2014-03-04 | 2017-10-31 | General Electric Company | Ultra-thin embedded semiconductor device package and method of manufacturing thereof |
DE102014207927A1 (de) * | 2014-04-28 | 2015-10-29 | Siemens Aktiengesellschaft | Transistoranordnung für einen Spannverband und Spannverband mit zumindest einer solchen Transistoranordnung |
US9613843B2 (en) | 2014-10-13 | 2017-04-04 | General Electric Company | Power overlay structure having wirebonds and method of manufacturing same |
JP6259168B2 (ja) * | 2014-10-24 | 2018-01-10 | アーベーベー・シュバイツ・アーゲー | 半導体モジュールおよび半導体モジュールのスタック配列 |
KR102543528B1 (ko) * | 2015-12-07 | 2023-06-15 | 현대모비스 주식회사 | 전력 모듈 패키지 및 그 제조방법 |
US11195784B2 (en) * | 2016-06-20 | 2021-12-07 | Dynex Semiconductor Limited | Semiconductor device sub-assembly |
US11535006B2 (en) | 2017-01-06 | 2022-12-27 | Massachusetts Institute Of Technology | Nanocomposite surfaces with electrically switchable adhesion |
US10541209B2 (en) | 2017-08-03 | 2020-01-21 | General Electric Company | Electronics package including integrated electromagnetic interference shield and method of manufacturing thereof |
US10804115B2 (en) | 2017-08-03 | 2020-10-13 | General Electric Company | Electronics package with integrated interconnect structure and method of manufacturing thereof |
US10541153B2 (en) | 2017-08-03 | 2020-01-21 | General Electric Company | Electronics package with integrated interconnect structure and method of manufacturing thereof |
US10778112B2 (en) * | 2018-04-04 | 2020-09-15 | General Electric Company | DFIG converter with active filter |
CN108649022B (zh) * | 2018-05-17 | 2020-04-10 | 江苏芯澄半导体有限公司 | 一种宽禁带半导体碳化硅功率模块高温封装结构 |
CN108682655B (zh) * | 2018-05-17 | 2020-01-17 | 江苏芯澄半导体有限公司 | 一种宽禁带半导体碳化硅功率模块高温封装方法 |
US11398445B2 (en) | 2020-05-29 | 2022-07-26 | General Electric Company | Mechanical punched via formation in electronics package and electronics package formed thereby |
JP3243789U (ja) | 2020-10-15 | 2023-09-21 | ヒタチ・エナジー・スウィツァーランド・アクチェンゲゼルシャフト | パワー半導体モジュール |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5977568A (en) * | 1997-07-30 | 1999-11-02 | Asea Brown Boveri Ag | Power semiconductor component with a pressure-equalizing contact plate |
CN1236981A (zh) * | 1998-05-26 | 1999-12-01 | 松下电器产业株式会社 | 薄膜晶体管及其制造方法 |
US20050208750A1 (en) * | 2003-12-17 | 2005-09-22 | Hsu John S | Method of making cascaded die mountings with springs-loaded contact-bond options |
WO2009019190A1 (de) * | 2007-08-03 | 2009-02-12 | Siemens Aktiengesellschaft | Federkontaktierung von elektrischen kontaktflächen eines elektronischen bauteils |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3258200B2 (ja) * | 1995-05-31 | 2002-02-18 | 株式会社東芝 | 圧接型半導体装置 |
US5637922A (en) | 1994-02-07 | 1997-06-10 | General Electric Company | Wireless radio frequency power semiconductor devices using high density interconnect |
US5808874A (en) * | 1996-05-02 | 1998-09-15 | Tessera, Inc. | Microelectronic connections with liquid conductive elements |
CN1236982A (zh) * | 1998-01-22 | 1999-12-01 | 株式会社日立制作所 | 压力接触型半导体器件及其转换器 |
US6306680B1 (en) | 1999-02-22 | 2001-10-23 | General Electric Company | Power overlay chip scale packages for discrete power devices |
US6242282B1 (en) | 1999-10-04 | 2001-06-05 | General Electric Company | Circuit chip package and fabrication method |
US6232151B1 (en) * | 1999-11-01 | 2001-05-15 | General Electric Company | Power electronic module packaging |
US7095111B2 (en) * | 2003-03-31 | 2006-08-22 | Intel Corporation | Package with integrated wick layer and method for heat removal |
DE102004018477B4 (de) * | 2004-04-16 | 2008-08-21 | Infineon Technologies Ag | Halbleitermodul |
JP2006269148A (ja) * | 2005-03-23 | 2006-10-05 | Alps Electric Co Ltd | スパイラル接触子 |
US7262444B2 (en) * | 2005-08-17 | 2007-08-28 | General Electric Company | Power semiconductor packaging method and structure |
-
2010
- 2010-04-30 US US12/771,892 patent/US8531027B2/en active Active
-
2011
- 2011-04-27 EP EP11163977.9A patent/EP2388817A3/en active Pending
- 2011-04-29 CN CN201110119566.2A patent/CN102237344B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5977568A (en) * | 1997-07-30 | 1999-11-02 | Asea Brown Boveri Ag | Power semiconductor component with a pressure-equalizing contact plate |
CN1236981A (zh) * | 1998-05-26 | 1999-12-01 | 松下电器产业株式会社 | 薄膜晶体管及其制造方法 |
US20050208750A1 (en) * | 2003-12-17 | 2005-09-22 | Hsu John S | Method of making cascaded die mountings with springs-loaded contact-bond options |
WO2009019190A1 (de) * | 2007-08-03 | 2009-02-12 | Siemens Aktiengesellschaft | Federkontaktierung von elektrischen kontaktflächen eines elektronischen bauteils |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103579136B (zh) * | 2012-07-30 | 2018-03-06 | 通用电气公司 | 用于表面安装模块的扩散阻挡层 |
CN103579136A (zh) * | 2012-07-30 | 2014-02-12 | 通用电气公司 | 用于表面安装模块的扩散阻挡层 |
CN103579137B (zh) * | 2012-07-30 | 2020-03-13 | 通用电气公司 | 可靠的表面安装整体功率模块 |
CN103579137A (zh) * | 2012-07-30 | 2014-02-12 | 通用电气公司 | 可靠的表面安装整体功率模块 |
CN105336723B (zh) * | 2014-07-28 | 2018-09-14 | 通用电气公司 | 半导体模块、半导体模块组件及半导体装置 |
CN105336723A (zh) * | 2014-07-28 | 2016-02-17 | 通用电气公司 | 半导体模块、半导体模块组件及半导体装置 |
CN105702576A (zh) * | 2014-12-10 | 2016-06-22 | 半导体元件工业有限责任公司 | 具有电子元件的电子器件和形成工艺 |
CN105702576B (zh) * | 2014-12-10 | 2020-12-11 | 半导体元件工业有限责任公司 | 具有电子元件的电子器件和形成工艺 |
CN108281405A (zh) * | 2017-12-11 | 2018-07-13 | 全球能源互联网研究院有限公司 | 一种功率器件封装结构及方法 |
CN108281406A (zh) * | 2017-12-11 | 2018-07-13 | 全球能源互联网研究院有限公司 | 一种功率器件封装结构及其制造方法 |
CN108281405B (zh) * | 2017-12-11 | 2019-08-27 | 全球能源互联网研究院有限公司 | 一种功率器件封装结构及方法 |
CN108376702A (zh) * | 2018-01-07 | 2018-08-07 | 北京工业大学 | 一种用于压接式igbt模块的弹性多孔结构电极 |
CN112385037A (zh) * | 2018-07-11 | 2021-02-19 | 丹尼克斯半导体有限公司 | 半导体器件子组件 |
CN110912421A (zh) * | 2018-09-14 | 2020-03-24 | 通用电气航空系统有限责任公司 | 电力覆盖架构 |
CN110912421B (zh) * | 2018-09-14 | 2023-04-14 | 通用电气航空系统有限责任公司 | 电力覆盖架构 |
US11757264B2 (en) | 2018-09-14 | 2023-09-12 | Ge Aviation Systems Llc | Power overlay architecture |
CN111162015A (zh) * | 2019-12-20 | 2020-05-15 | 珠海格力电器股份有限公司 | 一种智能功率模块及封装方法 |
Also Published As
Publication number | Publication date |
---|---|
CN102237344B (zh) | 2016-08-24 |
US8531027B2 (en) | 2013-09-10 |
EP2388817A3 (en) | 2017-11-08 |
EP2388817A2 (en) | 2011-11-23 |
US20110266665A1 (en) | 2011-11-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102237344A (zh) | 具有电力覆盖互连的压装模块 | |
EP3057126B1 (en) | Power module, and method for producing same | |
US20130107601A1 (en) | System and method for operating an electric power converter | |
CN108172617B (zh) | 一种圆形大尺寸igbt芯片压接封装结构及制造方法 | |
JP2013106503A (ja) | 電力変換装置 | |
EP3188232B1 (en) | Power semiconductor device and power semiconductor device production method | |
EP3460840B1 (en) | Devices for attaching and sealing a semiconductor cooling structure | |
US20180350710A1 (en) | Semiconductor device, and power module | |
US11658140B2 (en) | Semiconductor device and fabrication method of the semiconductor device | |
US20110309375A1 (en) | Semiconductor device | |
CN102130021A (zh) | 碳化硅功率模块的封装方法及碳化硅功率模块 | |
Nashida et al. | All-SiC power module for photovoltaic power conditioner system | |
Robles et al. | The role of power device technology in the electric vehicle powertrain | |
JP2021141275A (ja) | 電気回路体、電力変換装置、および電気回路体の製造方法 | |
KR20230074545A (ko) | 통합형 신호 보드를 구비한 상승된 전력 평면을 갖는 전력 모듈 및 이를 구현하는 방법 | |
US9117786B2 (en) | Chip module, an insulation material and a method for fabricating a chip module | |
Ang et al. | Packaging issues for high-voltage power electronic modules | |
US20220352137A1 (en) | High power density 3d semiconductor module packaging | |
CN110071098A (zh) | 一种功率模组电容布局的方法 | |
JP3242736U (ja) | 電力半導体モジュール | |
CN216488032U (zh) | 一种散热结构 | |
Taniguchi et al. | 3.3 kV all-SiC module for power distribution apparatus | |
Wu et al. | Electrical, Thermal and Stress Simulation Analyses of SiC MOSFET Power Integrated Module (PIM) Development | |
US11948927B2 (en) | Semiconductor die with improved thermal insulation between a power portion and a peripheral portion, method of manufacturing, and package housing the die | |
CN102148169A (zh) | 碳化硅功率模块的封装方法及碳化硅功率模块 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20240102 Address after: Barcelona, Spain Patentee after: Ge renewable energy Spain Ltd. Address before: New York, United States Patentee before: General Electric Co. |
|
TR01 | Transfer of patent right |