CN102237338A - 具有改进连接的基板通孔 - Google Patents

具有改进连接的基板通孔 Download PDF

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CN102237338A
CN102237338A CN2010102625610A CN201010262561A CN102237338A CN 102237338 A CN102237338 A CN 102237338A CN 2010102625610 A CN2010102625610 A CN 2010102625610A CN 201010262561 A CN201010262561 A CN 201010262561A CN 102237338 A CN102237338 A CN 102237338A
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metal
tsv
substrate
hole
layer
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CN102237338B (zh
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林俊成
杨固峰
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种具有改进连接的基板通孔包括基板以及基板上方的多个电介质层。在多个电介质层中形成多个金属化层，其中，多个金属化层中的至少一个包括金属焊盘。基板通孔(TSV)从多个电介质层的最上层延伸到基板的底面。深传导通孔从多个电介质层的最上层延伸落到金属焊盘上。金属线形成在多个电介质层的最上层之上，并使TSV和深传导通孔互连。

Description

具有改进连接的基板通孔
技术领域
本发明总的来说涉及一种集成电路结构，更具体地，涉及利用改进的电连接形成基板通孔。
背景技术
在减小集成电路的尺寸和减小RC延迟的努力中，通常使用三维集成电路(3DIC)和堆叠晶片(die)。基板通孔(Through-Substrate Via，TSV)由此被用在3DIC和堆叠晶片中。在这种情况下，通常使用TSV来将晶片上的集成电路连接至晶片的背面。此外，TSV还被用于提供用于通过晶片的背面(其可被接地金属膜覆盖)将集成电路接地的短接地路径。
通常使用两种用于形成TSV的方法：先通孔方法和后通孔方法。当使用先通孔方法形成时，在执行后端制成(BEOL)处理之前形成通孔。因此，在形成金属化层之前形成TSV。然而，由于BEOL处理中的热预算，使用先通孔方法形成的TSV存在诸如铜爆裂以及金属-1到金属-2桥接的问题。
另一方面，尽管先通孔方法节省成本并具有短时间投放市场的优点，但所得到的结构在电源连接方面效率较低。例如，图1和图2示出了包括先通孔TSV的两个互连结构。在图1中，晶片4通过面对面结合而结合至晶片2。在图2中，晶片4通过面对背结合而结合至晶片2。TSV 6形成在晶片2中，并用于将电源连接至晶片2中的器件。观察到，不管是如图1所示从凸块12将电源引入晶片2还是如图2所示从晶片4将电源引入晶片2，都如箭头14所示，电源到晶片4中的器件8具有长路径。此外，每个长电源路径14都包括多条金属线和通孔。因此，电源路径的阻抗也比较大。
发明内容
根据一个方面，一种器件包括基板以及基板上方的互联结构。互连结构包括多个金属化层，金属化层包括底部金属化层(M1)和顶部金属化层(Mtop)。电介质层在Mtop之上。形成基板通孔(TSV)以从电介质层的顶面延伸到基板的底面。形成深传导通孔以从电介质层的顶面延伸落在多个金属化层的一个中的金属焊盘上。金属线在电介质层之上并使TSV和深传导通孔互连。
还公开了其他实施例。
附图说明
为了更加完整地理解实施例及其优点，现在参照以下结合附图进行的描述，其中：
图1和图2示出了电源通过基板通孔(TSV)到晶片的传统连接；
图3至图9示出了根据各个实施例的在制造包括TSV和连接至TSV的深传导通孔的晶片过程中的中间阶段的截面图；以及
图10示出了包括TSV和深传导通孔的晶片，其中，在与形成TSV和深传导通孔的处理步骤分离的处理步骤中形成连接TSV和深传导通孔的金属线。
具体实施方式
下面详细讨论所公开实施例的制造和使用。然而，应该理解，实施例提供了许多可在各种特定环境下具体化的可应用的发明构思。所讨论的具体实施例仅仅是示意性的，并且不限于所公开的范围。
提供了用于形成基板通孔(TSV，当形成在硅基板中时，有时也被称为硅通孔)的新方法。示出了制造实施例的中间阶段。然后讨论实施例的变化。贯穿各个示图和所示出的实施例，类似的参考标号用于表示类似的元件。
参照图3，提供了其中包括基板22和集成电路24(由晶体管代表)的晶片20。根据各个实施例，晶圆20是包括诸如晶体管的有源集成电路器件的元件晶圆(device wafer)。基板22可以是半导体基板(诸如块硅基板)，但是其还可以由其他半导体材料(诸如，锗化硅、砷化镓等)形成。诸如晶体管(由晶体管24代表)的半导体器件可形成在基板22的前表面22a上。互连结构26形成在基板22的前侧上。互连结构26可包括层间电介质(ILD)层28(其中具有晶体管的电极)和ILD 28中的接触插塞30，其中，接触插塞30可由钨或其他金属材料形成。
此外，互连结构26包括金属层间电介质(IMD)34、金属线/焊盘38(包括38A和38B)以及IMD 34中的通孔40。IMD 34可以由具有低-k值(例如，低于大约2.5，或者甚至低于大约2.0)的低-k电介质材料形成。互连结构26可包括底部金属化层(通常称为M1)、顶部金属化层(通常称为Mtop)、以及它们之间的多个金属化层(包括直接在M1之上的金属化层(M2)、直接在M2之上的金属化层(M3)等)。互连结构26中的金属部件可以电耦合至半导体器件24。金属线/焊盘38和通孔40可由铜或铜合金形成，并且可使用已知的镶嵌处理形成。金属线/焊盘38包括金属线38A和金属焊盘38B，金属焊盘38B用于使随后形成的深通孔落在其上。
互连结构26可进一步包括直接在金属化层Mtop之上的一个或多个钝化层47。钝化层47可以是非低-k电介质层，并且可以由氧化硅、氮化硅、未掺杂硅酸盐玻璃、聚酰亚胺等形成。此外，附加金属线/焊盘以及通孔(未示出)可形成在钝化层47中。
在可选实施例中，晶圆20是内插晶圆(interposer wafer)，并且基本独立于集成电路器件(包括形成在其中的诸如晶体管和二极管的有源器件)。在这些实施例中，基板22可以由半导体材料或电介质材料形成。电介质材料可以是氧化硅、诸如聚酰亚胺的有机材料、诸如膜塑料的混合材料、玻璃等。此外，内插晶圆20可包括或者可以独立于诸如电容器、电阻器、电感、变容二极管等的无源器件。
参照图4，在形成互连结构26(可包括或不包括层47)之后，形成TSV开口44和深通孔开口46(包括46A、46B、46C、46D以及未示出的更多可能开口)。在一个实施例中，光刻胶50被形成并图案化。然后，通过蚀刻同时形成TSV开口44和深通孔开口46。TSV开口44延伸到基板22中，而深通孔开口46停止于各自的金属焊盘38B，通过深通孔46露出金属焊盘38B。此外，深通孔46的形成可以以任何期望的结合停止于从M1到Mtop的不同金属化层的任意一个中的金属焊盘38B。
在一个实施例中，图案加载效应可用于同时形成具有不同深度的TSV开口44和深通孔开口46。观察到，当形成特定通孔开口时，具有较大水平尺寸的通孔开口可以比具有较小尺寸的通孔开口具有更大的深度，即使它们通过相同的蚀刻处理形成。作为蚀刻处理中图案加载效应的结果，以及由于TSV开口44和深通孔开口46之间的尺寸差异，所得到的TSV开口44和深通孔开口46将具有不同深度。通过适当地调节水平尺寸W1至W5，当达到TSV开口44的理想深度D1时，也达到了理想深度D2、D3、D4、D5等。这可以减少金属焊盘38B的不理想过蚀刻，因此可以使得对金属焊盘38B的不期望损害最小化。因此，TSV开口44的水平尺寸W1(可以是直径或长度/宽度，取决于TSV开口44的形状)大于深通孔开口46的水平尺寸W2、W3、W4和W5。在一个实施例中，W1/W2(或者W1/W3、W1/W4等)的比率可以大于约1.5，大于约5，甚至大于约100。此外，TSV开口44的深度D1大于深通孔开口46的深度D2。在一个实施例中，D1/D2(或者D1/D3、D1/D4等)的比率可以大于约5，或者甚至大于约5000。此外，在所示实施例中，W2可以大于W3，比率W2/W3大于约1.2，W3可以大于W4，比率W3/W4大于约1.2，以及W4可以大于W5，比率W4/W5大于约1.2。
参照图5，绝缘层52被形成并图案化，以及通过绝缘层52中的开口露出金属焊盘38B。接下来，覆盖形成扩散阻挡层54(也被称为粘着层)，覆盖TSV开口44的侧壁和底部。扩散阻挡层54可包括常用的阻挡材料(诸如钛、氮化钛、钽、氮化钽以及它们的组合)，并且可使用例如物理汽相沉积来形成。接下来，可以在扩散阻挡层54上覆盖形成薄晶种层(未示出)。晶种层的材料可包括铜或铜合金，并且还可以包括诸如银、金、铝和它们的组合的金属。在一个实施例中，通过溅射形成晶种层。在其他实施例中，可以使用其他常用的方法，诸如电镀或无电镀。
参照图6，在先前形成的结构上形成掩模56。在一个实施例中，例如，掩模56包括光刻胶。然后，对掩模56进行图案化。在一个示例性实施例中，所得到的TSV需要连接至金属焊盘38B。因此，在掩模56中形成开口58，以露出TSV开口44和深通孔开口46。
在图7中，金属材料被填充到开口44、46和58中，在TSV开口44中形成TSV 60，在深通孔开口46中形成深传导通孔62，以及在开口58中形成金属线66。在各个实施例中，填充材料包括铜或铜合金，尽管还可以使用其他金属，诸如铝、银、金和它们的组合。形成方法可包括印刷、电镀、无电镀等。在用金属材料填充TSV开口44的同一沉积处理中，相同的金属材料还可以填充到开口58中，从而形成金属线66(还被称为再分配线)。
接下来，如图8所示，去除掩模56。然后，如图9所示，可以形成钝化层72和凸块下金属层(UBM)74。还形成金属凸块76。金属凸块76可以是焊料块、铜块，并且可以包括诸如镍、金、焊料等的其他层/材料。
在形成金属凸块76之后，可以研磨晶圆20的背面，使得露出TSV 60。然后，在晶圆20的背面形成可包括UBM 78和接合焊盘/金属凸块80的背面互连结构。此外，可以在TSV 60和金属凸块80之间形成包括多个再分配层的背面互连结构(未示出)并且将二者电耦合。
图10示出了可选实施例。除了金属线66不是在与形成TSV 60和深通孔62的相同处理中形成之外，该实施例基本上与图9所示的实施例相同。在相关的形成处理中，在形成图5所示的结构之后，填充TSV开口44和深通孔开口46，随后通过诸如化学机械抛光(CMP)的平面化处理去除多余金属，由此形成TSV 60和深通孔62。然而，在CMP之后，TSV 60和深通孔62彼此电断开。接下来，形成金属线66以电耦合TSV 60至深通孔62。在所得到的结构中，扩散阻挡层67将TSV 60和深通孔62与金属线66隔开。扩散阻挡层67可包括钛、氮化钛、钽、氮化钽等。然而，在图9所示的结构中，不形成扩散阻挡层67来将TSV 60和深通孔62与金属线66隔开。
尽管在所示图中将包括半导体器件的器件晶片用作实例，但由实施例提供的教导可以容易地应用于不包括诸如晶体管、电阻器、二极管、电容器等的集成电路的内插晶片。类似地，通过使用实施例，深通孔可以形成在前侧互连结构和背面互连结构中的任意一个或者两个的互连结构上，其中深通孔连接至内插晶片中的TSV。
在实施例中，形成深通孔62，可通过具有不同深度的深通孔62将引入TSV 60的电源(或信号)提供给金属焊盘38B。与传统的后通孔结构相比，大大缩短了到达不同金属化层上的金属部件的路径。结果，有效改进了电源连接效率。
尽管详细描述了实施例及其优点，但应该理解，在不背离由所附权利要求限定的实施例的精神和范围的情况下，可以进行各种修改、替换和改变。此外，本申请的范围不限于在说明书中描述的处理、机器、制造以及物质、装置、方法和步骤的组合的具体实施例。本领域的技术员人将容易地通过本公开理解目前存在或随后开发的处理、机器、制造以及物质、装置、方法和步骤的组合，并根据本公开执行与本文描述的对应实施例基本相同的功能或者实现基本相同的结果。因此，所附权利要求旨在包括在这些处理、机器、制造以及物质、装置、方法和步骤的组合的范围内。此外，每个权利要求都构成单独的实施例，并且各个权利要求和实施例的组合都在本公开的范围内。

Claims (10)

1.一种器件，包括：
基板；
多个电介质层，在所述基板之上；
多个金属化层，形成在所述多个电介质层中，其中，所述多个金属化层中的至少一个包括金属焊盘；
基板通孔(TSV)，从所述多个电介质层的最上层延伸到所述基板的底面；
深传导通孔，从所述多个电介质层的最上层延伸落在所述金属焊盘上；以及
金属线，在所述多个电介质层的最上层上，并使所述TSV和所述深传导通孔互连。
2.根据权利要求1所述的器件，其中，所述金属焊盘被定位成低于所述多个金属化层的最上层，或者所述金属焊盘被定位在所述多个金属化层的最下层中；
所述TSV的第一水平尺寸大于所述深传导通孔的第二水平尺寸。
3.根据权利要求1所述的器件，还包括：
集成电路器件，在所述基板的表面上，所述基板基本独立于集成电路器件；和/或
阻挡层，在所述TSV和所述金属线之间。
4.根据权利要求1所述的器件，其中，所述TSV和所述金属线形成由相同金属材料形成的连续区域，在所述TSV和所述金属线之间没有阻挡层。
5.一种器件，包括：
基板；
互连结构，在所述基板之上，所述互连结构包括：
多个金属化层，包括：
底部金属化层(M1)；
第一金属化层(M2)，直接在所述M1之上；
第二金属化层(M3)，直接在所述M2之上；
顶部金属化层(Mtop)，在所述M3之上；以及
金属焊盘，形成在M1、M2和M3的至少一个中；
基板通孔(TSV)，从所述Mtop延伸到所述基板的底面；
深传导通孔，从所述Mtop延伸到所述金属焊盘；以及
金属线，在所述互连结构上方，并使所述TSV和所述深传导通孔互连。
6.根据权利要求5所述的器件，其中，所述金属焊盘形成在所述M2中，或者所述金属焊盘形成在所述M3中；
所述基板为硅基板，或者所述基板为电介质基板；
所述TSV的第一水平尺寸与所述深传导通孔的第二水平尺寸的比率大于约1.2。
7.根据权利要求5所述的器件，其中，所述TSV和所述金属线由相同的金属材料形成，在所述TSV和所述金属线之间没有扩散阻挡层。
8.根据权利要求5所述的器件，还包括：在所述TSV和所述金属线之间的扩散阻挡层。
9.一种器件，包括：
基板；
互连结构，在所述基板之上，所述互连结构包括：
多个低-k电介质层；
多个金属化层，在所述多个低-k电介质层中并包括金属焊盘，其中，所述金属焊盘包括铜；和
电介质层，在所述多个金属化层之上，其中，所述电介质层的k值大于所述多个低-k电介质层的k值；
基板通孔(TSV)，从所述电介质层的顶面延伸到所述基板的底面；
第一深传导通孔，从所述电介质层的顶面延伸落在所述多个金属化层的第一金属化层中的第一金属焊盘上；
第二深传导通孔，从所述电介质层的顶面延伸落在所述多个金属化层的第二金属化层中的第二金属焊盘上，所述第二金属化层不同于所述第一金属化层；以及
金属线，在所述电介质层之上，并将所述TSV电耦合至所述第一深传导通孔和所述第二深传导通孔。
10.根据权利要求9所述的器件，其中，所述电介质层由非低-k电介质材料形成，所述TSV以及所述第一深传导通孔和所述第二深传导通孔形成连续区域，没有扩散阻挡层将所述TSV与所述第一深传导通孔和所述第二深传导通孔隔离开。
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