CN102141952B

CN102141952B - Device for testing system management bus

Info

Publication number: CN102141952B
Application number: CN201010300999.3A
Authority: CN
Inventors: 于义筱; 王太诚
Original assignee: Scienbizip Consulting Shenzhen Co Ltd
Current assignee: Scienbizip Consulting Shenzhen Co Ltd
Priority date: 2010-02-01
Filing date: 2010-02-01
Publication date: 2015-03-25
Anticipated expiration: 2030-02-01
Also published as: CN102141952A

Abstract

The invention provides a device for testing a system management bus. The device comprises an expansion card interface, a first capacitor and a second capacitor; the expansion card interface comprises a first golden finger pin and a third golden finger pin; the first golden finger pin and the third golden finger pin respectively correspond to pins which are connected with a clock signal wire, a data signal wire and a grounding wire of the system management bus in the expansion card interface; both ends of the first capacitor are electrically connected with the first golden finger pin and the third golden finger pin, and outward stretched with two test probes for testing the data on the clock signal wire of the system management bus respectively; and both ends of the second capacitor are electrically connected with the first golden finger pin and the third golden finger pin, and outward stretched with two test probes for testing the data on the data signal wire of the system management bus respectively. The device for testing the system management bus can test the system management bus easily and conveniently.

Description

Device for testing system management bus

Technical field

The present invention relates to a kind of testing arrangement, particularly one testing arrangement that the signal on System Management Bus (SystemManagement Bus, SMBUS) is tested.

Background technology

System Management Bus is bus conventional on computer motherboard, be commonly used to control the System Management Bus equipment on computer motherboard, as some PCI (Peripheral Component Interconnect, Peripheral Component Interconnect) equipment or PCIE device.Before computer motherboard shipment, generally need test System Management Bus, common method of testing is first by a PCI equipment or a PCIE device, as a network interface card directly inserts on a PCI socket corresponding on computer motherboard or a PCIE socket, then on network interface card, find corresponding signaling point (comprising a data signal point and a clock signaling point), and described two signaling points are drawn by bonding wire, the probe being connected to tester is tested.But there is following shortcoming in this method of testing: 1. draw test signal point by the form of bonding wire on network interface card and can produce certain impact to the transmission quality of signal, cause measuring accuracy not high.2. cannot try one's best near the end of signaling point in the position of bonding wire welding, causes the reflected signal of intervention comparatively large, measuring accuracy can be made equally greatly to reduce.3., if long-time multiple welding can cause damage to network interface card, improve testing cost further.

Summary of the invention

In view of foregoing, the invention provides a kind of can simply, facilitate the testing arrangement of test macro management bus, and this testing arrangement precision is high, cost is low.

A kind of device for testing system management bus, for testing the System Management Bus on a computer motherboard to be measured, described device for testing system management bus comprises a plate body, described plate body comprises pluggable first expansion card interface to the first expansion card socket on described computer motherboard to be measured, described first expansion card interface comprises the first to the 3rd golden finger pin, with the clock cable of described System Management Bus in the corresponding described first expansion card socket of described first to the 3rd golden finger pin difference, the pin that data signal line and earth connection are connected, described plate body is also provided with first and second electric capacity, the two ends of described first electric capacity respectively with described first and the 3rd golden finger pin be electrical connected, the two ends of described first electric capacity are also respectively to the test probe of extension two data on the clock cable testing described System Management Bus, the two ends of described second electric capacity are electrical connected with second and third golden finger pin described respectively, the two ends of described second electric capacity are also respectively to the test probe of extension two data on the data signal line testing described System Management Bus.

Compare prior art, described device for testing system management bus by arranging described first expansion card interface on described plate body, and the clock cable with described System Management Bus is set in described first expansion card interface, the first to the 3rd golden finger pin that the pin that data signal line and earth connection are connected is corresponding, the data on the clock cable of described System Management Bus and data signal line conveniently can be tested again by the test pin at first and second electric capacity two ends described, test very convenient, and test without the need to additionally using network interface card etc., greatly provide cost savings.In addition, because described device for testing system management bus adds first and second electric capacity at test lead, effectively eliminate the noise on holding wire, and the generation of signal reflection phenomenon can be reduced, substantially increase measuring accuracy.

Accompanying drawing explanation

In conjunction with detailed description of the invention, the invention will be further described with reference to the accompanying drawings.

Fig. 1 is the schematic diagram in the better embodiment front of present system management bus testing arrangement.

Fig. 2 is the schematic diagram at the better embodiment back side of present system management bus testing arrangement.

Fig. 3 is the schematic diagram of the better embodiment middle probe of present system management bus testing arrangement.

Fig. 4 is the schematic diagram utilizing the better embodiment of present system management bus testing arrangement to test a computer motherboard.

Main element symbol description

Plate body 10

Pci interface 20

PCIE interface 30

Front 12

The back side 14

Electric capacity C1-C4

Golden finger pin 21-23,31-34

Test probe 41,42,51,52,61,62,71,72

Computer motherboard 80 to be measured

PCI socket 82

Tester 90

Probe 91,92

Detailed description of the invention

Please jointly referring to figs. 1 through Fig. 3, the better embodiment of present system management bus testing arrangement comprises a plate body 10, one edge of described plate body 10 is provided with a pci interface 20, another edge of described plate body 10 is provided with PCIE interface 30, the front 12 of described plate body 10 is provided with two electric capacity C1 and C2, and the back side 14 of described plate body 10 is provided with two electric capacity C3 and C4.

In present embodiment, described plate body 10 can be printed circuit board (PCB).The size conforms PCI protocol specification of described pci interface 20, pluggable on the PCI socket of computer motherboard, the size conforms PCIE protocol specification of described PCIE interface 30, on the pluggable PCIE socket to host computer (comprising 1X and 16X two type).

Described pci interface 20 is provided with the first to the 3rd golden finger pin 21-23, the pin that the corresponding PCI socket of described first to the 3rd golden finger pin 21-23 difference is connected with the clock cable on System Management Bus, data signal line and earth connection, that is, when described pci interface 20 inserts on a PCI socket, the clock cable in System Management Bus, data signal line and earth connection are electrical connected with the described first to the 3rd golden finger pin 21-23 respectively.The two ends of described electric capacity C1 respectively with described first and the 3rd golden finger pin 21 and 23 be electrical connected, the two ends of described electric capacity C1 are also respectively to extension two test probe 41 and 42.The two ends of described electric capacity C2 are electrical connected with second and third golden finger pin 22 and 23 described respectively, and the two ends of described electric capacity C2 are also respectively to extension two test probe 51 and 52.

Described PCIE interface 30 is provided with the 4th to the 7th golden finger pin 31-34, the pin that the corresponding PCIE socket of described 4th to the 7th golden finger pin 31-34 difference is connected with the earth connection on System Management Bus, clock cable, data signal line and earth connection, that is, when described PCIE interface 30 inserts on a PCIE socket, the earth connection in System Management Bus, clock cable, data signal line and earth connection are electrical connected with described 4th to the 7th golden finger pin 31-34 respectively.The two ends of described electric capacity C3 are electrical connected with the described 5th and the 4th golden finger pin 32 and 31 respectively, and the two ends of described electric capacity C3 are also respectively to extension two test probe 61 and 62.The two ends of described electric capacity C4 are electrical connected with the described 6th and the 7th golden finger pin 33 and 34 respectively, and the two ends of described electric capacity C4 are also respectively to extension two test probe 71 and 72.Illustrate only electric capacity C1 and coupled test probe 41 and 42 in Fig. 3, other electric capacity C2-C4 all has identical structure with corresponding test probe 51,52,61,62,71,72, does not provide one by one herein.

Please refer to Fig. 4, when applying present system management bus testing arrangement and testing the System Management Bus on a computer motherboard 80 to be measured, the pci interface 20 of described device for testing system management bus is plugged on a PCI socket 82 of described computer motherboard to be measured 80, clock cable in System Management Bus now on described computer motherboard to be measured 80, data signal line and earth connection are electrical connected to the 3rd golden finger pin 21-23 with first on described pci interface 20 respectively, data on clock cable in System Management Bus on computer motherboard 80 to be measured as described in the test probe 41 and 42 at electric capacity C1 two ends as described in directly contacting with two probes 91 and 92 on a tester 90 (as oscillograph) can test out, again the test probe 51 and 52 at the described electric capacity C2 two ends of the direct contact of probe 91 and 92 can be tested out the data on the data signal line in the System Management Bus on described computer motherboard to be measured 80.

In like manner, if the PCIE interface 30 of described device for testing system management bus is plugged on a PCIE socket (not shown) of described computer motherboard to be measured 80, the data on the clock cable in the System Management Bus on described computer motherboard to be measured 80 can be tested out again with the test probe 61 and 62 at the described electric capacity C3 two ends of the direct contact of the probe 91 and 92 on tester 90, again the test probe 71 and 72 at the described electric capacity C4 two ends of the direct contact of probe 91 and 92 can be tested out the data on the data signal line in the System Management Bus on described computer motherboard to be measured 80.

It is very convenient that application present system management bus testing arrangement carries out test to the System Management Bus on computer motherboard, and without the need to additionally using network interface card to test, greatly provide cost savings.In addition, because described device for testing system management bus adds electric capacity C1-C4 at test lead, effectively eliminate the noise on holding wire, and the generation of signal reflection phenomenon can be reduced, substantially increase measuring accuracy.

Claims

1. a device for testing system management bus, for testing the System Management Bus on a computer motherboard to be measured, described device for testing system management bus comprises a plate body, described plate body comprises pluggable first expansion card interface to the first expansion card socket on described computer motherboard to be measured, described first expansion card interface comprises the first to the 3rd golden finger pin, with the clock cable of described System Management Bus in the corresponding described first expansion card socket of described first to the 3rd golden finger pin difference, the pin that data signal line and earth connection are connected, described plate body is also provided with first and second electric capacity, the two ends of described first electric capacity respectively with described first and the 3rd golden finger pin be electrical connected, the two ends of described first electric capacity are also respectively to the test probe of extension two data on the clock cable testing described System Management Bus, the two ends of described second electric capacity are electrical connected with second and third golden finger pin described respectively, the two ends of described second electric capacity are also respectively to the test probe of extension two data on the data signal line testing described System Management Bus.

2. the system as claimed in claim 1 management bus testing arrangement, is characterized in that: described first expansion card interface is a pci interface or a PCIE interface.

3. the system as claimed in claim 1 management bus testing arrangement, it is characterized in that: described plate body also comprises pluggable second expansion card interface to the second expansion card socket on described computer motherboard to be measured, described second expansion card interface comprises the 4th to the 7th golden finger pin, with the earth connection of described System Management Bus in the corresponding described expansion card socket of described 4th to the 7th golden finger pin difference, clock cable, the pin that data signal line and earth connection are connected, described plate body is also provided with the 3rd and the 4th electric capacity, the two ends of described 3rd electric capacity are electrical connected with the described 5th and the 4th golden finger pin respectively, the two ends of described 3rd electric capacity are also respectively to the test probe of extension two data on the clock cable testing described System Management Bus, the two ends of described 4th electric capacity are electrical connected with the described 6th and the 7th golden finger pin respectively, the two ends of described 4th electric capacity are also respectively to the test probe of extension two data on the data signal line testing described System Management Bus.

4. device for testing system management bus as claimed in claim 3, it is characterized in that: described first expansion card interface is a pci interface, described second expansion card interface is a PCIE interface.