CN109840170A - PCIE signal measurement circuit - Google Patents
PCIE signal measurement circuit Download PDFInfo
- Publication number
- CN109840170A CN109840170A CN201711214206.4A CN201711214206A CN109840170A CN 109840170 A CN109840170 A CN 109840170A CN 201711214206 A CN201711214206 A CN 201711214206A CN 109840170 A CN109840170 A CN 109840170A
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- Prior art keywords
- pcie
- pcie signal
- signal pin
- electrically connected
- module
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Abstract
A kind of PCIE signal measurement circuit, for measuring the PCIE signal of PCIE interface board, the PCIE interface board includes the PCIE signal pin for exporting the PCIE signal.The PCIE signal measurement circuit includes interconnecting module and measurement module, one end of the interconnecting module is electrically connected to the PCIE interface board, the other end of the interconnecting module is electrically connected to the measurement module, and the measurement module is used to obtain and measure by the interconnecting module PCIE signal of the PCIE signal pin.Above-mentioned PCIE signal measurement circuit is drawn PCIE signal by setting interconnecting module, convenient to test PCIE signal.
Description
Technical field
The present invention relates to signal testing technical field more particularly to a kind of PCIE signal measurement circuits.
Background technique
PCI-Express is a kind of high speed serialization computer expansion bus standard, and the interface of PCI Express is according to bus
Bit wide is different and difference, including X1, X4, X8 and X16 etc..PCI Express specification is connected to 32 from 1 channel
Channel connection, has very strong retractility, to meet the needs of different system equipments are different to data transfer bandwidth.
In order to guarantee that the PCIE device of extrapolation is capable of the work of stability and high efficiency, the quality of PCIE signal has to comply with PCIE association
View specification.It is more complicated to the environment collocation and test process of the quality test of PCIE signal but in existing test, it expends big
The time of amount and manpower.
Summary of the invention
In view of the foregoing, it is necessary to a kind of PCIE signal measurement circuit be provided, be convenient to carry out PCIE signal
Test.
An embodiment of the present invention provides a kind of PCIE signal measurement circuit, and the PCIE for measuring PCIE interface board believes
Number, the PCIE interface board includes the PCIE signal pin for exporting the PCIE signal.The PCIE signal measurement circuit
Including interconnecting module and measurement module, one end of the interconnecting module is electrically connected to the PCIE interface board, the interconnecting module
The other end be electrically connected to the measurement module, the measurement module is described for being obtained and being measured by the interconnecting module
The PCIE signal of PCIE signal pin.
Preferably, it is provided with slot on the PCIE interface board, golden finger, the gold hand is provided on the interconnecting module
Finger is plugged in the slot, so that the interconnecting module is electrically connected to the PCIE interface board.
Preferably, the PCIE interface board includes clock pins and multipair PCIE signal pin, is set on the interconnecting module
It is equipped with connector and multiple resistance, a pair of of PCIE signal that the connector is electrically connected in the multipair PCIE signal pin is drawn
Foot and the clock pins, one end of the multiple resistance are electrically connected to remaining to PCIE signal pin, the multiple resistance
Other end ground connection, the measurement module is electrically connected to the connector, to obtain and measure the PCIE to PCIE signal pin
Signal.
Preferably, the resistance value of each resistance is 50 Ω.
Preferably, the PCIE interface board includes clock pins and multipair PCIE signal pin, the interconnecting module include
Multiple pinboards, the measurement module is corresponded by each pinboard obtains and measures every a pair of of PCIE signal pin
PCIE signal.
Preferably, each pinboard includes connector and multiple resistance, the connector be electrically connected to currently
Corresponding a pair of of the PCIE signal pin of pinboard and the clock pins, it is right that one end of the multiple resistance is electrically connected to remaining
PCIE signal pin, the other end ground connection of the multiple resistance.
Preferably, it is provided with slot on the PCIE interface board, is provided with golden finger on each pinboard；Equivalent
When surveying the PCIE signal of a pair of of PCIE signal pin in the multipair PCIE signal pin, will with this to PCIE signal pin pair
The pinboard answered is plugged in the slot by the golden finger.
Compared with prior art, above-mentioned PCIE signal measurement circuit is drawn PCIE signal by setting interconnecting module, side
Just PCIE signal is tested, and testing cost is cheap.
Detailed description of the invention
Fig. 1 is the functional block diagram of an embodiment of PCIE signal measurement circuit of the present invention.
Fig. 2 is the functional block diagram of another embodiment of PCIE signal measurement circuit of the present invention.
Fig. 3 is the circuit diagram of an embodiment of first pair of PCIE signal in present invention measurement PCIE chip.
Fig. 4 is the circuit diagram of an embodiment of second pair of PCIE signal in present invention measurement PCIE chip.
Fig. 5 is circuit diagram of the third of the invention measured in PCIE chip to an embodiment of PCIE signal.
Fig. 6 is the circuit diagram of an embodiment of the 4th pair of PCIE signal in present invention measurement PCIE chip.
Main element symbol description
The present invention that the following detailed description will be further explained with reference to the above drawings.
Specific embodiment
Fig. 1-6 is please referred to, an embodiment of the present invention provides a kind of PCIE signal measurement circuit 100.
The PCIE signal measurement circuit 100 can be used to measure the waveform of the PCIE signal of PCIE interface board 200.It is described
PCIE interface board includes PCIE chip 201, and the PCIE chip 201 has the PCIE signal pin for exporting the PCIE signal.
The PCIE signal measurement circuit 100 includes interconnecting module 10 and measurement module 20.One end of the interconnecting module 10 is electrically connected
In the PCIE interface board 200, the other end of the interconnecting module 10 is electrically connected to the measurement module 20, the measurement module
20 for being obtained and being measured the PCIE signal of the PCIE signal pin by the interconnecting module 10, and then may be implemented to sentence
Whether the PCIE signal of breaking meets PCIE protocol specification.
In one embodiment, it is provided with slot 202 on the PCIE interface board 200, is arranged on the interconnecting module 10
There is golden finger 401.The golden finger 401 is pluggable in the slot 202, so that the interconnecting module 10 and the PCIE
Interface board 200 is electrically connected.
In one embodiment, the PCIE chip 201 include multipair PCIE signal pin and clock pins CLK1,
CLK2.It is illustrated by taking four pairs of PCIE signal pins as an example below, every a pair of PCIE signal pin includes two groups of transmitting-receivings
Signal pins.First pair of PCIE signal pin includes PCIE signal pin TX11, TX12, RX11, RX12.Second pair of PCIE signal
Pin includes PCIE signal pin TX21, TX22, RX21, RX22.Third includes PCIE signal pin to PCIE signal pin
TX31,TX32,RX31,RX32.4th pair of PCIE signal pin includes PCIE signal pin TX41, TX42, RX41, RX42.
The interconnecting module 10 includes multiple pinboard 40a, 40b, 40c, 40d.The quantity of pinboard preferably with PCIE core
The PCIE signal pin logarithm that piece 201 includes is identical, so that each pinboard 40a~40d is measured often for matching
A pair of of PCIE signal pin.For example, the corresponding first pair of PCIE signal pin of pinboard 40a, pinboard 40b are second pair corresponding
PCIE signal pin, pinboard 40c correspond to third to PCIE signal pin, the corresponding 4th pair of PCIE signal pin of pinboard 40d.
Be provided on each pinboard 40a~40d golden finger 401, connector 402 and multiple resistance R1, R2, R3, R4, R5, R6,
R7,R8,R9,R10,R11,R12.The quantity of resistance R1~R12 preferably=(N-1) * 4, wherein N indicates that PCIE chip 201 includes
PCIE signal pin logarithm.
When the pinboard 40a is plugged in the slot 202, the connector 402 of the pinboard 40a is electrically connected to institute
State PCIE signal pin TX11, TX12, RX11, RX12 and described clock pins CLK1, CLK2, the resistance of the pinboard 40a
The one end R1~R12 correspond be electrically connected to the PCIE signal pin TX21, TX22, RX21, RX22, TX31, TX32,
RX31, RX32, TX41, TX42, RX41, RX42, the other end ground connection of resistance R1~R12 of the pinboard 40a.
When the pinboard 40b is plugged in the slot 202, the connector 402 of the pinboard 40b is electrically connected to institute
State PCIE signal pin TX21, TX22, RX21, RX22 and described clock pins CLK1, CLK2, the resistance of the pinboard 40b
The one end R1~R12 correspond be electrically connected to the PCIE signal pin TX11, TX12, RX11, RX12, TX31, TX32,
RX31, RX32, TX41, TX42, RX41, RX42, the other end ground connection of resistance R1~R12 of the pinboard 40b.
When the pinboard 40c is plugged in the slot 202, the connector 402 of the pinboard 40c is electrically connected to institute
State PCIE signal pin TX31, TX32, RX31, RX32 and described clock pins CLK1, CLK2, the resistance of the pinboard 40c
The one end R1~R12 correspond be electrically connected to the PCIE signal pin TX11, TX12, RX11, RX12, TX21, TX22,
RX21, RX22, TX41, TX42, RX41, RX42, the other end ground connection of resistance R1~R12 of the pinboard 40c.
When the pinboard 40d is plugged in the slot 202, the connector 402 of the pinboard 40d is electrically connected to institute
State PCIE signal pin TX41, TX42, RX41, RX42 and described clock pins CLK1, CLK2, the resistance of the pinboard 40d
The one end R1~R12 correspond be electrically connected to the PCIE signal pin TX11, TX12, RX11, RX12, TX21, TX22,
RX21, RX22, TX31, TX32, RX31, RX32, the other end ground connection of resistance R1~R12 of the pinboard 40d.
The measurement module 20 includes probe (not shown), and the probe may be electrically connected to the connector 402, Jin Ershi
The existing measurement module 20 is electrically connected with the pinboard 40a~40d's.
In one embodiment, the connector 402 preferably includes 6 SMP radio frequency connectors, and 6 SMP radio frequencies connect
It connects device one-to-one correspondence and is electrically connected to a pair of of PCIE signal pin and described clock pins CLK1, CLK2.The measurement module 20 is excellent
Choosing includes 6 probes, thus to realize that one-to-one correspondence is electrically connected to 6 SMP radio frequency connectors.The SMP radio frequency connection
Device is preferably model SMP-MSSB-PCT connector.
In one embodiment, the resistance value of each resistance R1~R12 is preferably 50 Ω, so with the PCIE that is electrically connected
Signal pins realize impedance matching.
When needing to measure the PCIE signal of first pair of PCIE signal pin, the golden finger 401 of pinboard 40a is inserted
It is connected to the slot 202, and the probe of the measurement module 20 is connected to the connector 402 of pinboard 40a, and then can be real
Now measure the PCIE signal waveform of first pair of PCIE signal pin.
When needing to measure the PCIE signal of the 4th pair of PCIE signal pin, the golden finger 401 of pinboard 40d is inserted
It is connected to the slot 202, and the probe of the measurement module 20 is connected to the connector 402 of pinboard 40d, and then can be real
Now measure the PCIE signal waveform of the 4th pair of PCIE signal pin.
Above-mentioned PCIE signal measurement circuit is drawn PCIE signal by setting interconnecting module, it is convenient to PCIE signal into
Row test, and testing cost is cheap.
It will be apparent to those skilled in the art that the reality of production can be combined with scheme of the invention according to the present invention and inventive concept
Border needs to make other and is altered or modified accordingly, and these change and adjustment all should belong to range disclosed in this invention.
Claims (7)
1. a kind of PCIE signal measurement circuit, for measuring the PCIE signal of PCIE interface board, the PCIE interface board includes using
In the PCIE signal pin for exporting the PCIE signal, which is characterized in that the PCIE signal measurement circuit includes interconnecting module
And measurement module, one end of the interconnecting module are electrically connected to the PCIE interface board, the other end of the interconnecting module is electrically connected
It is connected to the measurement module, the measurement module by the interconnecting module for obtaining and measuring the PCIE signal pin
PCIE signal.
2. PCIE signal measurement circuit as described in claim 1, which is characterized in that be provided on the PCIE interface board slotting
Slot is provided with golden finger on the interconnecting module, and the golden finger is plugged in the slot, so that the interconnecting module is electrically connected
It is connected to the PCIE interface board.
3. PCIE signal measurement circuit as described in claim 1, which is characterized in that the PCIE interface board includes clock pins
And multipair PCIE signal pin, connector and multiple resistance are provided on the interconnecting module, and the connector is electrically connected to more
To a pair of of the PCIE signal pin and the clock pins in the PCIE signal pin, one end of the multiple resistance is electrically connected
In remaining to PCIE signal pin, the other end of the multiple resistance is grounded, and the measurement module is electrically connected to the connector,
To obtain and measure the PCIE signal to PCIE signal pin.
4. PCIE signal measurement circuit as claimed in claim 3, which is characterized in that the resistance value of each resistance is 50
Ω。
5. PCIE signal measurement circuit as described in claim 1, which is characterized in that the PCIE interface board includes clock pins
And multipair PCIE signal pin, the interconnecting module include multiple pinboards, the measurement module passes through each pinboard
Correspond the PCIE signal for obtaining and measuring every a pair of of PCIE signal pin.
6. PCIE signal measurement circuit as claimed in claim 5, which is characterized in that each pinboard includes connector
And multiple resistance, the connector is electrically connected to a pair of of PCIE signal pin corresponding with present transit plate and the clock draws
Foot, one end of the multiple resistance are electrically connected to remaining to PCIE signal pin, and the other end of the multiple resistance is grounded.
7. PCIE signal measurement circuit as claimed in claim 5, which is characterized in that be provided on the PCIE interface board slotting
Slot is provided with golden finger on each pinboard；A pair of of PCIE signal in the multipair PCIE signal pin of measurement
When the PCIE signal of pin, described insert will be plugged in by the golden finger to the corresponding pinboard of PCIE signal pin with this
Slot.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711214206.4A CN109840170B (en) | 2017-11-28 | 2017-11-28 | PCIE signal measuring circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711214206.4A CN109840170B (en) | 2017-11-28 | 2017-11-28 | PCIE signal measuring circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109840170A true CN109840170A (en) | 2019-06-04 |
| CN109840170B CN109840170B (en) | 2022-06-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711214206.4A Active CN109840170B (en) | 2017-11-28 | 2017-11-28 | PCIE signal measuring circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112162187A (en) * | 2020-09-11 | 2021-01-01 | 浪潮电子信息产业股份有限公司 | Signal test system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102809722A (en) * | 2011-05-30 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | Wake-up signal test system and test card thereof |
| CN104345826A (en) * | 2013-08-02 | 2015-02-11 | 鸿富锦精密电子(天津)有限公司 | Adapter card |
| CN104731679A (en) * | 2013-12-23 | 2015-06-24 | 鸿富锦精密工业（深圳）有限公司 | Connection card detection system |
| US20160026596A1 (en) * | 2014-07-25 | 2016-01-28 | Micron Technology, Inc. | Systems, devices, and methods for selective communication through an electrical connector |
-
2017
- 2017-11-28 CN CN201711214206.4A patent/CN109840170B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102809722A (en) * | 2011-05-30 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | Wake-up signal test system and test card thereof |
| CN104345826A (en) * | 2013-08-02 | 2015-02-11 | 鸿富锦精密电子(天津)有限公司 | Adapter card |
| CN104731679A (en) * | 2013-12-23 | 2015-06-24 | 鸿富锦精密工业（深圳）有限公司 | Connection card detection system |
| US20160026596A1 (en) * | 2014-07-25 | 2016-01-28 | Micron Technology, Inc. | Systems, devices, and methods for selective communication through an electrical connector |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112162187A (en) * | 2020-09-11 | 2021-01-01 | 浪潮电子信息产业股份有限公司 | Signal test system |
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| Publication number | Publication date |
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| CN109840170B (en) | 2022-06-24 |
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