CN103901249A - Interface signal test device - Google Patents
Interface signal test device Download PDFInfo
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- CN103901249A CN103901249A CN201210589391.6A CN201210589391A CN103901249A CN 103901249 A CN103901249 A CN 103901249A CN 201210589391 A CN201210589391 A CN 201210589391A CN 103901249 A CN103901249 A CN 103901249A
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- signal end
- projection
- golden fingers
- signal
- interface
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Abstract
The invention discloses an interface signal test device which comprises a circuit board. The circuit board is provided with a first signal end, a ground signal end and a plurality of golden fingers on one side of the circuit board, wherein the golden fingers can be inserted into quick transmission slots of peripheral equipment to be tested and are used for enabling the first signal end and the ground signal end to be electrically connected with power supply pins and ground pins of the quick transmission slots of the peripheral equipment to be tested during a test, the first signal end comprises a first convex column and a first concave hole in the center of the first convex column, the ground signal end comprises a second convex column and a second concave hole located in the center of the second convex column, and the first concave hole and the second concave hole are connected with a test plug of an external tester in a matched mode. According to the interface signal test device, output voltage values of the power supply pins of the PCIE slots can be conveniently and accurately detected.
Description
Technical field
The present invention relates to a kind of interface test device, relate in particular to a kind of device of test computer peripheral interface signal.
Background technology
In recent years, along with the fast development of electronic communication technology, computer connects bus and interface standard is upgraded lifting gradually.New standard PCIE(Peripheral Component Interconnect Express, main frame peripherals transmits fast) interface is with high transmission rates, replace gradually traditional AGP(Accelerate Graphical Port compared with the advantage of large compatibility, Fast Graphics interface) interface and PCI(Peripheral Component Interconnect, peripheral cell connects) interface.
Along with popularizing of PCIE interface, the whether normal of PCIE port output signal is the problem that enjoys people to pay close attention to.Conventionally, computer motherboard is provided with the PCIE slot being connected with PCIE signal end, and this slot is provided with some pins that are connected with PCIE signal end, and this pin comprises the 12V power pins that is positioned at B1, B2 port or A2, A3 port.Along with the raising of PCIE slot power, the accuracy of the 12V voltage of its output is also particularly important.In test in the past, conventionally adopt welding test probe on B1, B2 pin or A2, A3 pin, by test probe or lead-in wire, two power supply signal ends are connected to measuring voltage and electric current on oscillograph.Because the pin of PCIE slot is intensive, test probe or wire bonds can be strengthened to welding difficulty in corresponding power pins, if weld improperly, not only can damage PCIE slot and mainboard; Also can affect the normal output of the voltage of 12V power pins; Meanwhile, if weld does not have the end of close PCIE socket pin, can produce undesired signal, make the test voltage of output inaccurate.
Summary of the invention
The invention provides a kind of conveniently and measure exactly peripherals and transmit fast the device of the output voltage of the power pins of slot.
A kind of interface signal proving installation, comprise wiring board, described wiring board is provided with first signal end, earth signal end and be positioned at some golden fingers of wiring board one side, this Jin Shouke is plugged in the quick passing interface slot of peripherals to be measured, and in order to first signal end and earth signal end are electrically connected to peripherals to be measured and transmit fast in when test power pins and the ground pin of slot, described first signal end comprises the first projection and is positioned at the first shrinkage pool of the first projection central authorities, described earth signal end comprises the second projection and is positioned at the second shrinkage pool of the second projection central authorities, the test plug of described the first shrinkage pool and the second shrinkage pool and external testing instrument is connected.
Interface signal proving installation of the present invention comprises that one transmits (PCIE fast with peripherals, Peripheral Component Interconnect Express) the connected wiring board of slot, this wiring board is provided with the first signal end and the earth signal end that are electrically connected with the 12V power pins of PCIE slot, so that the 12V power pins of PCIE slot is drawn, and then be connected to first signal end and the earth signal end of wiring board by voltage table, and then, can easily and accurately measure the voltage of the 12V power pins of PCIE slot.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the preferred embodiment of interface signal proving installation of the present invention.
Fig. 2 is the schematic diagram of interface signal proving installation of the present invention when testing peripherals to be measured and transmitting slot fast.
Main element symbol description
| Interface letter test dress number is put | 10 |
| PCIE slot to be measured | 11 |
| |
12 |
| Voltage table | 13 |
| |
15 |
| |
120 |
| Earth |
121 |
| |
122 |
| Edge- |
123 |
| Lead-in |
124 |
| The |
201 |
| The |
212 |
| The |
220 |
| The |
202 |
| The |
210 |
| The |
222 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Interface signal proving installation of the present invention was can be not only convenient but also test out exactly peripherals and transmit fast voltage and the electric current of the power supply output pin of (Peripheral Component Interconnect Express, PCIE) slot.
As illustrated in fig. 1 and 2, preferred embodiment interface signal proving installation 10 of the present invention comprises wiring board 12.When test, wiring board 12 is installed in the PCIE slot 11 on mainboard.
In the time testing the voltage of the 12V power pins on PCIE slot 11 to be measured, the edge-board connector of this interface signal proving installation 10 123 is inserted on PCIE slot 11 to be measured, first signal end 120 is electrically connected with the 12V pin of PCIE slot 11 to be measured by the first golden finger, and earth signal end 121 is electrically connected with the ground pin of PCIE slot 11 to be measured by the second golden finger.Wiring board 12 also comprises three lead-in wires 124, and one end of these three lead-in wires is respectively welded on the first projection 201, the second projection 212 and the 3rd projection 220, and the other end of these three lead-in wires in order to connect load in the time testing.Three wires 124 of wiring board 12 are connected in to load 15 two ends, the anode plug of voltage table is inserted in the first shrinkage pool 202 of first signal end 120, the cathode plug of voltage table is inserted in the second shrinkage pool 210 of earth signal end 121, observe the reading of voltage table 13, can draw the magnitude of voltage of the 12V power pins on PCIE slot 11 to be measured.Load 15 is played and is simulated the effect that is plugged on the PCIE card on PCIE slot, and the working current of load 15 is 5.5A.
Identical with the process of above-mentioned measurement 12V power pins when measuring the electric current and voltage of signal end of the 3.3V on PCIE slot, insert in the 3rd shrinkage pool 222 of secondary signal end 122 by the anode plug of voltage table, cathode plug inserts in the second shrinkage pool 210 of earth signal end 121, observe the reading of voltage table 13, can draw the magnitude of voltage of the 3.3V voltage pin on PCIE slot 11 to be measured.
Like this, just can measure easily 12V power pins on PCIE slot or the voltage of 3.3V power pins, avoid taking the mode measuring-signal of welding lead, thereby protected PCIE slot and mainboard not impaired.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change the protection domain that all should belong to the claims in the present invention with distortion.
Claims (3)
1. an interface signal proving installation, comprise wiring board, described wiring board is provided with first signal end, earth signal end and be positioned at the edge-board connector of wiring board one side, described edge-board connector comprises some the first golden fingers for transmitting the first voltage, some second golden fingers of transmission earth signal, these first golden fingers are electrically connected to described first signal end, these second golden fingers are connected to described earth signal end, described first signal end comprises the first projection that metal material is made, these the first projection central authorities establish one first shrinkage pool, described earth signal end comprises the second projection that metal material is made, these the second projection central authorities establish one second shrinkage pool, this edge-board connector is for being plugged in the slot of Devices to test.
2. interface signal proving installation as claimed in claim 1, it is characterized in that: on described wiring board, be also provided with secondary signal end, described secondary signal end comprises the 3rd projection that metal material is made, the 3rd projection central authorities establish one the 3rd shrinkage pool, described edge-board connector comprises some the 3rd golden fingers for transmitting second voltage, and these the 3rd golden fingers are electrically connected to described the 3rd projection.
3. interface signal proving installation as claimed in claim 2, it is characterized in that: described interface signal proving installation also comprises three lead-in wires, one end of these three lead-in wires is respectively welded on the first to the 3rd projection, and the other end of these three lead-in wires in order to connect load in the time testing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210589391.6A CN103901249A (en) | 2012-12-28 | 2012-12-28 | Interface signal test device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210589391.6A CN103901249A (en) | 2012-12-28 | 2012-12-28 | Interface signal test device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103901249A true CN103901249A (en) | 2014-07-02 |
Family
ID=50992705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210589391.6A Pending CN103901249A (en) | 2012-12-28 | 2012-12-28 | Interface signal test device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103901249A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107703362A (en) * | 2017-12-07 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of server master board PCIE signal line impedence measurement jig |
| CN109143113A (en) * | 2018-07-24 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method, apparatus and system monitoring PCIE outer plug-in card power supply |
| CN111929620A (en) * | 2020-07-10 | 2020-11-13 | 苏州浪潮智能科技有限公司 | Test device for supporting EDSFF-1C standard interface |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201149909Y (en) * | 2008-01-25 | 2008-11-12 | 捷腾光电股份有限公司 | Modularization combined signal connector |
| CN102298085A (en) * | 2010-06-24 | 2011-12-28 | 鸿富锦精密工业（深圳）有限公司 | Loading plate |
| CN102692525A (en) * | 2011-03-23 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | An assistant testing device for PCI card |
| CN102692526A (en) * | 2011-03-23 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | An assistant testing device |
| CN102735945A (en) * | 2011-04-07 | 2012-10-17 | 鸿富锦精密工业（深圳）有限公司 | Signal testing device |
-
2012
- 2012-12-28 CN CN201210589391.6A patent/CN103901249A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201149909Y (en) * | 2008-01-25 | 2008-11-12 | 捷腾光电股份有限公司 | Modularization combined signal connector |
| CN102298085A (en) * | 2010-06-24 | 2011-12-28 | 鸿富锦精密工业（深圳）有限公司 | Loading plate |
| CN102692525A (en) * | 2011-03-23 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | An assistant testing device for PCI card |
| CN102692526A (en) * | 2011-03-23 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | An assistant testing device |
| CN102735945A (en) * | 2011-04-07 | 2012-10-17 | 鸿富锦精密工业（深圳）有限公司 | Signal testing device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107703362A (en) * | 2017-12-07 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of server master board PCIE signal line impedence measurement jig |
| CN109143113A (en) * | 2018-07-24 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method, apparatus and system monitoring PCIE outer plug-in card power supply |
| CN111929620A (en) * | 2020-07-10 | 2020-11-13 | 苏州浪潮智能科技有限公司 | Test device for supporting EDSFF-1C standard interface |
| CN111929620B (en) * | 2020-07-10 | 2022-11-22 | 苏州浪潮智能科技有限公司 | Test device for supporting EDSFF-1C standard interface |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140702 |