CN102130101B - 围绕凸块形成区形成具有多层ubm的凸块结构的半导体器件和方法 - Google Patents
围绕凸块形成区形成具有多层ubm的凸块结构的半导体器件和方法 Download PDFInfo
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- CN102130101B CN102130101B CN201010587089.8A CN201010587089A CN102130101B CN 102130101 B CN102130101 B CN 102130101B CN 201010587089 A CN201010587089 A CN 201010587089A CN 102130101 B CN102130101 B CN 102130101B
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (15)
Applications Claiming Priority (2)
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US12/628631 | 2009-12-01 | ||
US12/628,631 US8575018B2 (en) | 2006-02-07 | 2009-12-01 | Semiconductor device and method of forming bump structure with multi-layer UBM around bump formation area |
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CN102130101A CN102130101A (zh) | 2011-07-20 |
CN102130101B true CN102130101B (zh) | 2016-08-24 |
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US9543262B1 (en) * | 2009-08-18 | 2017-01-10 | Cypress Semiconductor Corporation | Self aligned bump passivation |
US8653542B2 (en) * | 2011-01-13 | 2014-02-18 | Tsmc Solid State Lighting Ltd. | Micro-interconnects for light-emitting diodes |
TWI490994B (zh) * | 2012-09-03 | 2015-07-01 | 矽品精密工業股份有限公司 | 半導體封裝件中之連接結構 |
US9620413B2 (en) | 2012-10-02 | 2017-04-11 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of using a standardized carrier in semiconductor packaging |
US9496195B2 (en) | 2012-10-02 | 2016-11-15 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP |
US9721862B2 (en) | 2013-01-03 | 2017-08-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages |
US9704824B2 (en) | 2013-01-03 | 2017-07-11 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming embedded wafer level chip scale packages |
US9478498B2 (en) * | 2013-08-05 | 2016-10-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through package via (TPV) |
CN103658899B (zh) * | 2013-12-04 | 2016-04-13 | 哈尔滨工业大学深圳研究生院 | 一种单一取向Cu6Sn5金属间化合物微互连焊点结构的制备及应用方法 |
US9704769B2 (en) | 2014-02-27 | 2017-07-11 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP) |
US9466659B2 (en) * | 2014-07-09 | 2016-10-11 | Globalfoundries Inc. | Fabrication of multilayer circuit elements |
US10147692B2 (en) | 2014-09-15 | 2018-12-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package with UBM and methods of forming |
US10269752B2 (en) | 2014-09-15 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package with UBM and methods of forming |
TWI585870B (zh) * | 2015-05-20 | 2017-06-01 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
KR20210086198A (ko) * | 2019-12-31 | 2021-07-08 | 삼성전자주식회사 | 반도체 패키지 |
KR20220029232A (ko) | 2020-09-01 | 2022-03-08 | 삼성전자주식회사 | 반도체 패키지 및 이를 포함하는 반도체 장치 |
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US5894170A (en) * | 1996-08-29 | 1999-04-13 | Nec Corporation | Wiring layer in semiconductor device |
US6191489B1 (en) * | 1999-02-19 | 2001-02-20 | Micronas Gmbh | Micromechanical layer stack arrangement particularly for flip chip or similar connections |
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Also Published As
Publication number | Publication date |
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US20110127668A1 (en) | 2011-06-02 |
SG171525A1 (en) | 2011-06-29 |
US8575018B2 (en) | 2013-11-05 |
TWI518811B (zh) | 2016-01-21 |
SG189786A1 (en) | 2013-05-31 |
CN102130101A (zh) | 2011-07-20 |
TW201125052A (en) | 2011-07-16 |
US20120299176A9 (en) | 2012-11-29 |
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