CN102088025A - 薄膜晶体管基板及其制造方法 - Google Patents

薄膜晶体管基板及其制造方法 Download PDF

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CN102088025A
CN102088025A CN2009103107688A CN200910310768A CN102088025A CN 102088025 A CN102088025 A CN 102088025A CN 2009103107688 A CN2009103107688 A CN 2009103107688A CN 200910310768 A CN200910310768 A CN 200910310768A CN 102088025 A CN102088025 A CN 102088025A
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electrode
film transistor
insulating barrier
thin film
storage capacitors
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朱祚宇
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Innocom Technology Shenzhen Co Ltd
Innolux Shenzhen Co Ltd
Innolux Corp
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Innolux Shenzhen Co Ltd
Innolux Display Corp
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Priority to US12/943,948 priority patent/US8704963B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio

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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

本发明公开一种薄膜晶体管基板，该薄膜晶体管基板包括一玻璃基板、设置在该玻璃基板上的第一绝缘层、设置在该第一绝缘层上的储存电容电极、设置在该储存电容电极上的第二绝缘层、设置在该第二绝缘层上的公共电极、设置在该公共电极上的第三绝缘层及设置在该第三绝缘层上的像素电极，该第二、第三绝缘层上设置通孔，使该像素电极与该储存电容电极导通，该公共电极与该储存电容电极至少部分交叠。本发明通过在保护层之间设置一公共电极，使驱动液晶层的储存电容更加靠近该液晶层，驱动效果好，且由于不需要大面积的储存电容的电极，使该薄膜晶体管基板的开口率得到提升。

Description

薄膜晶体管基板及其制造方法
技术领域
本发明涉及一种薄膜晶体管(Thin Film Transistor，TFT)基板及其制造方法。
背景技术
液晶显示面板通常包括一薄膜晶体管基板、一彩色滤光片基板和夹在该两个基板之间的液晶层，其是通过分别施加电压至上述两个基板，控制其间液晶分子扭转而实现光的通过或不通过，从而达到显示的目的。
现有的薄膜晶体管基板通常包括基底、形成在该基底上的栅极、栅极线及公共电极线、形成在该栅极、栅极线及公共电极线上的栅极绝缘层、形成在该栅极绝缘层上的半导体层、源漏极、储存电容电极与数据线、形成在该半导体层、源漏极、储存电容电极与数据线上的保护层、形成在该保护层上的钝化层及形成在该钝化层上的像素电极图案。其中，该储存电容电极与该公共电极线交叠而构成一储存电容。
然而，上述由该储存电容电极与该公共电极线交叠而构成的储存电容两电极极板间的距离较远。电容特性决定，当电容两电极极板间的距离较远的时，如想获得足够的电容，需要储存电容极板面积很大，而构成储存电容两电极为不透光的金属物，导致该薄膜晶体管基板的光的透过量较小、开口率较低。
发明内容
为了解决现有技术中开口率低的技术问题，有必要提供一种开口率高的薄膜晶体管基板。
同时提供一种上述薄膜晶体管基板的制造方法。
一种薄膜晶体管基板，该薄膜晶体管基板包括一玻璃基板、设置在该玻璃基板上的第一绝缘层，设置在该第一绝缘层上的储存电容电极、设置在该储存电容电极上的第二绝缘层，设置在该第二绝缘层上的公共电极、设置在该公共电极上的第三绝缘层及设置在该第三绝缘层上的像素电极，该第二、第三绝缘层上设置通孔，使该像素电极与该储存电容电极导通，该公共电极与该储存电容电极至少部分交叠。
一种薄膜晶体管基板制造方法，其包括以下步骤：在薄膜晶体管基板形成栅极；在该栅极上形成第一绝缘层和半导体层；在该第一绝缘层和半导体层上形成源极、漏极、储存电容电极、半导体层的通道和数据线；在该第一绝缘层、源极、漏极、储存电容电极、半导体层和数据线上形成第二绝缘层；在该第二绝缘层上形成公共电极和公共电极线；在该第二绝缘层、公共电极和公共电极线上形成第三绝缘层和通孔；在该第三绝缘层上形成该像素电极，该通孔将该像素电极与该储存电容电极导通，该公共电极与该储存电容电极至少部分交叠。
与现有技术相比，通过在绝缘层之间设置公共电极，使储存电容公共电极与储存电容电极间距离近，获得足够的电容不需要大面积的储存电容的电极，使该薄膜晶体管基板的开口率得到提升。
附图说明
图1是本发明薄膜晶体管基板的局部平面结构示意图。
图2是图1所示薄膜晶体管基板沿II-II方向剖视的局部结构示意图。
图3是图2所示薄膜晶体管基板制造方法的流程图。
图4是形成栅极的步骤示意图。
图5是形成半导体层的步骤示意图。
图6是形成源极、漏极、储存电容电极、半导体层的通道和数据线的步骤示意图。
图7是形成保护层的步骤示意图。
图8是形成公共电极和公共电极线的步骤示意图。
图9是形成钝化层和部分通孔的步骤示意图。
图10是形成通孔的步骤示意图。
图11是形成像素电极的步骤示意图。
图12是本发明薄膜晶体管基板储存电容电极、公共电极的材料为钼、铝、和铌的混合金属材料时切角示意图。
图13是本发明薄膜晶体管基板另一实施方式的局部平面结构示意图。
图14是图13所示薄膜晶体管基板沿XIV-XIV方向剖视的局部结构示意图。
主要元件符号说明
薄膜晶体管基板：100、200
栅极线：160
公共电极线：170、270
数据线：150
像素区域：190
延伸部：171
薄膜晶体管：120
像素电极：110、210
栅极：123
源极：127
漏极：128
第一电容：131
第二电容：132
储存电容电极：133、233
公共电极：175、275
玻璃基板：101
栅极绝缘层：125
半导体层：126
保护层：121
通孔：137、237
钝化层：129
具体实施方式
请一并参阅图1与图2，图1是本发明薄膜晶体管基板第一实施方式的局部平面结构示意图，图2是图1所示薄膜晶体管基板100沿II-II方向剖视的局部结构示意图。该薄膜晶体管基板100包括多条相互平行的栅极线160、多条与该栅极线160垂直的数据线150。该多条栅极线160与该多条数据线150绝缘相交，且任意两条相邻的栅极线160与任意两条相邻的数据线150界定一像素区域190。每一像素区域190包括一薄膜晶体管120、一储存电容电极133和一像素电极110。
该薄膜晶体管120设置在一条栅极线160与一条数据线150相交处，其包括一栅极123、一源极127和一漏极128。该栅极123与该栅极线160一体相连，该源极127与该数据线150电连接，该漏极128与该像素电极110一侧电连接。该储存电容电极133与该漏极128位于同一层，该储存电容电极133由该漏极128延伸出。
该薄膜晶体管基板100进一步包括多条相互平行的公共电极线170、该公共电极线170与多条栅极线160间隔设置且绝缘。该公共电极线170包括两个延伸部171，该延伸部171沿平行于该数据线150的方向延伸，且与该数据线150部分重叠且绝缘。该公共电极线170包括一呈八角环状的公共电极175，该八角环状的公共电极175设置在两条相邻的延伸部171之间的公共电极线170上。
请参阅图2，该薄膜晶体管基板100进一步包括一玻璃基板101、一栅极绝缘层125、一半导体层126、一保护层121、一钝化层129和一通孔137。
该栅极123及栅极线160形成在该玻璃基板101上；该栅极绝缘层125形成在该栅极123、栅极线160及该玻璃基板101上；该半导体层126形成在该栅极绝缘层125且正对该栅极123的上方；该数据线150形成在该栅极绝缘层125上；该源极127和该漏极128形成在该栅极绝缘层125与该半导体层126上，且彼此断开，露出该半导体层126及其通道(未标示)；该保护层121形成在该源极127、该半导体层126、该漏极128及该数据线150上；该八角环状的公共电极175形成在该保护层121上；该钝化层129形成在该保护层121、该公共电极175及该公共电极线170上，该通孔137贯穿该钝化层129与该保护层121，使该像素电极110经由该通孔137与该储存电容电极133电连接。平面上，该通孔137可以设置在该八角环状的中心，且由该钝化层129与该储存电容电极133间隔。
该像素电极110与该公共电极175形成一第一电容131，该储存电容电极133与该公共电极175形成一第二电容132，该第一电容131和第二电容132共享该公共电极175，该储存电容电极133与该像素电极110电连接，至此形成了上述层叠且并联的二并联电容该第一电容131与该第二电容132。该第一电容131与该第二电容132共同作为该像素单元的储存电容。
电容的大小随介电常量增大而增大，随正对面积的增大而增大，随极板间距离的增大而减小的特性。与现有技术相比，本发明的第一电容131与第二电容132离液晶层的距离较近，构成储存电容的公共电极175的面积小于现有技术中储存电极的面积即可满足产生相同储存电容的需求。又由于公共电极175的面积小，增加了该像素区域190的开口率即光通量。同时，也可以令钝化层变薄来增大储存电容，使薄膜晶体管基板100变得更薄。像素电极110和数据线150之间有公共电极线170的延伸部171，有效的阻挡了两者之间的串扰。
请参阅图3，是图2所示薄膜晶体管基板100制造方法的流程图。其具体步骤如下：
一、第一道掩膜
步骤S21，形成栅极123；
请参阅图4，提供一玻璃基板101，在其上沉积一第一金属层(图未示)和一第一光致抗蚀剂层(图未示)，提供一黄光及第一掩膜对该第一光致抗蚀剂层进行曝光，从而形成一预定的光致抗蚀剂图案。对该第一光致抗蚀剂层进行刻蚀，进而形成该栅极123，移除该第一光致抗蚀剂层。
二、第二道掩膜
步骤S22，形成栅极绝缘层125和半导体层126；
请参阅图5，在该栅极123和该玻璃基板101上沉积该栅极绝缘层125、一半导体层(图未示)与一第二光致抗蚀剂层(图未示)，该半导体层包括一位于该栅极绝缘层125上的非晶硅层和一位于该非晶硅层上的重掺杂非晶硅层。提供一第二掩膜对准该第二光致抗蚀剂层进行曝光，再对曝光后的第二光致抗蚀剂层进行显影，从而形成一预定的光致抗蚀剂图案。对该半导体层进行刻蚀，进而形成该半导体层126，移除该第二光致抗蚀剂层。
三、第三道掩膜
步骤S23，形成源极127、漏极128、储存电容电极133、半导体层126的通道和数据线150；
请参阅图6，在该半导体层126与该栅极绝缘层125沉积一第二金属层(图未示)和一第三光致抗蚀剂层(图未示)。提供一第三掩膜对准该第三光致抗蚀剂层进行曝光，再对曝光后的第三光致抗蚀剂层进行显影，从而形成一预定的光致抗蚀剂图案，进行刻蚀进而形成该源极127、漏极128、储存电容电极133、数据线150和半导体层126的通道，移除该第三光致抗蚀剂层。
步骤S24，形成保护层121；
请参阅图7，在该栅极绝缘层125、半导体层126的通道、源极127、漏极128、储存电容电极133和数据线150上沉积该保护层121。
四、第四道掩膜
步骤S25，形成公共电极175和公共电极线170；
请参阅图8，在该保护层121上沉积一第三金属层(图未示)和一第四光致抗蚀剂层(图未示)。提供一第四掩膜对准该第四光致抗蚀剂层进行曝光，再对曝光后的第四光致抗蚀剂层进行显影，从而形成一预定的光致抗蚀剂图案，进行刻蚀进而形成该八角环状的公共电极175和该公共电极线170，移除该第四光致抗蚀剂层。
五、第五道掩膜
步骤S26，形成钝化层129和部分通孔137；
请参阅图9，在该保护层121、公共电极175和该公共电极线170上沉积该钝化层129和一第五光致抗蚀剂层(图未示)。提供一第五掩膜对该第五光致抗蚀剂层进行曝光显影，从而形成一预定的光致抗蚀剂图案，进行刻蚀在该八角环状的公共电极175中央形成该部分通孔137，移除该第五光致抗蚀剂层。
步骤S27，形成通孔137；
请参阅图10，对该保护层121进行刻蚀，使其露出该储存电容电极133，从而形成完整的该通孔137。
六、第六道掩膜
步骤S28，形成像素电极110；
请参阅图11，在该钝化层129和该通孔137露出的该电极133沉积铟锡氧化物(ITO)层和一第六光致抗蚀剂层(图未示)，提供一第六掩膜对该第六光致抗蚀剂层进行曝光显影，从而形成一预定的光致抗蚀剂图案，进行刻蚀形成透明导电层图案，即该像素电极110，移除该第六光致抗蚀剂层。
由于本实施方式中，该源极、漏极、储存电容电极、公共电极、数据线、公共电极线或栅极线的材料为钼，因此，各层之间堆叠处形成切角为直角。
本发明更有其他实施方式，如钝化层也可以由保护层替代，两者都为绝缘层。
另外，请参阅图12，如本发明该储存电容电极133、公共电极175的材料为钼、铝、和铌的混合物，由该混合物的特性，可产生如图12所示的形态，即该储存电容电极133、其上的保护层121、该保护层121上的该175公共电极层间的切角处在曝光显影后较为平缓不为直角，进而不容易出现断线。同理，源极127、漏极128、数据线150、公共电极线170或栅极线160的材料采用钼、铝、和铌的混合物，进而可提升该薄膜晶体管基板的品质。
再次，请参阅图13与图14，图13是本发明薄膜晶体管基板另一实施方式的局部平面结构示意图，图14是图13所示薄膜晶体管基板200沿XIV-XIV方向剖视的局部结构示意图。本实施方式与第一实施方式的不同之处在于：公共电极线270的公共电极275为矩形，通孔237形成在该储存电容电极233避开该公共电极275的位置。该通孔237令该像素电极210与该储存电容电极233电连接。

Claims (10)

1.一种薄膜晶体管基板，其特征在于：该薄膜晶体管基板包括一玻璃基板、设置在该玻璃基板上的第一绝缘层、设置在该第一绝缘层上的储存电容电极、设置在该储存电容电极上的第二绝缘层、设置在该第二绝缘层上的公共电极、设置在该公共电极上的第三绝缘层及设置在该第三绝缘层上的像素电极，该第二、第三绝缘层上设置通孔，使该像素电极与该储存电容电极导通，该公共电极与该储存电容电极至少部分交叠。
2.如权利要求1所述的薄膜晶体管基板，其特征在于：该第一绝缘层为栅极绝缘层，该第二绝缘层为保护层，第三绝缘层为钝化层。
3.如权利要求2所述的薄膜晶体管基板，其特征在于：该薄膜晶体管基板包括多个薄膜晶体管，每一薄膜晶体管包括一栅极、一源极和一漏极，该栅极形成在该玻璃基板上，该栅极绝缘层形成该栅极上，该栅极绝缘层上形成一半导体层，该半导体层的位置正对该栅极，该栅极绝缘层和该半导体层上形成该源极和该漏极，该栅极绝缘层、该源极、该漏极和该半导体层上形成该保护层，该漏极电连接该储存电容电极。
4.如权利要求3所述的薄膜晶体管基板，其特征在于：该公共电极在玻璃基板的平面方向看为一八角环结构，该通孔贯穿该保护层和该钝化层且位于该八角环状的中心，且由该钝化层与该储存电容电极间隔。
5.如权利要求4所述的薄膜晶体管基板，其特征在于：该储存电容电极与该漏极位于同一层，该储存电容电极由该漏极延伸出。
6.如权利要求5所述的薄膜晶体管基板，其特征在于：该薄膜晶体管基板进一步包括多条相互平行的栅极线、多条相互平行的公共电极线、多条与该栅极线垂直的数据线，该多条栅极线与多条公共电极线间隔设置且绝缘相交，该多条栅极线与该多条数据线绝缘相交，且任意两条相邻的栅极线与任意两条相邻的数据线界定一像素区域，每一像素区域包括一薄膜晶体管、一储存电容和一像素电极，该栅极与该栅极线一体相连，该源极与该数据线电连接，该漏极与该像素电极一侧电连接，该公共电极线包括两个延伸部，该延伸部与该数据线部分重叠。
7.如权利要求6所述的薄膜晶体管基板，其特征在于：该栅极线与该栅极位于同一层且设置在该玻璃基板上；该数据线、该源极、该漏极、该半导体层及该储存电容电极位于在同一层且设置在该栅极绝缘层上；该保护层设置在该数据线、该源极、该漏极、该半导体层及该储存电容电极和该栅极绝缘层上；该公共电极线与该公共电极位于同一层且设置在该保护层上；该钝化层设置在该公共电极线、该保护层、该公共电极上。
8.如权利要求7所述的薄膜晶体管基板，其特征在于：该源极、漏极、储存电容电极、公共电极、数据线、公共电极线或栅极线的材料包括钼、铝、和铌的混合物。
9.一种薄膜晶体管基板制造方法，其包括以下步骤：在薄膜晶体管基板形成栅极；在该栅极上形成第一绝缘层和半导体层；在该第一绝缘层和半导体层上形成源极、漏极、储存电容电极、半导体层的通道和数据线；在该第一绝缘层、源极、漏极、储存电容电极、半导体层和数据线上形成第二绝缘层；在该第二绝缘层上形成公共电极和公共电极线；在该第二绝缘层、公共电极和公共电极线上形成第三绝缘层和通孔；在该第三绝缘层上形成该像素电极，该通孔将该像素电极与该储存电容电极导通，该公共电极与该储存电容电极至少部分交叠。
10.如权利要求9所述的薄膜晶体管基板制造方法，其特征在于：该第一绝缘层为栅极绝缘层、该第二绝缘层为保护层，第三绝缘层为钝化层。
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