CN102082430A - Surge suppression circuit - Google Patents
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- CN102082430A CN102082430A CN2011100300572A CN201110030057A CN102082430A CN 102082430 A CN102082430 A CN 102082430A CN 2011100300572 A CN2011100300572 A CN 2011100300572A CN 201110030057 A CN201110030057 A CN 201110030057A CN 102082430 A CN102082430 A CN 102082430A
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Abstract
The invention discloses a surge suppression circuit which comprises a voltage input end, a voltage output end, a field-effect tube, a transistor, a capacitor, a first resistor, a second resistor and a third resistor, wherein the voltage input end is connected with the source electrode of the field-effect tube and the emitting electrode of the transistor respectively; the voltage input end is also connected with the drain electrode of the field-effect tube through the first resistor; the collector electrode of the field-effect tube is grounded through the third resistor; the base electrode of the transistor is connected with the drain electrode of the field-effect tube through the second resistor; and the drain electrode of the field-effect tube is grounded through the capacitor and also connected with the voltage output end. The surge suppression circuit suppresses surge voltage effectively; after the circuit is in a steady state, the power consumption of the surge suppression circuit is reduced; the surge suppression circuit has the function of load short circuit protection; and when an external power supply generates surge voltage, the surge suppression circuit offers dynamic and real-time protection.
Description
Technical field
The present invention relates to power protecting circuit, particularly the surge of capacitor filter suppresses.
Background technology
In the present various electrical equipment, have rectification circuit in a large number, as civil power, after rectification, capacitor filtering powers for the translation circuit of Switching Power Supply again; As conventional power source, civil power is after the transformer step-down, after rectification, give other circuit supply behind the capacitor filtering, this electric appliances is connected moment at mains switch, because the existence of filter capacitor, filter capacitor both end voltage moment charges to rated operational voltage from 0V, can produce very big surge voltage and surge current, surge current has not only shortened the life-span of filter capacitor, also the diode in the rectification circuit, fuse, power line is all had bigger impact in the time of also.
The method of traditional inhibition surge current is the thermistor (NTC) that seals in suitable negative temperature coefficient in the loop of rectification circuit, thermistor its resistance under normal conditions is bigger, mains switch is connected moment, the thermistor resistance is bigger, has limited the charging current to electric capacity, thereby has suppressed surge current, work on power the back thermistor because heating, its resistance reduces, and has realized the minimizing power consumption, improves the whole efficiency of circuit simultaneously.This method simple possible; but if short supply interruption; because thermistor needs could recover longer cooling time big resistance; when thermistor is uncolled; if mains switch is connected once more or circuit re-powers; at this moment the surge of Chan Shenging will be very big, and the protective effect meeting of thermistor descends, even ineffective fully.Even short supply interruption not, thermistor is because its resistance reduces, and when external power source had surge voltage to produce, the thermistor effect was minimum, and subsequent conditioning circuit still is subjected to the impact of surge voltage.
In the low-power applications occasion, industry replaces above-mentioned thermistor through fixed resistance commonly used, and the value of fixed resistance has become problem, get for a short time, suppress weak effect, got greatly, heating is serious, influence the efficient of complete machine, the person who generally is difficult in both accepts or rejects, and, once circuit enters stable state, this fixed resistance suppresses the surge effect to be finished, in circuit, only plays the negative effect of heating.
In the high-power applications occasion, industry replaces above-mentioned thermistor through high-power fixed resistance commonly used, and after circuit entered stable state, with this resistance of relay short circuit, control circuit relative complex, volume was big, is difficult for popularizing.
Open day is on November 28th, 2007, publication number is in the application for a patent for invention Publication Specification of CN101079546A, a kind of technical scheme also is provided, the annexation of original text is: a kind of surge restraint circuit, comprise a voltage input end, one voltage output end, one field effect transistor, one transistor, one electric capacity, one first resistance and one second resistance, described voltage input end is connected with the source electrode and the described transistorized emitter of described field effect transistor respectively, described voltage input end also links to each other with described field effect transistor drain electrode by described first resistance, described transistorized collector electrode is by described second grounding through resistance, described transistorized base stage is connected with drain electrode with the grid of described transistorized collector electrode and described field effect transistor respectively, the drain electrode of described field effect transistor is by capacity earth, and the drain electrode of described field effect transistor also is connected with described voltage output end.Described field effect transistor is the N channel power MOS pipe; Described transistor is a bipolarity PNP transistor.
What will illustrate in addition is that the accompanying drawing of this document is wrong in the application for a patent for invention Publication Specification of CN101079546A, referring to the 1/1st page second section of original text " claims ": described field effect transistor is the N channel power MOS pipe; And referring to the 2/3rd page of the 3rd section embodiment of original text " specification " second row, the third line: described field effect transistor is the N channel power MOS pipe; And in the disclosed file directory accompanying drawing 1, be drawn as the metal-oxide-semiconductor symbol of P raceway groove.
This paper needs for analyzing when quoting the disclosure file directory accompanying drawing 1, under the prerequisite that does not influence its annexation, circuit topology, has been corrected as the metal-oxide-semiconductor symbol of correct N raceway groove.Its execution mode is referring to former open file Fig. 1, and for convenience of description, this place has quoted the drawing of former open file, referring to accompanying drawing 1-1.
In fact; publication number is that the patent of invention of CN101079546A can not solve the technical problem that will send out solution in its open literary composition and realize the beneficial effect described in the literary composition: above-mentioned surge restraint circuit 10 not only can effectively suppress surge voltage; and reduced the power loss of surge circuit; and provide load short circuit protection function; can effectively protect power supply and electrical appliance not influenced by surge voltage, guarantee the steady operation of power supply and electrical appliance., (referring to the 3/3rd page second section of prospectus)
The concrete reason labor that can not realize the beneficial effect described in the literary composition is as follows, and according to its annexation, its schematic diagram is shown in Fig. 1-1 really, and referring to Fig. 1-1, wherein, triode Q2 collector electrode directly links to each other with base stage.The collector electrode of triode links to each other with base stage, voltage-stabiliser tube of equivalence, it is common practise, numerous engineers in actual applications, also often use this connection, the voltage-stabiliser tube that it is equivalent, when forward conduction, because the collector electrode of triode links to each other with base stage, for silicone tube, collector electrode to the voltage of emitter equals the conducting voltage 0.7V of base stage to emitter, be that collector electrode is clamped down on about 0.7V to the voltage of emitter, triode still is in special magnifying state, and base stage is to the conducting voltage of emitter, silicone tube is about 0.7V, and germanium tube is about 0.2V.The voltage-stabiliser tube of equivalence when forward conduction, is equivalent to the diode of a forward characteristic excellence, and this usage is used in a large number at IC interior.Referring to accompanying drawing 1-2, accompanying drawing 1-3 is the principle of equal effects schematic diagram of NPN type triode.When reverse-conducting, base stage, emitter are in the reverse breakdown state, are equivalent to the voltage stabilizing didoe of a stabilized voltage characteristic excellence, and its voltage stabilizing value is about 5V to 7V.
So, publication number is its schematic diagram of patent of invention of CN101079546A, with the principle of Fig. 1-2, can change Q2 into a voltage stabilizing didoe, equivalence is Fig. 1-4, and is same, the annexation of describing according to its open file: the grid of field effect transistor Q1 and draining directly is connected; Described field effect transistor is the N channel power MOS pipe.So, Q1 is voltage stabilizing didoe of equivalence under this connected mode, and referring to Fig. 1-5, the metal-oxide-semiconductor in left side is the N raceway groove among the figure, and grid G is connected with drain D.Power-type MOS production technology has determined its inside that a parasitic diode (Body Diode) is all arranged, as the D1 among Fig. 1-5; In order to prevent metal-oxide-semiconductor by electrostatic damage, electrostatic defending diode of inner Chang Jicheng (ESD PROTECTION DIODE) is shown in the D2 among Fig. 1-5.Grid is connected with drain electrode as an end, and source class is equivalent to voltage stabilizing didoe as an end, is example with the N-channel MOS pipe, and grid is connected with drain electrode as an end, and source class is as an end, i.e. V
GS=V
DSWhen grid and drain electrode link add that power supply just, source class seals in current-limiting resistance and adds power-, during beginning, metal-oxide-semiconductor does not have conducting, and supply voltage is raise, this voltage is during greater than the cut-in voltage (Gate threshold voltage) of metal-oxide-semiconductor, metal-oxide-semiconductor begins conducting, produces drain current, because V
GS=V
DS, this voltage can't further raise, once make this voltage raise for a certain reason, and V so
GSRaise synchronously, promptly grid level to source voltage raises, and the conducting of metal-oxide-semiconductor further strengthens, and drain current sharply increases, and makes V
DSDescend, grid and drain electrode connect together, V
GSDescend synchronously.Grid is connected with drain electrode as an end, and source class can be used as the good voltage stabilizing didoe of performance and uses as an end, and its voltage stabilizing value is about the cut-in voltage V of this MOS
GS (th)The cut-in voltage of MOS is generally all between 3V to 10V.
Further, publication number is its schematic diagram of patent of invention of CN101079546A, known equivalents mode with Fig. 1-5, can change Q1 into a voltage-stabiliser tube, equivalent electric circuit is shown in Fig. 1-6, analyze its principle for convenience, be optimized for circuit shown in Fig. 1-7 further, from circuit shown in Fig. 1-7 as can be seen, this is a very common half-wave rectifying circuit, R2 has become one of load of consumed power, and this circuit belongs to known half-wave rectifying circuit, can not solve technical problem and the beneficial effect described in the realization file that invention will solve.
Even it is the schematic diagram circuit of the patent of invention of CN101079546A that technique known that need not be above-mentioned is replaced the labor publication number, from following simple analysis, also can draw.Referring to Fig. 1-1, Vin is with after an external power source is connected, when external power source is connected, Vin directly charges to capacitor C by Q2 transistor emitter, Q2 transistor base, the R1 both end voltage equals the conducting voltage of the emitter of Q2 to base stage, be about about 0.7V, be Vout=Vin-0.7V, be that output voltage only subtracts 0.7V for outer power voltage only, output voltage and output voltage are linear, therefore, publication number is that the patent of invention of CN101079546A is to solve technical problem to be solved and the described beneficial effect of realization in its literary composition.
Summary of the invention
Have in view of that, the technical problem to be solved in the present invention is, a kind of surge restraint circuit is provided, the surge voltage that produces in the time of can suppressing mains switch effectively really, and when circuit enters steady operation, do not influence voltage output, reduce unnecessary power consumption.。
For solving the problems of the technologies described above, the invention provides a kind of surge restraint circuit, comprise a voltage input end, one voltage output end, one field effect transistor, one transistor, one electric capacity, one first resistance and one second resistance and one the 3rd resistance, described voltage input end is connected with the source electrode and the described transistorized emitter of described field effect transistor respectively, described voltage input end also links to each other with described field effect transistor drain electrode by described first resistance, described transistorized collector electrode connects the grid of field effect transistor and passes through described the 3rd grounding through resistance, described transistorized base stage links to each other with described field effect transistor drain electrode by described second resistance, the drain electrode of described field effect transistor is by capacity earth, and the drain electrode of described field effect transistor also is connected with described voltage output end.
The present invention compared with prior art has following beneficial effect:
Surge restraint circuit of the present invention can adopt the relatively low N-channel MOS pipe of price, effectively suppresses surge voltage; After circuit enters stable state, reduced the power loss of surge restraint circuit; And provide load short circuit protection function; When external power source had surge voltage to produce, this circuit provided dynamically, real-time guard.Can effectively protect power supply and electrical appliance not influenced by surge voltage, guarantee the steady operation of power supply and electrical appliance.
Description of drawings
Fig. 1-1 is the schematic diagram in the patent of invention open file of CN101079546A for publication number;
Fig. 1-2 is that the PNP triode B utmost point, the C utmost point connect equivalent schematic;
Fig. 1-3 is that the NPN triode B utmost point, the C utmost point connect equivalent schematic;
Fig. 1-4 is the equivalent electric schematic diagram of Fig. 1-1;
Fig. 1-5 is that power MOS pipe grid level, drain electrode connect equivalent schematic;
Fig. 1-6 is the equivalent electric schematic diagram of Fig. 1-4, is the equivalent electric schematic diagram of Fig. 1-1;
Fig. 1-7 is the equivalent electric schematic diagram of Fig. 1-6, is the final equivalent electric schematic diagram of Fig. 1-1;
Fig. 2 is embodiment one schematic diagram of surge restraint circuit of the present invention;
Fig. 3 is embodiment two schematic diagrams of surge restraint circuit of the present invention;
Fig. 4 is the equivalent application schematic diagram of the embodiment one of surge restraint circuit of the present invention.
Embodiment
Embodiment one
As shown in Figure 2, with introduce in the background technology different be that referring to Fig. 1 in the background technology-1, the base stage of triode Q2 directly links to each other with the collector electrode of triode Q2, link to each other by the drain electrode of resistance R 2 with metal-oxide-semiconductor Q1, the drain electrode of metal-oxide-semiconductor Q1 does not directly link to each other with the source electrode of metal-oxide-semiconductor Q1 yet; Triode Q2 is a NPN transistor, and metal-oxide-semiconductor Q1 is the power-type metal-oxide-semiconductor of N raceway groove, and if electric capacity use electrochemical capacitor etc. has polar capacitor, gets final product by correct access of actual polarity during access.Concrete annexation: comprise voltage input end Vin-, voltage output end Vout-, metal-oxide-semiconductor Q1, triode Q2, capacitor C, first resistance R 1, second resistance R 2, the 3rd resistance R 3, voltage input end Vin-is connected with the source electrode of metal-oxide-semiconductor Q1 and the emitter of triode Q2 respectively, above-mentioned voltage input end also links to each other with the drain electrode of metal-oxide-semiconductor Q1 by first resistance R 1, the collector electrode of triode Q2 connect metal-oxide-semiconductor Q1 grid and by the 3rd resistance R 3 ground connection, the base stage of triode Q2 links to each other with the drain electrode of metal-oxide-semiconductor Q1 by second resistance R 2, the drain electrode of metal-oxide-semiconductor Q1 is by capacitor C ground connection, and the drain electrode of metal-oxide-semiconductor Q1 also is connected with voltage output end Vout-.
The operation principle of the foregoing description one is, when Vin connects external power source, this power supply is a negative pressure, if mains switch closure, because the electric capacity both end voltage is initially 0 or lower magnitude of voltage, external power source passes through ground wire, through capacitor C, be divided into two-way and get back to Vin, one tunnel process resistance R 1 is got back to Vin, and another road is through the base stage of resistance R 2 and triode Q2, emitter is got back to Vin, at this moment triode Q2 is because base stage has electric current to flow through to emitter, triode Q2 work, because Q1 is a metal-oxide-semiconductor, its gate bias resistor R3 value is bigger, generally about M Ω level, the collector load R3 of triode Q2 makes that the grid level of N-channel MOS pipe Q1 is very low to the voltage of source electrode because value is big, and triode Q2 directly enters saturated, saturation voltage drop for triode Q2, be generally between the 0.7V to 0.1V, this voltage does not reach the cut-in voltage of N-channel MOS pipe Q1, and metal-oxide-semiconductor Q1 is in off state.
At this moment, circuit of the present invention is from the maximum current that external power source absorbs, and occurs in the capacitor C both end voltage and be 0 moment, and this current maxima is:
From above-mentioned formula as can be seen, this circuit is when externally power supply is closed, external power source is not produced unmanageable charging current, this electric current is only relevant with the value of resistance R 1 and R2, to the electric current of capacitor C charging, along with the capacitor C both end voltage raises, and progressively descend, the capacitor C both end voltage raises, and the numerical value of Vout further descends, the absolute value that is output voltage V out increases, when satisfying:
Vout-Vin≤0.7V
When satisfying above-mentioned formula, promptly the base stage of triode Q2, the voltage between the emitting stage also can be lower than 0.7V, and triode Q2 ends, at this moment external power source is added to voltage on the grid of Q1 by R3, comparatively speaking, grid voltage is higher than source voltage, and metal-oxide-semiconductor Q1 opens, be in conducting state, because the internal resistance of metal-oxide-semiconductor is very low, at this moment, Vin and Vout voltage difference are extremely low, resistance R 1 and R2 both end voltage are extremely low, and heating power is very little; And resistance R 3 is bigger owing to value, and caloric value is also extremely low; When having realized that circuit enters stable state, reduced the power loss of circuit of the present invention.
When circuit entered stable state, if at this moment Vin has the surge voltage fluctuation, if the absolute value trend of Vin voltage diminishes, at this moment the parasitic diode that voltage can pass through metal-oxide-semiconductor Q1 inside on the capacitor C was not had any influence by the external power source clamper; If it is big that the absolute value trend of Vin voltage becomes; this circuit can be realized surge protection; can not produce bigger impulse current to circuit; principle is: if the absolute value trend of Vin voltage becomes big moment; shown in the arrow on the voltage input end Vin limit among Fig. 2; because the capacitor C both end voltage can not be suddenlyd change; triode Q2 emitter is connected with Vin; triode Q2 emitter also can drop down moment; at this moment; the emitter of triode Q2 to the voltage difference between resistance R 2 and the Vout tie point can raise; when voltage difference is crossed 0.7V; in the resistance R 2 electric current can appear, the base stage of triode Q2; emitter has electric current and flows through, triode Q2 saturation conduction; metal-oxide-semiconductor Q1 ends synchronously; the surge voltage fluctuation of external power source can only be passed through R1; R2 works to capacitor C, and when realizing that like this external power source has surge voltage to produce, it is dynamic that this circuit provides; real-time guard.
The realization principle of load short circuit protection function: when circuit enters steady operation; at this moment; if load is short-circuited; promptly be equivalent to the capacitor C short circuit; at this moment; the emitter of triode Q2 to the voltage between resistance R 2 and the Vout tie point can be increased to outer power voltage; there is electric current to flow through in the resistance R 2, triode Q2 saturation conduction, metal-oxide-semiconductor Q1 ends synchronously; at this moment total work electric current of circuit as shown in Equation 1; as long as resistance R 2 is the base stage current-limiting resistance of triode Q2, and general value is bigger, so choose reasonable resistance R 1; reasonable total work electric current of control circuit just is unlikely to allow fault extension or initiation fire etc.
Embodiment two
As shown in Figure 3, different with embodiment one is that triode Q2 is a PNP transistor, metal-oxide-semiconductor Q1 is the power-type metal-oxide-semiconductor of P raceway groove, and annexation is constant, and if electric capacity use electrochemical capacitor etc. has polar capacitor, get final product by correct access of actual polarity during access, external power source changes positive supply into and inserts.
Its operation principle is described with embodiment one, repeats no more here.Embodiment two is suitable for the circuit of positive supply input.
Embodiment three
The principle of embodiment three is fully identical with embodiment one, as shown in Figure 4, only changing with the external power source annexation, the power input of embodiment one is changed into the external power source ground wire insert, and the ground wire of embodiment one changes the external power source positive input into; Embodiment one output ground wire is just changing to output voltage, and embodiment one output port changes to the output ground wire; The output ground wire is two different networks with the external power source ground wire.Embodiment three can realize surge is suppressed equally; The three circuit operation principle of embodiment is described with embodiment one, repeats no more here.
In addition, also can adopt triode or known multiple tube or IGBT pipe to replace described metal-oxide-semiconductor, as replacing the N-channel MOS pipe with NPN type triode; Replace the P channel MOS tube with the positive-negative-positive triode; Corresponding, the annexation of the grid G of the base stage B of triode, emitter E, the corresponding metal-oxide-semiconductor of collector electrode C annexation difference, source S, drain D also can solve technical problem to be solved by this invention.
Also can be in the base stage of triode Q2, emitter parallel resistance (indicating among the figure), regulate triode saturated, by sensitivity, regulate the surge rejection of circuit of the present invention.The voltage-stabiliser tube of protection usefulness (not indicating among the figure) in the parallel connection is broken down by high-voltage to prevent metal-oxide-semiconductor grid and source electrode between metal-oxide-semiconductor grid and source electrode.
Only be preferred implementation of the present invention below, should be pointed out that above-mentioned preferred implementation should not be considered as limitation of the present invention, protection scope of the present invention should be as the criterion with claim institute restricted portion.For those skilled in the art, without departing from the spirit and scope of the present invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (8)
1. surge restraint circuit, it is characterized in that comprising a voltage input end, one voltage output end, one field effect transistor, one transistor, one electric capacity, one first resistance, one second resistance and one the 3rd resistance, described voltage input end is connected with the source electrode and the described transistorized emitter of described field effect transistor respectively, described voltage input end also links to each other with described field effect transistor drain electrode by described first resistance, described transistorized collector electrode connects the grid of field effect transistor and passes through described the 3rd grounding through resistance, described transistorized base stage links to each other with described field effect transistor drain electrode by described second resistance, the drain electrode of described field effect transistor is by capacity earth, and the drain electrode of described field effect transistor also is connected with described voltage output end.
2. a kind of surge restraint circuit according to claim 1 is characterized in that described transistor is a NPN transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of N raceway groove.
3. a kind of surge restraint circuit according to claim 1 is characterized in that described transistor is a PNP transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of P raceway groove.
4. according to claim 1 or 2 or 3 described surge restraint circuits, it is characterized in that described transistorized base stage and emitter are parallel with resistance.
5. according to claim 1 or 2 or 3 described surge restraint circuits, it is characterized in that being parallel with between described fet gate and the source electrode voltage-stabiliser tube.
6. surge restraint circuit, it is characterized in that comprising a voltage input end, one voltage output end, one first triode, one second triode, one electric capacity, one first resistance, one second resistance and one the 3rd resistance, described voltage input end is connected with the emitter of described first triode and the emitter of described second triode respectively, described voltage input end also links to each other with described first transistor collector by described first resistance, the collector electrode of described second triode connects the base stage of first triode and passes through described the 3rd grounding through resistance, the base stage of described second triode links to each other with described first transistor collector by described second resistance, the collector electrode of described first triode is by capacity earth, and the collector electrode of described first triode also is connected with described voltage output end.
7. surge restraint circuit according to claim 6 is characterized in that first triode, second triode are all the NPN type or are all positive-negative-positive.
8. surge restraint circuit, it is characterized in that comprising a voltage input end, one voltage output end, one field effect transistor, one transistor, one electric capacity, one first resistance, one second resistance and one the 3rd resistance, the source electrode of described field effect transistor and described transistorized emitter insert the external power source ground wire, described field effect transistor drain electrode inserts the external power source ground wire through described first resistance, described transistorized collector electrode connects the grid of field effect transistor and connects voltage input end by described the 3rd resistance, described transistorized base stage links to each other with described field effect transistor drain electrode by described second resistance, the drain electrode of described field effect transistor is connected with described voltage output end by electric capacity, and the drain electrode of described field effect transistor also is connected with output ground.
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| CN2011100300572A CN102082430A (en) | 2011-01-27 | 2011-01-27 | Surge suppression circuit |
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Application publication date: 20110601 |