CN102067321A - 二极管及形成二极管的方法 - Google Patents
二极管及形成二极管的方法 Download PDFInfo
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Abstract
一些实施例包括形成二极管的方法,其中形成第一电极而使其具有从基座向上延伸的底座。沿着跨越所述底座及基座延伸的波状形貌沉积至少一个层,且在所述至少一个层上方形成第二电极。所述第一电极、至少一个层及第二电极一起形成结构,在一种极性的电压施加到所述结构时,所述结构导通所述第一电极与第二电极之间的电流,且在具有与所述一种极性相反的极性的电压施加到所述结构时,所述结构抑制所述第一电极与第二电极之间的电流流动。一些实施例包括二极管,所述二极管具有含有从基座向上延伸的两个或两个以上突出物的第一电极;具有在所述第一电极上方的至少一个层;且具有在所述至少一个层上方的第二电极。
Description
技术领域
本发明涉及二极管及形成二极管的方法。
背景技术
在集成电路中利用选择装置来选择性地存取所述电路的组件。众多装置类型可用于集成电路的选择装置,实例装置类型为二极管及晶体管。
集成电路制造的持续目标是通过将个别装置缩放成日益变小的尺寸来增大整合密度,及相应地减小所述装置的占据面积。选择装置可能特别难以缩放,因为减小装置的尺寸可能会降低装置性能。
举例来说,在二极管的整体功能方面可能重要的二极管性能参数为通过二极管的电流流动。在将二极管缩放成日益变小的尺寸时可能出现的问题为,通过二极管的电流流动可能相对于二极管的预期操作变得过小。
将需要开发新二极管及形成二极管的新方法,其使得能够随着将二极管缩放到较小占据面积而通过二极管维持所要电流流动。
附图说明
图1为说明实施例的构造的一部分的图解横截面视图。
图2为二极管的电流对电压的图形说明。
图3展示说明根据实施例的二极管的三种不同偏压条件的三个带隙图。
图4为说明实施例的构造的一部分的图解横截面视图。
图5为说明实施例的构造的一部分的图解横截面视图。
图6为说明实施例的构造的一部分的图解横截面视图。
图7到图10为在实施例的各种处理阶段处的构造的一部分的图解横截面视图。
图11到图13为在实施例的各种处理阶段处的构造的一部分的图解横截面视图。
图14到图17为在实施例的各种处理阶段处的构造的一部分的图解横截面视图。
具体实施方式
一些类型的二极管包含夹于一对导电电极之间的一种或一种以上材料。举例来说,金属-绝缘体-金属(MIM)二极管可具有夹于一对导电电极之间的一种或一种以上绝缘体材料。作为另一实例,一些类型的肖特基(Schottky)二极管可具有夹于一对导电电极之间的一种或一种以上半导体材料。
常规二极管构造将具有夹于导电电极之间的形成为薄平面的材料。在一些实施例中,认识到,如果二极管构造经制造以在两个导电电极之间具有波状形貌,则可相对于在两个导电电极之间具有平面形貌的二极管构造获得增强的电流流动。
参看图1描述作为构造10的一部分的实例实施例二极管12。构造10可由半导体晶片支撑,且因此可为半导体构造。
二极管12包含下部电极14、上部电极16及夹于下部电极与上部电极之间的中间二极管结构18。
下部电极14包含基座20及从基座向上延伸的一对突出物(或底座)22及24。基座包含基座材料21,且底座包含导电材料23。材料21及23在一些实施例中可为彼此相同的成分,且在其它实施例中,材料21及23在组成上可彼此不同。
上部电极16包含导电材料17。所述导电材料可与下部电极的材料21及23中的一者或两者相同,或在组成上可与材料21及23中的至少一者不同。
导电材料21、23及17可包含任何合适成分或成分的组合,且可(例如)包含以下各物、基本上由以下各物组成或由以下各物组成:各种金属(例如,钽、铂、钨、铝、铜、金、镍、钛、钼等)、含金属的成分(例如,金属氮化物、例如硅化钨或硅化钛的金属硅化物等)及导电掺杂半导体材料(例如,导电掺杂硅等)中的一者或一者以上。
中间二极管结构18可包含任何合适成分或成分的组合,且可为单一均质层(如图所示),或在其它实施例中可包含两个或两个以上相异层。如果二极管12为MIM,则中间二极管结构18可包含一种或一种以上电绝缘成分。举例来说,中间二极管结构18可包含以下各物、基本上由以下各物组成或由以下各物组成:选自由氮化铝、氧化铝、氧化铪、氧化镁、氧化铌、氮化硅、氧化硅、氧化钽、氧化钛、氧化钇及氧化锆组成的群组的一个或一个以上成分。依据主要成分而非依据具体化学计量来引用氧化物及氮化物。因此,将硅的氧化物称作氧化硅,其涵盖二氧化硅的化学计量。
如果二极管12利用肖特基二极管特性,则中间二极管结构18可包含以下各物、基本上由以下各物组成或由以下各物组成:一种或一种以上半导体材料(例如,硅);且上部电极及下部电极可包含以下各物、基本上由以下各物组成或由以下各物组成:一种或一种以上金属及/或含金属的成分。
可认为底座22及24分别包含顶部表面31及33;且分别包含侧壁表面35及37。基座20包含上部表面39,且底座的侧壁表面从基座的上部表面39延伸到底座的最上表面31及33。
表面31、33、35、37及39一起形成第一电极14的波状形貌。所述波状形貌具有对应于表面31及33的最高表面,且具有对应于表面39的最低表面。最高表面处于最低表面上方的距离“Q”处。所述距离可为(例如)至少约50纳米;在一些实施例中,可为从约50纳米到约500纳米;在一些实施例中,可为从约200纳米到约500纳米;且在一些实施例中,可为从约50纳米到约1微米。
如上文所论述,中间二极管结构18可包含一个或一个以上层。中间二极管结构18的总厚度可小于或等于距离“Q”的约百分之十。在一些实施例中,中间二极管结构18的厚度可为从约一纳米到约四纳米。
底座22具有宽度“W”。所述宽度在一些实施例中可小于或等于约50纳米。
电绝缘材料27处于基座20上方,且上部电极16至少部分地由所述绝缘材料支撑。绝缘材料27可包含任何合适成分或成分的组合,且可(例如)包含氮化硅、二氧化硅及硼磷硅玻璃中的一者或一者以上。
电极14及16与中间二极管结构18一起形成二极管。换句话说,第一电极14、第二电极16及中间二极管结构18一起形成结构,在一种极性的电压施加到所述结构时,所述结构导通第一电极与第二电极之间的电流,且在相反极性的电压施加到所述结构时,所述结构抑制第一电极与第二电极之间的电流流动。
图2展示图解说明图1中所展示的类型的二极管结构的电流流动对电压的实例实施例相依性的曲线图2。确切地说,可认为正电压为一种极性,且可认为负电压为相反极性。当施加正电压时,存在通过所述结构的高电流流动,且当施加负电压时,存在通过所述结构的相对小的电流流动。一双实例数据点“x”及“-x”展示于电压刻度上。尽管图2的实施例在施加正电压时展示增大的电流流动且在施加负电压时展示阻抗,但在其它实施例中,在施加负电压时可出现增大的电流流动且在施加正电压时可出现阻抗。
如上文所论述,中间二极管结构18可包含多个层。所述层可经带隙工程设计以产生所要二极管性质。图3展示实例实施例,其中中间二极管结构18包含经工程设计以产生所要二极管性质的三个层3、5及7。确切地说,图3展示二极管12在未加偏压条件(图40)、加正向偏压条件(图42)及加反向偏压条件(图44)下的带隙图。图40及图44展示,在未加偏压条件下及在加反向偏压条件下,来自介电材料3、5及7的带排除载流子在导电材料23与17之间的迁移。相比来说,图42展示,可能会在加正向偏压条件下出现隧穿,使得载流子(确切地说,在所展示的实施例中的电子)可从导电材料23经由量子阱43隧穿到导电材料17。通过图3中的虚线箭头45来图解说明电子的流动。
可认为图3的带结构为带隙工程设计结构。第III/V族材料的分子束外延(MBE)生长可形成异质结构。在介电材料中,如对于非易失性存储器单元(例如,“脊状势垒”(crested barrier)单元及VARIOT闪存单元)为已知的,可经由热处理(例如,氧化铝的热处理)来工程设计带隙。带隙工程设计结构可利用半导体中的载流子输送中的带边缘不连续的特性,及/或可利用电介质的电荷存储中的带边缘不连续的特性。
图1的二极管12为一个实例实施例二极管。在图4到图6中展示其它实例实施例二极管。
图4展示包含二极管52的构造50的一部分。构造50可为半导体构造。二极管52包括下部电极54,所述下部电极54包含基座60及从所述基座向上延伸的单一底座62。所述二极管还包括上部电极56及在上部电极与下部电极之间的中间二极管结构18。下部电极的基座60及底座62可包含上文参看图1对于基座20及底座22及24所论述的成分中的任一者;且图4的上部电极56可包含上文参看图1对于上部电极16所论述的成分中的任一者。绝缘材料27支撑上部电极的多个部分。底座62可具有适用于利用常规图案化的制造的宽度。
图5展示包含二极管72的构造70的一部分。构造70可为半导体构造。二极管72包括下部电极74,所述下部电极74包含基座80及从所述基座向上延伸的多个底座82、84及86。所述二极管还包括上部电极76,且包含在上部电极与下部电极之间的中间二极管结构18。下部电极的基座80及底座82、84及86可包含上文参看图1对于基座20及底座22及24所论述的成分中的任一者;且图5的上部电极76可包含上文参看图1对于上部电极16所论述的成分中的任一者。绝缘材料27支撑上部电极的多个部分。底座82、84及86可具有适用于利用常规图案化的制造的宽度;且所述底座中的至少一者可具有与所述底座中的至少另一者不同的宽度(如图所示),或在其它实施例中,所有所述底座可具有彼此相同的宽度。
图6展示包含二极管102的构造100的一部分。构造100可为半导体构造。二极管102包括下部电极104,所述下部电极104包含基座110及从所述基座向上延伸的多个底座112、114、116、118、120及122。所述二极管还包括上部电极106,且包含在上部电极与下部电极之间的中间二极管结构18。下部电极的基座110及底座112、114、116、118、120及122可包含上文参看图1对于基座20及底座22及24所论述的成分中的任一者;且图6的上部电极106可包含上文参看图1对于上部电极16所论述的成分中的任一者。绝缘材料27支撑上部电极的多个部分。底座112、114、116、118、120及122对于利用常规图案化的制造可能过窄,且替代地,可通过植入晶种随后在晶种上方生长多个列而形成,如下文参看图14到图17所论述。
上文所描述的二极管可由任何合适方法形成。参看图7到图10来描述用于形成与图1的二极管相似的二极管的实例方法。
参看图7,在一处理阶段处展示构造10,在所述处理阶段中,绝缘材料27在基座20上方形成,且经图案化以具有延伸穿过其的开口120。材料27的图案化可包含光刻处理。确切地说,材料27可形成为跨越基座20的均匀膨胀区域(uniform expanse),光刻图案化的光致抗蚀剂掩模(未图示)可形成于材料27上方,一图案可通过一次或一次以上合适蚀刻从所述光致抗蚀剂掩模转印到材料27,且可接着移除所述光致抗蚀剂掩模以保留图7的所展示构造。
参看图8,导电材料23跨越材料27且在开口120内形成。所述导电材料部分地填充所述开口以使所述开口变窄。间隔物材料122在变窄的开口内形成为沿着变窄的开口的侧壁的一对间隔物123。可通过首先跨越材料27且在开口120内形成间隔物材料122的连续层且接着使所述间隔物材料经受各向异性蚀刻以移除所述间隔物材料的大部分同时保留所展示的间隔物来制造所述间隔物。
参看图9,说明在利用间隔物123(图8)作为图案化材料23的掩模之后及在随后移除所述间隔物之后的构造10。
参看图10,通过在材料23及27上方且在开口120内沉积一个或一个以上层来形成中间二极管结构18;且随后在中间二极管结构18上方形成第二电极16。可通过任何合适方法来形成中间二极管结构18的所述一个或一个以上层。如果通过原子层沉积(ALD)来形成中间二极管结构18的所述层,则所述层可跨越下伏材料形成为非常保形的。
图10的构造包含与图1的二极管12类似的二极管124。如同图1的二极管12,二极管124包含材料23的从基座20向上延伸的底座22及24。
在一些实施例(未图示)中,底座的材料23可经图案化有掩模而非图8的间隔物,以使得材料23中的一些得以保留以在底座22与24之间的间隙126中跨越基座延伸。在一些实施例中,可省略间隔物123(图8),且衬垫23可经各向异性蚀刻以形成突出物22及24。
图11到图13说明用于形成图4的二极管52的实例方法。
参看图11,在一处理阶段处展示构造50,在所述处理阶段中绝缘材料27在基座60上方形成且经图案化以具有延伸穿过其的开口130。材料27的图案化可包含光刻处理,如上文关于图7所论述。间隔物材料131在开口130内形成,且经图案化成一对间隔物135。可通过首先跨越材料27且在开口130内形成间隔物材料131的连续层且接着使所述间隔物材料经受各向异性蚀刻以移除所述间隔物材料的大部分同时保留所展示的间隔物来制造所述间隔物。变窄的开口133延伸于间隔物135之间。
参看图12,展示在于间隔物135(图11)之间的变窄的开口133(图11)内形成导电材料132之后且在随后移除所述间隔物之后的构造50。开口136及138处于移除所述间隔物的位置中。可认为图12的构造具有材料132的从基座60向上突出的底座62。
参看图13,通过在材料60、132及27上方沉积一个或一个以上层来形成中间二极管结构18;且随后在中间二极管结构18上方形成第二电极56以完成二极管52的形成。可通过包括(例如)ALD的任何合适方法来形成中间二极管结构18的所述一个或一个以上层。
图14到图17说明用于形成与图6的二极管102相似的二极管的实例方法。
参看图14,在一处理阶段处展示构造100,在所述处理阶段中绝缘材料27在基座110上方形成且经图案化以具有延伸穿过其的开口150。跨越绝缘材料27且在开口150内形成材料152的一层。在一些实施例中,材料152为牺牲材料,且因此所述材料可包含相对于构造100的其它成分可选择性地移除的任何成分。举例来说,在一些实施例中,材料152可包含以下各物、基本上由以下各物组成或由以下各物组成:二氧化硅、氮化硅或氮氧化硅。
参看图15,材料152经各向异性蚀刻以将材料形成为侧壁间隔物154。侧壁间隔物154在开口150的周边处沿着材料27的侧壁,且使所述开口变窄。所述开口经展示具有第一宽度153,且所述绝缘材料经展示使所述宽度变窄为第二宽度155。在一些实施例中,第一宽度153可为从约200纳米到约两微米,且侧壁间隔物154可具有从约50埃到约100埃的宽度,以使得第二宽度155为第一宽度的至少约百分之90。
参看图16,沿着开口150的底部使晶种材料156分散。在所展示的实施例中,沿着开口150的底部暴露导电基座110的上部表面,且使晶种材料直接在基座的所述上部表面上分散。侧壁间隔物152使晶种材料不直接倚靠绝缘材料27的侧面。
晶种材料可为导电的,且可(例如)为含金属的纳米晶体(例如,包含铂、镍、金、银、铜、钯、钨、钛、钌等中的一者或一者以上的纳米晶体)。术语“纳米晶体”在本文中用以指代具有小于或等于约10纳米的最大横截面尺寸的结晶材料(多晶的或单晶的)。晶种材料可由纳米晶体组成(换句话说,可由纳米晶体晶种组成),或可包含与比纳米晶体大的其它晶种材料组合的纳米晶体。
参看图17,移除间隔物154,且通过在晶种材料上方生长导电材料158而在晶种156(图16)上方形成导电底座112、114、116、118、120及122。导电材料可(例如)包含以下各物、基本上由以下各物组成或由以下各物组成:导电掺杂硅、碳及/或使用化学气相沉积(CVD)、等离子CVD、分子束外延(MBE)或任何其它合适沉积技术所形成的其它适当导电材料的纳米柱(nanorod)。
可认为底座112、114、116、118、120及122通过凹部(valley)彼此隔开,且可认为下部电极的表面的波状形貌在所述底座上方延伸且向下延伸到所述凹部中。
图17的底座112、114、116、118、120及122类似于图6的底座,区别在于图17的底座中的一些处于相对于其它底座不同的高度处,而图6的底座均具有相同高度。图6及图17因此说明类似但略有不同的实施例。
通过在底座112、114、116、118、120及122上方及之间沉积一个或一个以上层来形成中间二极管结构18;且随后在中间二极管结构18上方形成第二电极106以完成二极管102的形成。可通过包括(例如)ALD的任何合适方法来形成中间二极管结构18的所述一个或一个以上层。
参看图7到图17所描述的各种方法展示经形成的单二极管。所述单二极管可表示作为集成电路制造过程的一部分而同时形成的大量二极管。所述二极管可为(例如)存储器阵列或逻辑电路的一部分。因此,图7、图11及图14的单一开口120、130及150可分别表示同时经受相同处理的大量开口。
在一些实施例中,可组合以上所论述的实施例中的两者或两者以上。举例来说,图7到图9的处理可经利用以形成下部二极管电极的一对底座,且图11到图12的处理及/或图14到图17的处理可经利用以形成下部电极的额外底座。
根据各种实施例所形成的二极管可用于选择性地存取各种集成电路组件,例如存储器单元、逻辑装置等。可在例如时钟、电视、移动电话、个人计算机、汽车、工业控制系统、飞机等的各种各样的电子系统中利用包含所述二极管的集成电路。
Claims (38)
1.一种形成二极管的方法,其包含:
形成第一电极,所述第一电极包含从导电基座向上延伸的一个或一个以上导电底座;所述一个或一个以上底座具有顶部表面,且具有从所述基座延伸到所述顶部表面的侧壁表面;
跨越所述一个或一个以上底座的所述顶部表面及所述侧壁表面沉积一个或一个以上层;
在所述一个或一个以上层上方形成第二电极;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,在一种极性的电压施加到所述结构时,所述结构导通所述第一电极与第二电极之间的电流,且在具有与所述一种极性相反的极性的电压施加到所述结构时,所述结构抑制所述第一电极与第二电极之间的电流流动。
2.根据权利要求1所述的方法,其中所述沉积所述一个或一个以上层包含原子层沉积。
3.根据权利要求1所述的方法,其中所述形成所述第一电极包含:
跨越所述导电基座形成绝缘材料;
图案化开口,所述开口穿过所述绝缘材料延伸到所述导电基座;
用导电材料为所述开口加衬;以及
将所述衬垫图案化到所述一个或一个以上底座中的至少一者中。
4.根据权利要求1所述的方法,其中所述形成所述第一电极包含:在所述基座上方生长所述一个或一个以上底座。
5.根据权利要求1所述的方法,其中所述一个或一个以上底座是与所述基座相同的成分。
6.根据权利要求1所述的方法,其中所述一个或一个以上底座包含所述基座未包含的至少一种成分。
7.根据权利要求1所述的方法,其中所述一个或一个以上层是至少两个层。
8.根据权利要求1所述的方法,其中所述一个或一个以上层仅是一个层。
9.一种形成二极管的方法,其包含:
形成具有波状形貌的第一电极,所述波状形貌包含最低表面及最高表面;所述最高表面处于所述最低表面上方的一距离处;
跨越所述波状形貌保形地沉积一个或一个以上层,所述一个或一个以上层一起具有小于或等于所述距离的约10%的厚度;
在所述一个或一个以上层上方形成第二电极;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,在跨越所述第一电极及第二电极施加第一电压时,所述结构导通从所述第一电极到所述第二电极的电流,且在跨越所述第一电极及所述第二电极施加具有与所述第一电压的极性相反的极性的第二电压时,所述结构抑制电流从所述第二电极流到所述第一电极。
10.根据权利要求9所述的方法,其中所述形成所述第一电极包含:
在导电基座上方且直接倚靠所述导电基座而形成导电材料;以及
蚀刻所述导电材料以将所述导电材料形成为从所述基座向上延伸的至少一个突出物。
11.根据权利要求10所述的方法,其进一步包含:
在所述基座上方形成经图案化的绝缘材料,所述经图案化的绝缘材料具有穿过其延伸到所述基座的至少一个开口;
在所述至少一个开口内形成所述导电材料作为衬垫;且
其中所述蚀刻包含各向异性地蚀刻所述衬垫以形成所述至少一个突出物。
12.根据权利要求10所述的方法,其中所述导电材料包含与所述基座相同的成分。
13.根据权利要求10所述的方法,其中所述导电材料包含与所述基座不同的成分。
14.根据权利要求9所述的方法,其中所述形成所述第一电极包含:
蚀刻开口,所述开口延伸穿过绝缘材料且延伸到导电基座;
沿着所述开口的侧壁形成至少一个侧壁间隔物以使所述开口变窄,所述基座沿着所述变窄的开口的底部暴露;
沿着所述变窄的开口的所述底部使晶种材料分散;以及
从所述分散的晶种材料生长底座,所述底座通过凹部彼此隔开,所述波状形貌延伸跨越所述底座及凹部。
15.根据权利要求14所述的方法,其中所述分散的晶种材料由纳米晶体晶种组成。
16.根据权利要求14所述的方法,其进一步包含在使所述晶种材料分散之后移除所述至少一个侧壁间隔物。
17.根据权利要求9所述的方法,其中所述保形地沉积所述一个或一个以上层包含原子层沉积。
18.根据权利要求9所述的方法,其中所述距离是至少约50纳米。
19.根据权利要求18所述的方法,其中所述厚度是从约1纳米到约4纳米。
20.一种形成二极管的方法,其包含:
形成第一电极,所述第一电极包含从基座向上延伸的两个或两个以上突出物;所述突出物通过延伸到所述基座的上部表面的至少一个间隙彼此隔开;
跨越所述突出物且在所述至少一个间隙内沉积一个或一个以上层;
在所述一个或一个以上层上方形成第二电极;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,在一种极性的电压施加到所述结构时,所述结构导通所述第一电极与第二电极之间的电流,且在具有与所述一种极性相反的极性的电压施加到所述结构时,所述结构抑制所述第一电极与第二电极之间的电流流动。
21.根据权利要求20所述的方法,其中所述形成所述第一电极包含:
在所述基座上方形成经图案化的绝缘材料,所述经图案化的绝缘材料具有穿过其延伸到所述基座的至少一个开口;
在所述至少一个开口内形成导电材料;以及
蚀刻所述导电材料以形成所述突出物。
22.根据权利要求20所述的方法,其中所述形成所述第一电极包含:
在所述基座上方形成经图案化的绝缘材料,所述经图案化的绝缘材料具有穿过其延伸到所述基座的至少一个开口;
在所述至少一个开口内形成导电材料作为衬垫;以及
蚀刻所述衬垫以形成所述突出物。
23.根据权利要求20所述的方法,其中所述形成所述第一电极包含:
蚀刻开口,所述开口延伸穿过绝缘材料且延伸到所述基座;
沿着所述开口的侧壁形成至少一个侧壁间隔物以使所述开口变窄,所述基座沿着所述变窄的开口的底部暴露;
沿着所述变窄的开口的所述底部使晶种材料分散;以及
从所述分散的晶种材料生长底座。
24.一种二极管,其包含:
第一电极,其包含从基座向上延伸的至少一个底座;所述至少一个底座具有顶部表面,且具有从所述基座延伸到所述顶部表面的侧壁表面;
一个或一个以上层,其跨越所述至少一个底座的所述顶部表面及所述侧壁表面;
第二电极,其在所述一个或一个以上层上方;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,所述结构经配置以在一种极性的电压施加到所述结构时导通所述第一电极与第二电极之间的电流,且所述结构经配置以在具有与所述一种极性相反的极性的电压施加到所述结构时抑制所述第一电极与第二电极之间的电流流动。
25.根据权利要求24所述的二极管,其中所述一个或一个以上底座是与所述基座相同的成分。
26.根据权利要求24所述的二极管,其中所述一个或一个以上底座包含所述基座未包含的至少一种成分。
27.根据权利要求24所述的二极管,其中所述一个或一个以上层是至少两个层。
28.根据权利要求24所述的二极管,其中所述一个或一个以上层仅是一个层。
29.一种二极管,其包含:
具有波状形貌的第一电极,所述波状形貌包含最低表面及最高表面;所述最高表面处于所述最低表面上方的一距离处;
跨越所述波状形貌的一个或一个以上层,所述一个或一个以上层一起具有小于或等于所述距离的约10%的厚度;
在所述一个或一个以上层上方的第二电极;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,所述结构经配置以在跨越所述第一电极及第二电极施加第一电压时导通从所述第一电极到所述第二电极的电流,且所述结构经配置以在跨越所述第一电极及所述第二电极施加具有与所述第一电压的极性相反的极性的第二电压时抑制电流从所述第二电极流到所述第一电极。
30.根据权利要求29所述的二极管,其中所述一个或一个以上层是至少两个层。
31.根据权利要求29所述的二极管,其中所述一个或一个以上层仅是一个层。
32.根据权利要求29所述的二极管,其中所述距离是至少约50纳米。
33.根据权利要求32所述的二极管,其中所述厚度是从约1纳米到约4纳米。
34.一种二极管,其包含:
第一电极,其包含从基座向上延伸的两个或两个以上突出物;所述突出物通过延伸到所述基座的上部表面的至少一个间隙彼此隔开;
一个或一个以上层,其跨越所述突出物且在所述至少一个间隙内;
第二电极,其在所述一个或一个以上层上方;且
其中所述第一电极、一个或一个以上层及第二电极一起形成结构,所述结构经配置以在一种极性的电压施加到所述结构时导通所述第一电极与第二电极之间的电流,且所述结构经配置以在具有与所述一种极性相反的极性的电压施加到所述结构时抑制所述第一电极与第二电极之间的电流流动。
35.根据权利要求34所述的二极管,其中所述一个或一个以上突出物是与所述基座相同的成分。
36.根据权利要求34所述的二极管,其中所述一个或一个以上突出物包含所述基座未包含的至少一种成分。
37.根据权利要求34所述的二极管,其中所述一个或一个以上层是至少两个层。
38.根据权利要求34所述的二极管,其中所述一个或一个以上层仅是一个层。
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US8889538B2 (en) | 2008-06-18 | 2014-11-18 | Micron Technology, Inc. | Methods of forming diodes |
US9520478B2 (en) | 2008-06-18 | 2016-12-13 | Micron Technology, Inc. | Methods of forming diodes |
CN112563273A (zh) * | 2019-09-25 | 2021-03-26 | 南亚科技股份有限公司 | 半导体元件及其制备方法 |
CN112563273B (zh) * | 2019-09-25 | 2024-06-18 | 南亚科技股份有限公司 | 半导体元件及其制备方法 |
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US20110068325A1 (en) | 2011-03-24 |
US9397187B2 (en) | 2016-07-19 |
WO2009154935A2 (en) | 2009-12-23 |
CN102067321B (zh) | 2013-04-24 |
EP2289104A2 (en) | 2011-03-02 |
US20210313445A1 (en) | 2021-10-07 |
US7858506B2 (en) | 2010-12-28 |
US11916129B2 (en) | 2024-02-27 |
KR101221155B1 (ko) | 2013-01-21 |
US20090315020A1 (en) | 2009-12-24 |
US8273643B2 (en) | 2012-09-25 |
US20150072523A1 (en) | 2015-03-12 |
WO2009154935A3 (en) | 2010-03-18 |
US20120329210A1 (en) | 2012-12-27 |
EP2289104A4 (en) | 2012-10-03 |
EP2289104B1 (en) | 2018-12-12 |
KR20110011692A (ko) | 2011-02-08 |
US8889538B2 (en) | 2014-11-18 |
US20160087071A1 (en) | 2016-03-24 |
US20170069732A1 (en) | 2017-03-09 |
TW201003791A (en) | 2010-01-16 |
TWI389213B (zh) | 2013-03-11 |
US9520478B2 (en) | 2016-12-13 |
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