CN102017089A - 改善在介电层和导电层间的黏着力与电致迁移性的方法 - Google Patents
改善在介电层和导电层间的黏着力与电致迁移性的方法 Download PDFInfo
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Abstract
所提供为一种处理基板的方法与设备。处理基板的方法包含:提供一含有导电材料的基板;在导电材料上执行一前处理工艺;流入一硅系化合物至该导电材料上,以形成一硅化物层;在该硅化物层上执行一后处理工艺;以及沉积一阻障介电层在该基板上。
Description
技术领域
本发明的具体实施方式与制造集成电路有关,且特别是有关于处理基板的方法和设备,包含在导电材料和阻障介电材料之间沉积氮硅化金属(metal nitrosilicide)以增进附着力,并改善导电材料和阻障介电材料之间的电致迁移性。
背景技术
集成电路已进展成复杂的组件,在单一芯片上可包含百万个组件(如,晶体管、电容和电阻)。芯片设计的演进持续需要更快的电路和更大的电路密度。对于更大电路密度的需求驱使集成电路组件尺寸不断缩小。
当集成电路组件的尺寸缩小时(如,次微米等级),用以制造这种组件的材料会对组件的电性执行效能产生影响。例如,做为集成电路中组件间的导电路径的低电阻金属内连接材料(即,铝和铜)。
形成垂直和水平内连接的方法之一是形成镶嵌(damascene)或双镶嵌(dual damascene)结构。在镶嵌结构中,沉积并图案化一或多种介电材料(例如低介电常数(low k)的介电材料),以形成垂直内连接(即,通孔(vias))和水平内连接(即,线路)。之后,在被蚀刻的图形中镶嵌上导电材料(例如,含铜材料)和其它材料(例如,阻障层材料,使用于防止含铜材料扩散进周围的低介电常数材料中)。之后会移除蚀刻图形外(例如,在基板的线路间的区域内)过多的含铜材料和阻障层材料,以形成平坦的表面。为了后续的工艺(例如形成第二层的垂直和水平内连接),在铜特征图案上形成可作为绝缘层或阻障层的介电层。
然而据观察,这种具有优秀电性效能的介电层,对于铜特征结构的黏合力却不佳。这种介电层和铜特征结构之间的不良黏合情况,会使邻连的金属内导线之间发生耦合而产生了高电容且造成串音(cross-talk)、电阻-电容延迟(resistance-capacitance delay,RC delay)、和电致迁移等缺陷,因而降低了整体的集成电路执行效能。
因此,需要一种改进中间层附着性,同时改进低介电常数的介电层与下层铜特征结构之间电致迁移力的方法。
发明内容
一般而言,本发明提供一种处理基板的方法。在一个具体实施方式中,此方法包含提供一具有导电材料的基板;在该导电材料上进行一前处理工艺;流入一硅系化合物至该导电材料上以形成一硅化物层;在该硅化物层上进行一后处理工艺;以及沉积一阻障介电层至该基板上。
在另一具体实施方式中,一种用以处理基板的方法包含:提供一具有导电材料的基板;流入一硅系化合物至该导电材料的表面以形成一硅化物;以一含氮等离子处理该基板,藉以形成一氮硅化金属层;及沉积一阻障层至该基板上。
在另一具体实施方式中,一种用以处理基板的方法包含:提供一具有导电材料的基板;以氨气在该导电材料上进行一氮前处理工艺;流入一硅烷气体至该导电材料的表面上,以形成一硅化物;以一含有氨气的等离子处理该硅化物,藉以形成一氮硅化金属;及沉积一包含碳化硅的阻障介电层在该氮硅化金属上。
附图说明
为了增进对于上述的本发明的特征结构的了解,特将本发明的一些具体实施方式被绘制成附图。然而需要注意的是,附图是依据本发明的典型的实施样态所绘示,并非用以限制本发明的范围,本发明也适用其它同样有效的实施态样。
图1A-1D是依据本发明一具体实施方式所绘示的一具体实施方式的剖面图,表示双镶嵌沉积顺序;
图2为工艺流程图,绘示出在导电层上沉积氮硅化金属层的方法;
图3A-3D绘示出形成于导电层之上的氮硅化金属层的剖面图;及
图4为典型用以实现本发明的示范性处理腔室剖面简图。
为了助于了解本发明,在图标中使用数字代表特定的组件,且在所有图标中,相同数字表示相同的组件。任何一个具体实施方式中的组件和/或工艺步骤可使用于其它的具体实施方式中,不另外加以注释。
具体实施方式
一般而言,本发明的具体实施方式提供一种处理基板的方法,包含于导电材料上沉积阻障介电层之前,进行一系列的流入硅烷和等离子处理工艺。在这种具体实施方式中,此方法包含进行以下工艺:前处理工艺、形成硅化物工艺、和在导电层上进行氮的后处理工艺,以在沉积阻障介电层之前,形成氮硅化金属。氮的前处理工艺有助于移除基板表面的氧化物和污染物。在前处理工艺之后,可形成导电材料的硅化物。之后,于硅化物上进行氮气等离子处理工艺,以在形成阻障介电层之前,先形成氮硅化金属。可视情况任选以此氮硅化物作为接口层。在此具体实施方式中,硅化物的材料为硅化铜,且氮硅化金属为CuSiN。在此具体实施方式中,导电材料为铜,且阻障介电材料为碳化硅。
虽然下面的说明详细地描述了用以改善双镶嵌结构中导电材料和阻障层介电层材料间的接口黏合和电致迁移的等离子工艺顺序,但本发明不应被解释和限制于所绘示的实例,其它结构、形成过程、和直接沉积工艺皆可使用在此所述的黏合和电致迁移态样。
下面所述的沉积工艺,使用的是300mm的双沉积平台处理腔室,并将以此进行说明。例如,流速为整体的流速,且应除以2,方能表示每一个腔室中沉积平台内的工艺流速。另外应注意的是,在各种腔室中,进行不同尺寸基板处理的时(在实例中为300mm基板),各种等离子工艺的参数应进行调整。另外,虽然下面是有关于铜、碳化硅、氮硅化铜工艺的描述,本发明认为这种工艺可用于改善其它导电和阻障介电层材料之间的黏合和电致迁移的情况。
图1绘示形成于基板100上的镶嵌结构,具有形成于绝缘材料105中的金属特征结构107。第一碳化硅阻障层110一般沉积在绝缘材料105上,适以避免绝缘材料105(位于基板100之上)和随后沉积的材料之间发生层间扩散(inter-level diffusion)。在一具体实施方式中,碳化硅阻障层的介电常数约小于或等于5,例如约小于4。
第一碳化碳阻障层110的碳化硅材料中掺杂了氮和/或氧。在阻障层110之上,可视情况而定沉积不含氮的碳化硅或氧化硅的覆盖层(cappinglayer)(未绘示)。通过调整工艺气体的组成,可在原位(in-situ)沉积不含氮的碳化硅层或氧化硅覆盖层。在一实例中,通过将含氮气体的量减至最低或完全移除含氮气体,可在第一碳化硅阻障层110之上,原位沉积不含氮的碳化硅。在另一实例中(未绘示),可在第一碳化硅阻障层110之上沉积一层起始层(initiation layer)。在美国专利号7,030,041的文件中更完整地描述了起始层,该专利名称为“用于低K介电质的附着改善方式”,其全文在此并入做为参考。
依据所欲制造结构的尺寸而定,通过将有机硅化物(可包含三甲基硅烷和/或八甲基环四硅氧烷(octamethylcyclotetrasiloxane))氧化,而可在碳化硅阻障层110之上沉积厚度约为至约的第一介电层112。之后,以等离子或电子束工艺进行第一介电层112的后处理。视情况任选,可经由增加在碳氧化硅沉积工艺中的氧浓度,以去除沉积材料中的碳,从而在第一介电层112之上,原位沉积一层氧化硅覆盖层(未绘示)。第一介电层也可包含其它低介电常数(low k)介电材料,例如低聚合物材料,包含paralyne或低介电常数旋涂(spin-on)玻璃,例如无掺杂硅玻璃(un-dopedsilicon glass,USG)或掺氟硅玻璃(fluorine-doped silicon glass,FSG)。接着,以等离子处理第一介电层。
之后,在第一介电层112之上沉积一层视情况任选的低介电常数材料(或第二阻障层)114,例如,可掺杂氮或氧的碳化硅。在第一介电层112上所沉积的低介电常数蚀刻终止层114,厚度约为至约可使用在此所述的碳化硅材料或碳氧化硅材料所用的等离子来处理此视情况任选的低介电常数蚀刻终止层114。接着将低介电常数蚀刻终止层114图形化,以定义数个接点(contact)/通孔(via)116的开口,且暴露待形成接点/通孔116的区域中的第一介电层112。在一个具体实施方式中,低介电常数蚀刻终止层114使用一般的光微影技术(photolithography)进行图形化,且在蚀刻工艺中使用了氟、碳、和氧离子。在沉积其它材料之前,可于低介电常数蚀刻终止114上沉积一层视情况任选的不含氮的碳化硅或氧化硅覆盖层(介于至约)(未绘示)。
参考图1B,在光阻材料被移除之后,可在图形化的视情况任选的蚀刻终止层114和第一介电层112上,沉积一层氧化有机硅烷或有机硅氧烷的第二介电层118。第二介电层118包含碳氧化硅,其是以此所述方式从氧化的有机硅烷或有机硅氧烷,例如三甲基硅烷,沉积至厚度约为5,000至约所形成的。之后,以等离子或电子束处理第二介电层118,和/或于其上配置一层氧化硅覆盖材料。
如图1B所示,在第二介电层118(或覆盖层)之上沉积光阻材料122,并以习知的光微影工艺或其它合适的工艺进行图形化,以定义内连接线120。视情况可在光阻材料122和第二介电层118之间加入抗反射层(anti-reflection coating,ARC)层和蚀刻光罩层(例如硬光罩层)(未绘示),以帮助将图形和特征结构转移至基板100。光阻材料122包含本技术中已知的一般材料,在一实例中为高活化能光阻材料(high activation energyresist material),例如UV-5,购自美国麻州马尔堡的Shipley公司。之后,使用反应离子蚀刻或其它非等向性蚀刻技术蚀刻内连接和接点/通孔,以定义出金属化结构(即,内连接和接点/通孔),如第1C图所示。并以氧气剥除(oxygen strip)或其它合适的工艺来除去任何用来使蚀刻终止层114或第二介电层118图形化的光阻材料或其它材料。
之后,以导电材料(例如铝、铜、钨或其组合)来形成金属化结构。因为铜的电阻系数较低,所以现在的趋势是使用铜去形成更小的特征结构(铜的电阻系数为1.7mΩ-cm,铝为3.1mΩ-cm)。在一具体实施方式中,首先以金属化图形同形(conformal)沉积出一层合适的金属阻障层124,例如氮化钽,以防止铜迁移至周围的硅和/或介电材料中。之后,使用化学气相沉积、物理气相沉积、电镀、或上述技术的组合等来进行铜的沉积,以形成导电结构。当结构被以铜或其它导电金属填充后,使用化学机械式抛光方式进行表面平坦化,以露出此具有导电金属特征结构126的表面,如图1D中所示。
图2是依据本发明的一具体实施方式所绘示的工艺方法流程图,示出在基板100上形成薄接口层的方法200。此方法以步骤202开始,提供一含有导电材料126的基板100,该基板100之上具有一外露的表面128,如图3A所示。导电材料126以Sn、Ni、Cu、Au、Al或上述材料的组合、或其它类似物制成。导电材料126也包含覆盖在诸如Cu、Zn、Al、或其它类似物等活性金属上的一耐腐蚀金属,例如Sn、Ni、或Au。在此具体实施方式中,基板100更包括含硅层、第一介电层122、和第二介电层118,围绕该导电材料126。在一具体实施方式中,形成在基板100上的第一介电层112和第二介电层118,为具有低介电常数的低k介电层(介电常数低于4.0,例如碳氧化硅)等等。在特定实施方式中,可使用碳氧化硅层(例如,BLACK购自美国加州圣塔克拉拉的应用材料公司)形成第一和第二介电阻障层112、118。在特定实施方式中,形成于基板100之上的导电材料126以及第一介电层112和第二介电层118包含镶嵌结构。
在步骤204中,执行具有含氮等离子前处理工艺以处理第二介电层118上表面和导电材料126的外露表面128的。前处理工艺有助于移除基板表面的金属氧化物、原生氧化层(native oxide)、微粒、或污染物。在一具体实施方式中,用以处理基板100的气体包含N2、N2O、NH3、NO2、和其类似物。在这里所示的具体实施方式中,用以进行第二介电层118和导电材料126的外露表面128之前处理的含氮气体为氨气(NH3)或氮气(N2)。
在一具体实施方式中,步骤204的前处理工艺的进行方式为,由供给至处理腔室中的一气体混合物来产生等离子。通过施加约0.03W/cm2至约3.2W/cm2的功率密度来产生等离子,对于300mm的基板而言,即为约10W至约1,000W的RF功率层级,例如,约为100W至约400W,频率为13MHz至14MHz之间的高频,例如,13.56MHz。在一个具体实施方式中,通过施加约0.01W/cm2至约1.4W/cm2的功率密度来产生等离子,对于300mm的基板而言,即约为10W至约1,000W的RF功率层级,在一实例中,约为100W至约400W,频率为13MHz至14MHz之间的高频,例如,13.56MHz。或者,由所述的双频RF功率源(如此所述)产生等离子。在一实例中,所有的等离子皆在远程产生,并将所产生的游离基导入处理腔室中,以进行沉积材料的等离子处理或进行材料层沉积。
在步骤206中,使硅系化物流经该导电材料126的已处理表面。如图3B所示,硅系化合物与导电材料126反应,进而在导电材料126之上形成硅化物142。来自硅系化合物的硅原子附着在基板100的导电材料126的表面且被该表面吸收,进而在基板100上形成硅化金属层142。在基板100上的导电材料126为铜的具体实例中,硅原子附着于铜表面上且被铜表面吸收,进而形成了硅化铜层在铜导电层表面126上。
供给导电材料126的预处理表面使用的硅系化合物可通过热工艺(即,不使用等离子)来执行。在这个特殊的具体实施方式中,硅化物沉积主要形成于导电材料表面上。热能有助于使硅系化合物中的硅原子,主要被于导电材料126的铜原子吸收,而在导电材料的表面形成硅化物层142。在另外的具体实施方式中,流入处理腔室的硅系化合物以等离子进行工艺,则可在基板100的整个表面上(例如,在导电材料126和介电材料118的表面上)沉积硅化物142。在导电材料126为铜层的具体实施方式中,形成于基板100上的硅化物层为硅化铜(CuSi)层。
硅系化合物可包含不含碳的硅化物,例如硅烷、二硅烷、和上述化合物的衍生物。硅系化合物也可包括含碳的硅化合物,包含这里所述的有机硅化合物,例如,三甲基硅烷(TMS)和/或二甲基苯基硅烷(DMPS)。硅系化合物可与外露的导电材料以热工艺进行反应,和/或在一实例中,以等离子增强工艺进行反应。氧和氮等掺质可与这里所述的硅系化合物一起使用。另外,可在硅化物工艺中使用惰性气体,例如钝气(包含氦和氩),其并可做为热工艺的载气(carrier gas)使用,或是作为等离子增强硅化物形成工艺的外加等离子物质使用。此硅系化合物更包含一掺质,例如这里所述的具有还原性的化合物,以形成氮硅化物。在这种具体实施方式中,还原性化合物可以这里所述的方式进行输送。
在一个具体实施方式中,硅系化合物流入处理腔室的流速约为40sccm至约5,000sccm,在一实例中,约为1000sccm至约2,000sccm之间。亦可视情况任选供给诸如氦、氩、氮等惰性气体到处理腔室中,流速约为100sccm至约20,000sccm,在一实例中,约为15,000sccm至约19,000sccm。处理腔室的压力被保持在约1torr至约8torr之间,例如,约3torr至约5torr之间。加热器温度保持在约100℃至约500℃之间,在一实例中,保持在约250℃至约450℃之间,例如低于300℃。气体分配器(或喷头)与基板表面之间的间距约为200mils至至约1,000mils之间,在一实例中,为约300mils至约500mils之间。硅化物层形成处理时间约为1秒至约20秒之间,在一实例中,为约2秒至约8秒之间。
在一个特殊的硅化物工艺实例中,硅烷以约125sccm的流速流入处理腔室中,氮气以约18,000sccm的流速流入处理腔室中,腔压保持在约4.2torr,加热器温度保持在350℃,气体分配器(或喷头)与基板之间的间距为约350mils,工艺时间约4秒。
在步骤208中,在硅化物层142上进行一后处理工艺,以形成氮硅化金属层140在基板100上,如图3C所示。在一具体实施方式中,接着,以含氮等离子处理硅化物142,进而形成氮硅化金属140。在一具体实施方式中,含氮等离子处理方式为在等离子存在下,将含氮气体流至硅化物层142,以处理硅化物142,将氮原子可被并入至硅化物层142表面,以此将硅化物层142转变为氮硅化物层140。合适的含氮气体例子包含N2、N2O、NH3、NO2、以及其它类似物。在这里所示的具体实施方式中,用于硅化物层142之后处理的含氮气体为氨气(NH3)。
在一具体实施方式中,氮硅化物层140作为接口层,以促进导电材料126与后续将被沉积的薄膜之间的黏合。氮硅化物层140的功能是作为一促黏层,作为导电材料126中的铜原子和步骤206的硅化物形成工艺中的硅和氮原子间的桥梁,进而于接口处形成强力键结。氮硅化物层140和导电材料126之间的强力键结,促进了导电材料126和后续将被沉积的阻障介电层146之间的黏合,进而可有效地改善内连结构和组件电致迁移间的整合。另外,氮硅化物层也可作为阻障层使用,防止其下方导电层扩散至邻接的介电层,因此可改善电致迁移特性和整体组件的电性效能。
步骤206中的硅化物形成工艺和步骤208中的等离子氮化后处理工艺皆是在不会负面影响膜层的电阻系数的情况下,以一种可改善接口间黏合以及组件间的电致迁移特性的方式来控制。将氮硅化金属层140形成至一理想厚度,使其足以作为有效的金属扩散阻障层,并且维持最小的金属电阻。在一具体实施方式中,氮硅化金属层的厚度小于约例如,约在至约间。从硅化金属形成工艺中而来的硅原子和等离子氮化工艺中的氮原子,与导电材料中的铜原子反应,在基板上形成氮硅化铜层,例如CuSiN。流入处理腔室并与铜原子反应的硅原子和氮原子,两者之间被控制在合适的比例和数量范围内,以形成具有理想薄膜性质的氮硅化物层140。据信从硅化物形成工艺中而来的硅原子量过多时,其不会与氮原子反应,会造成过多硅原子残留在金属导体的表面。在之后的退火或热处理工艺中,这些多出的硅原子会扩散到下面的金属导电材料126中,因此增加了金属的片电阻值(sheet resistance),并对组件的电性造成不利的影响。相反的,当硅原子的量不足时则会造成过多的氮原子残留于基板100上,因而在基板100之上形成不欲求的氮化铜团簇(cluster)。这种不受欢迎的氮化铜团簇会变成微粒缺陷的来源,弄脏并污染形成于基板上的薄膜。所以,在步骤206中和在步骤210中的等离子氮化后处理工艺,硅化物形成工艺的良好的工艺控制,是获得具有理想接口性质的氮硅化金属层140的必要条件。
在一具体实施方式中,在步骤206中所进行的硅化物形成工艺,和步骤208中所进行的等离子氮化后处理工艺的工艺时间,控制在约1∶5至约5∶1,例如约为1∶3至约3∶1间。在其它的具体实施方式中,在步骤206中的硅化物形成工艺的工艺时间,被控制在低于约10秒,例如低于约5秒,且在步骤208中的等离子氮化后处理工艺的工艺时间,被控制在低于约30秒,例如低于约15秒。在其它的具体实施方式中,在步骤206中的硅化物形成工艺的工艺时间少于在步骤208中所进行的等离子氮化后处理工艺的工艺时间。
含氮等离子的氮源为氮气(N2)、NH3、N2O、NO2、或上述的组合。等离子更包含惰性气体,例如氦、氩、或上述的组合。基板暴露于等离子时的压力为约1mtorr至约30mtorr之间,在一实例中约为1mtorr至约10mtorr之间。除了N2的外,其它含氮气体也可用于形成氮等离子,例如H3N的联胺(即,N2H4或MeN2H3)、胺(即,Me3N、Me2NH或MeNH2)、苯胺(即,C5H5NH2)、和叠氮(即,MeN3或Me3SiN3)。其它可用于DPN工艺的钝气,包含氦、氖和氙。氮化工艺的进行时间约为10秒至约360秒,例如,约从0秒至约60秒,例如,约15秒。
在步骤204中,选定用以进行后处理工艺的RF功率,被控制为实质类似于进行基板100前处理所使用的RF功率。在一具体实施方式中,通过施加功率密度范围在约0.03W/cm2至约3.2W/cm2之间的方式来产生等离子,对于300mm的基板而言,即RF功率层级介于约10W至约1,000W之间,例如,在高频时(频率为约13MHz至约14MHz之间,例如13.56MHz)约为100W至约600W之间。可通过施加功率密度范围在约0.01W/cm2至约1.4W/cm2之间的方式来产生等离子,对于300mm的基板而言,即RF功率层级介于约10W至约1,000W之间,例如,在高频时(频率为约13MHz至约14MHz之间,例如13.56MHz)约为100W至约400W之间。或者,可由双频率RF功率源(如这里所述)来产生等离子。或者,所有的等离子皆在远程产生,并将所产生的游离基导入处理腔室中,以进行沉积材料的等离子处理或进行材料层沉积。在一具体实施方式中,氮化工艺所导入的RF功率,设定在约300W至约2,700W,压力在约1mtorr至约100mtorr间。含氮气体的流速,约从0.1slm至约15slm间。在一具体实施方式中,包含氮气和氨气的气体混合物的含氮气体被供给至处理腔室中。被供给至腔室的氮气流速为约0.5slm至约1.5slm间,例如,约为1slm,而供给至腔室的氨气流速约为5slm至约15slm,例如约10slm。
个别和整体工艺气体气流可依据多种工艺参数,例如,处理腔室的尺寸,处理腔室的温度,进行处理的基板尺寸,来调整。处理腔室的压力保持在约1torr至约10torr之间,例如约2torr至约5torr之间,例如约3.7torr。加热器的温度保持在约100℃至约500℃之间,在一实例中,为约250℃至约450℃之间,例如低于约350℃。
在步骤210中,形成沉积一层阻障介电层146在基板100上形成的氮硅化金属140上。在特定实施方式中,阻障介电层146包含碳化硅材料或其它合适的介电材料。在氮硅化金属140形成之后,于其上形成阻障介电层146,例如碳化硅层。氮硅化金属层140和阻障介电层146的形成在原位(in-situ)进行。用于沉积阻障介电层(诸如碳化硅)的工艺描述于美国专利号6,537,733(其标题为“沉积低介电常数的碳化硅层的方法”)、美国专利号6,759,327(其标题为“使用具有大量有机官能基基团之前体沉积低K(k<4)阻障膜的方法”)以及美国专利号6,890,850(其标题为“沉积较低K的硬罩幕与蚀刻停止膜的方法”)的文件中,该等文件在此以全文并入做为参考,其全文与本说明书所请求的态样及所揭露者并无不一致之处。
在一具体实施方式中,在步骤208中所使用之后处理工艺的RF功率,在步骤210之中持续保持,且继续被用于阻障介电层沉积工艺中。或者,在步骤208中后处理工艺结束之后即关闭后处理工艺中所用的RF功率,并在步骤210中于阻障介电层沉积工艺时再重新打开。
需注意的是,步骤204中的前处理工艺、步骤206中的硅化物形成工艺,步骤208中的后处理工艺,和步骤210中的阻障介电层,为在单一腔室中的原位沉积。在一实例中,这些步骤可在不同的腔室中以各种不同的排列方式进行沉积。
图4为化学气相沉积腔室400的剖面简图,作为实行本发明的具体实施方式使用。这种腔室的一个例子为两个(可相同或不同)具有系统的腔室,购自美国加州圣塔克拉拉的应用材料公司。此完全相同的两腔室具有两个独立的处理区,用以处理两片基板(一个腔室处理一片),所以每一个处理区所使用的流速,接近于全部腔室中的流速的一半。在下面实例中所述的流速以及全部说明书中所述的流速,皆为处理300mm基板的流速。具有两个独立处理区的腔室进一步描述于美国专利号5,855,681的文件中,其全文在此并入作为参考。另一个腔室的例子为系统的腔室在中,购自应用材料公司。
化学气相沉积腔室(CVD)400具有一腔体402,其中规划了个别的处理区418、420。每一处理区418、420中皆具有一基座428以支撑基板,基板(未绘示)位于CVD腔室400之中。每一基座428一般包含加热组件(未绘示)。位于处理区418、420之中基座428,通过与驱动系统403连接的支架426(延伸通过腔体402的底部)进行移动。
每一处理区418、420包含气体分配组件408,穿过腔盖404,以将气体输送至处理区418、420中。每一处理区中的气体分配组件408,一般包含气体入口通道440,将气体从气流控制器419输送至气体分配歧管442(manifold)中,也就是喷头组件中。气流控制器419一般用于控制和调整进入腔室的不同工艺气体的流速。如果使用液体前体时,其它的流量控制组件可包含液体流注入阀门和液体流速控制器(未绘示)。气体分配歧管442包含环状底板448、面板(face plate)446、和介于底板448和面板446之间的阻隔板444。气体分配歧管442包含数个喷嘴(未绘示),在处理时气体混合物由此喷出。RF(射频)电源供应器425提供偏压至气体分配歧管442,以助于在气体分配歧管442和基座428之间产生等离子。在等离子辅助化学气相沉积工艺中,基座428做为RF阴极,以在腔体402内产生RF偏压。阴极电性耦接于一电极功率供应器,以在沉积腔室400中产生电容性电场。一般施加RF电压至阴极时,腔体402为接地。施加在基座428上的功率产生了基板偏压,以负电压的形式存在于基板的上表面。这种负电压用以吸引形成于腔室400中的等离子离子至基板的上表面。
在工艺时,工艺气体为径向(radial)均匀分布于基板表面。将RF电源供应器425的RF能量施加至气体分配歧管442(做为具有功率的电极),以由一或多种工艺气体或一种气体混合物形成等离子。当等离子和所流入的反应性气体与基板接触时,薄膜沉积即开始进行。腔壁412一般为接地。RF电源供应器425可提供单一或混合频率的RF讯号至气体分配歧管442,以增进任何流入处理区418、420的气体的分解。
系统控制器434控制各种组件的功能,例如RF电源供应器425、驱动系统403、抬升机制406、气流控制器419、和其它相关的腔室和/或工艺功能。系统控制器434执行储存于内存438(在较佳的具体实施方式中为硬盘)之中的系统控制软件,且可包含模拟和数字流入/输出电路板、接口板、和步进马达控制电路板。一般使用光学和/或磁性传感器以移动和测定移动式机械组件的位置。
上面对于CVD系统的描述主要是为了增进对附图的了解图标,其它的等离子处理腔室也可用以实现本发明的具体实施方式。
实施例:在一个实例中,经由在基板的导电表面上进行NH3等离子处理,CuSiN的薄膜被直接形成于基板之上。之后,将SiH4导入至Cu表面之上,且接下来以NH3等离子进行后处理。CuSiN层作为导电材料和待沉积的阻障介电层之间(例如碳化硅)的接口促黏层和电致迁移改善层。在基板上形成CuSiN之后,直接将阻障介电层沉积在CuSiN之上,可增强吸附并改善电致迁移,并将电阻率保持在理想的范围中。
上述为本发明的具体实施方式,在不脱离基本范围的情况下,可建议其它或更进一步的有关于本发明的具体实施方式,本发明的范围决定于权利要求。
权利要求书(按照条约第19条的修改)
1.一种处理包含导电材料的基板的方法,包含:
在该导电材料上执行一前处理工艺;
流入一第一气体混合物于配置在该基板上的该导电材料上,该第一气体混合物包含一硅系化合物;
从该第一气体混合物形成一硅化物层于该基材上;
在该第一气体混合物后,流入一第二气体混合物以在由该第一气体混合物形成的该硅化物层上执行一后处理工艺,该第二气体混合物包含氨气;及
沉积一阻障介电层在该基板上。
2.如权利要求1所述的方法,其中该导电材料包含铜。
3.如权利要求1所述的方法,其中该硅化物层包含氮化硅。
4.如权利要求1所述的方法,其中该阻障层包含碳化硅。
5.如权利要求1所述的方法,其中该执行后处理工艺的步骤包含:
对该导电材料的该表面执行一等离子氮化工艺。
6.如权利要求5所述的方法,其中该执行后处理工艺的步骤包含:
形成一氮硅化金属层在该基板上。
7.如权利要求6所述的方法,其中该氮硅化金属层为氮硅化铜层。
9.一种处理包含导电材料的基板的方法,包含:
流入一第一气体混合物于该导电材料的表面上,该第一气体混合物包含一硅系化合物;
从该第一气体混合物形成一硅化物层于该基板上;
在该第一气体混合物后,流入包含氨气的一第二气体混合物,以用存在于该第二气体混合物中的一等离子处理该硅化物层,以形成一氮硅化金属层;及
沉积一阻障层在该基板上。
10.如权利要求9所述的方法,其中该导电材料包含铜,且该硅化物层包含氮化硅。
11.如权利要求9所述的方法,其中该阻障层包含碳化硅。
12.如权利要求9所述的方法,其中该氮硅化金属层包含氮硅化铜。
13.如权利要求9所述的方法,其中该等离子是通过施加RF功率至该第二气体混合物而形成的。
14.如权利要求13所述的方法,其中施加RF功率的步骤包含:
在该基板上形成该氮硅化金属层时,维持该RF功率。
15.一种处理包含导电材料的基板的方法,包含:
通过将该导电材料暴露至氨气来执行一氮前处理工艺;
流入包含硅烷气体的一第一气体混合物至该导电材料的表面上;
从该第一气体混合物形成一硅化物层于该基板表面上;
以含氨气的等离子来处理该硅化物层,以形成一氮硅化金属;及
沉积一阻障介电层于该氮硅化物上,其中该阻障介电层包含碳化硅。
Claims (15)
1.一种处理基板的方法,包含:
提供一基板,其包含一导电材料;
在该导电材料上执行一前处理工艺;
流入一硅系化合物至该导电材料上以形成一硅化物层;
在该硅化物层上执行一后处理工艺;及
沉积一阻障介电层在该基板上。
2.如权利要求1所述的方法,其中该导电材料包含铜。
3.如权利要求1所述的方法,其中该硅化物层包含氮化硅。
4.如权利要求1所述的方法,其中该阻障层包含碳化硅。
5.如权利要求1所述的方法,其中该执行后处理工艺的步骤包含:
对该导电材料的该表面执行一等离子氮化工艺。
6.如权利要求5所述的方法,其中该执行后处理工艺的步骤包含:
形成一氮硅化金属层在该基板上。
7.如权利要求5所述的方法,其中该氮硅化物层为氮硅化铜层。
9.一种处理基板的方法,包含:
提供一基板,其包含一导电材料;
流入一硅系化合物至该导电材料的表面上以形成一硅化物;
以一含氮等离子处理该基板,以形成一氮硅化金属层;及
沉积一阻障层在该基板上。
10.如权利要求9所述的方法,其中该导电材料包含铜,且该硅化物层包含氮化硅。
11.如权利要求9所述的方法,其中该阻障层包含碳化硅。
12.如权利要求9所述的方法,其中该氮硅化金属层包含氮硅化铜。
13.如权利要求9所述的方法,其中该含氮等离子是通过施加在一含氮气体中产生的RF功率而形成的。
14.如权利要求13所述的方法,其中施加RF功率的步骤包含:
在该基板上沉积该氮硅化金属层时,维持产生在该含氮等离子中的该RF功率。
15.一种处理基板的方法,包含:
提供一基板,其包含一导电材料;
在该导电材料上通过氨气来执行一氮前处理工艺;
流入一硅烷气体至该导电材料的表面上,以形成一硅化物;
以一含氨气的等离子来处理该硅化物,以形成一氮硅化金属;及
沉积一阻障介电层于该氮硅化物层上,其中该阻障介电层包含碳化硅。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/109,533 US20090269923A1 (en) | 2008-04-25 | 2008-04-25 | Adhesion and electromigration improvement between dielectric and conductive layers |
US12/109,533 | 2008-04-25 | ||
PCT/US2009/039653 WO2009131825A2 (en) | 2008-04-25 | 2009-04-06 | Adhesion and electromigration improvement between dielectric and conductive layers |
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CN102017089A true CN102017089A (zh) | 2011-04-13 |
Family
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Family Applications (1)
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CN2009801155825A Pending CN102017089A (zh) | 2008-04-25 | 2009-04-06 | 改善在介电层和导电层间的黏着力与电致迁移性的方法 |
Country Status (6)
Country | Link |
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US (1) | US20090269923A1 (zh) |
JP (1) | JP2011519163A (zh) |
KR (1) | KR20110013418A (zh) |
CN (1) | CN102017089A (zh) |
TW (1) | TW201001550A (zh) |
WO (1) | WO2009131825A2 (zh) |
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CN104752335A (zh) * | 2013-12-31 | 2015-07-01 | 中芯国际集成电路制造(上海)有限公司 | 互连层、其制作方法及半导体器件 |
CN104752335B (zh) * | 2013-12-31 | 2018-09-18 | 中芯国际集成电路制造(上海)有限公司 | 互连层、其制作方法及半导体器件 |
Also Published As
Publication number | Publication date |
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TW201001550A (en) | 2010-01-01 |
WO2009131825A3 (en) | 2010-01-28 |
JP2011519163A (ja) | 2011-06-30 |
US20090269923A1 (en) | 2009-10-29 |
KR20110013418A (ko) | 2011-02-09 |
WO2009131825A4 (en) | 2010-03-18 |
WO2009131825A2 (en) | 2009-10-29 |
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