CN101983004A - Graphic structure and method for insulation reliability test of finished PCB - Google Patents
Graphic structure and method for insulation reliability test of finished PCB Download PDFInfo
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- CN101983004A CN101983004A CN2010102896190A CN201010289619A CN101983004A CN 101983004 A CN101983004 A CN 101983004A CN 2010102896190 A CN2010102896190 A CN 2010102896190A CN 201010289619 A CN201010289619 A CN 201010289619A CN 101983004 A CN101983004 A CN 101983004A
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Abstract
The invention discloses a graphic structure for insulation reliability test of a finished PCB, comprising a PCB (1) and a technology edge (2) arranged at one side of the PCB. The graphic structure is characterized in that the technology edge (2) is provided with a plurality of rows of through holes and pads; each row of through holes and pads is connected into a network by a conductor; and a network pad is arranged at one end of the network conductor. The invention also discloses a method for insulation reliability test of the finished PCB. The invention can effectively and accurately test whether the design, materials and technology flow of each PCB can meet the requirement of electrical performance in batch and accurately assess the insulating performances of different PCB so as to stop micro short circuit of the PCB and product failure occurring after unqualified products enter into the markets. The invention can realize small batch test of the samples. The phenomenon similar to micro short circuit of the PCB can be avoided by adopting the method in the earlier stage of PCB design and batch production.
Description
Technical field
The present invention relates to pcb board finished product insulating reliability measuring technology, relate in particular to a kind of Position Design resolution chart that utilizes existing technology limit, be used for accurately assessing graphic structure and method thereof that whether PCB design, sheet material, technological process can satisfy the pcb board finished product insulating reliability test of requirement on electric performance.
Background technology
Existing pcb board is before producer's shipment, and the general electrical testing that pcb board is carried out path or opens circuit, and can't directly detect its insulation resistance can only be with reference to the test data of the insulation resistance of pcb board material.But the pcb board material is after passing through a series of machinery, wet processing etc., change (all can cause its relative insulation resistance difference as intensive, the pore size of lines, the spacing difference in aperture) has taken place in medium insulation resistance between each conductor of pcb board, and at the Reflow Soldering of back, the electrical property that wave-soldering all will change the pcb board material.The insulation resistance of PCB insulating barrier just is to weigh whether reliably and with long-term important indicator of product, and on the low side as insulation resistance, in use for some time, the resistance value of its insulating barrier will reduce, and forms PCB micro-short circuit phenomenon, finally causes product failure.So after finishing the PCB design and making, it is particularly important that the megger test of this pcb board just seems.Usually PCB producer makes some figures and via hole on sheet material, be used to test the insulation resistance of this sheet material, remove to assess the electrical property of all pcb boards, this method is the method with a capping, is not a method of testing of comparatively accurately assessing certain a PCB insulation resistance.This method is not used in yet carries out large batch of test, being generally pcb board finishes design first and is making the back or to the assessment of sampling of new PCB producer, and a kind of experiment test that carries out is mainly used in assessment PCB design, sheet material, technological process and whether can satisfies requirement on electric performance.
Therefore, insulation property parameter how in enormous quantities, accurately comprehensive detection pcb board is the technical problem that industry needs to be resolved hurrily.
Summary of the invention
The present invention is in order to solve the technical problem that prior art can not in batches, accurately comprehensively detect the insulation property parameter of pcb board, propose a kind of Position Design resolution chart that utilizes existing technology limit, be used for accurately assessing graphic structure and method thereof that whether PCB design, sheet material, technological process can satisfy the pcb board finished product insulating reliability test of requirement on electric performance.
For solving the problems of the technologies described above, the graphic structure of the pcb board finished product insulating reliability test that the present invention proposes comprises pcb board, is located at the technology limit of this pcb board one side.Described technology limit is provided with many row's via holes and pad, and each row's via hole and pad connect into a network by a lead, and are provided with a network pad at an end of this network conductors.
Preferred version, described via hole are four pairs and are two row's arrangements that described pad is to arrange a pair of being up and down; The first row's via hole and first pad connect into first network by first lead, and an end of this network conductors is provided with the first network pad; The second row's via hole and second pad connect into second network by second lead, and an end of this network conductors is provided with the second network pad.
Wherein, preferred via hole aperture is the hole back gauge 0.4mm of 0.35mm, via hole; The spacing that the length and width of described pad are of a size of 2mm * 0.2mm, pad is 0.2mm; The length and width of described network pad are of a size of 3mm * 3mm.
The method of the pcb board finished product insulating reliability test that the present invention proposes, its step is as follows:
The actual minimum pad and the minimum spacing of wide and line-spacing, pad are made the reliability testing graphic structure on pcb board to be measured with reference to the practical minimum wire of the actual minimum-value aperture of pcb board to be measured and minimum spacing, lead;
Connect the first network pad and the second network pad in the described resolution chart structure respectively with two copper cash, as the interface of test lead;
Adopt measuring range to be not less than 10
15Ω, error be less than under 10% ohmer, the normal test atmosphere, adds 500V (DC) test voltage at the interface of described test lead, and the insulation resistance that records pcb board is greater than 5 * 10
8Ω is for tentatively qualified;
Damp and hot---temperature: 50 ℃, relative humidity: under 90% the condition, after four days, add 500V (DC) test voltage again at the interface of described test lead, the insulation resistance that records pcb board is greater than 1 * 10
8Ω is for qualified.
Compared with prior art, beneficial effect of the present invention is:
Whether the design of every PCB of batch testing, sheet material and technological process effectively accurately can satisfy the requirement of electrical property, the accurate insulation property of the different pcb boards of assessment, so that stop the substandard product back that comes into the market and the PCB micro-short circuit takes place and cause the phenomenon of product failure.Also can realize the small-lot testing of sampling, in the PCB design, produce early stage in batches and adopt this method of testing, can avoid PCB micro-short circuit similar phenomenon.
Description of drawings
The present invention is described further below in conjunction with drawings and Examples, wherein:
Fig. 1 is the graphic structure schematic diagram of the reliability testing of preferred embodiment of the present invention.
Embodiment
As shown in Figure 1, be the graphic structure figure of the reliability testing of preferred embodiment of the present invention, the graphic structure of described pcb board finished product insulating reliability test, it comprises pcb board 1, is located at the technology limit 2 of this pcb board one side.This technology limit 2 is provided with many row's via holes and pad, and each row's via hole and pad connect into a network by a lead, and are provided with a network pad at an end of this network conductors.In the present embodiment, the thickness of pcb board 1 is that 1.6mm, length and width are of a size of 100mm * 200mm.The upper end of pcb board is located on the technology limit, generally greater than 5mm.Wherein via hole is four pairs of octals 3,4,5,6,7,8,9,10, is two rows and arranges. Pad 11,12 was arranged for a pair of being up and down.The first row's via hole 3,5,7,9 and first pad 11 connect into first network by first lead 13, and the right-hand member of this network conductors is provided with the first network pad 14.The second row's via hole 4,6,8,10 and second pad 12 connect into second network by second lead 15, and the left end of this network conductors is provided with the second network pad 16.The graphic structure of reliability testing is in order to the insulation distance on the firm and hard border of analog PCB, wherein via hole, lead, number of pads can also increase as required, as, can be increased to four rows, six row's via holes, respective wire is increased to four, six, and pad is can be increased to two pairs, three equities.The via hole minimum-value aperture is the hole back gauge 0.4mm of 0.35mm, via hole; The long 100mm of lead, minimum lead is wide to be that 0.15mm, line-spacing are 0.15mm; The minimum spacing that the minimum length and width of pad are of a size of 2mm * 0.2mm, pad is 0.2mm; The minimum length and width of network pad are of a size of 3mm * 3mm.Pcb board for different sizes, the spacing of the hole back gauge of its via hole aperture, via hole, the length and width size of pad, pad, the length and width size of network pad, can be with reference to the practical minimum wire of the actual minimum-value aperture of pcb board to be measured and minimum spacing, lead the actual minimum pad and the minimum spacing of wide and line-spacing, pad determine.
The present invention propose the method for pcb board finished product insulating reliability test, its step following (please refer to Fig. 1):
Step 1: the actual minimum pad and the minimum spacing of wide and line-spacing, pad with reference to the practical minimum wire of the actual minimum-value aperture of pcb board to be measured and minimum spacing, lead, graphic structure-via hole of making reliability testing on pcb board to be measured is four pairs of octals 3,4,5,6,7,8,9,10, is two rows and arranges.Pad 11,12 was arranged for a pair of being up and down.The first row's via hole 3,5,7,9 and first pad 11 connect into first network by first lead 13, and the right-hand member of this network conductors is provided with the first network pad 14.The second row's via hole 4,6,8,10 and second pad 12 connect into second network by second lead 15, and the left end of this network conductors is provided with the second network pad 16.The via hole aperture is the hole back gauge 0.4mm of 0.35mm, via hole; The long 100mm of lead, lead is wide to be that 0.15mm, line-spacing are 0.15mm; The minimum spacing that the length and width of pad are of a size of 2mm * 0.2mm, pad is 0.2mm; The length and width of network pad are of a size of 3mm * 3mm.
Step 2: connect the first network pad 14 and the second network pad 16 in the resolution chart structure respectively with two copper cash 17,18, as the interface of test lead;
Step 3: adopt measuring range to be not less than 10
15Ω, error be less than under 10% ohmer, the normal test atmosphere, adds 500V (DC) test voltage at the interface of test lead, and the insulation resistance that records pcb board must be greater than 5 * 10
8Ω is for tentatively qualified;
Step 4: damp and hot---temperature: 50 ℃, relative humidity: under 90% the condition, after four days, add 500V (DC) test voltage again at the interface of test lead, the insulation resistance that records pcb board should be greater than 1 * 10
8Ω is for qualified.
Whether the present invention's design, sheet material and technological process of every PCB of batch testing effectively accurately can satisfy the requirement of electrical property, the accurate insulation property of the different pcb boards of assessment, so that stop the substandard product back that comes into the market and the PCB micro-short circuit takes place and cause the phenomenon of product failure.Also can realize the small-lot testing of sampling, in the PCB design, produce early stage in batches and adopt this method of testing, can avoid PCB micro-short circuit similar phenomenon.
Claims (4)
1. the graphic structure of pcb board finished product insulating reliability test, comprise pcb board (1), be located at this pcb board one side technology limit (2), it is characterized in that, described technology limit (2) is provided with many row's via holes and pad, each row's via hole and pad connect into a network by a lead, and are provided with a network pad at an end of this network conductors.
2. graphic structure as claimed in claim 1 is characterized in that, described via hole is four (3,4,5,6,7,8,9,10) are two rows arrange, and described pad is that a pair of (11,12) are up and down and arrange; First row's via hole (3,5,7,9) and first pad (11) connect into first network by first lead (13), and an end of this network conductors is provided with the first network pad (14); Second row's via hole (4,6,8,10) and second pad (12) connect into second network by second lead (15), and an end of this network conductors is provided with the second network pad (16).
3. graphic structure as claimed in claim 2 is characterized in that, described via hole minimum-value aperture is the hole back gauge 0.4mm of 0.35mm, via hole; The long 100mm of described lead, minimum lead is wide to be that 0.15mm, line-spacing are 0.15mm; The minimum spacing that the minimum length and width of described pad are of a size of 2mm * 0.2mm, pad is 0.2mm; The minimum length and width of described network pad are of a size of 3mm * 3mm.
4. the method for a pcb board finished product insulating reliability as claimed in claim 1 test, its step is as follows:
The actual minimum pad and the minimum spacing of wide and line-spacing, pad with reference to the practical minimum wire of the actual minimum-value aperture of pcb board to be measured and minimum spacing, lead are made the graphic structure of reliability testing on pcb board to be measured;
Connect the first network pad and the second network pad in the described resolution chart structure respectively with two copper cash, as the interface of test lead;
Adopt measuring range to be not less than 10
15Ω, error be less than under 10% ohmer, the normal test atmosphere, adds 500V, direct current test voltage at the interface of described test lead, and the insulation resistance that records pcb board must be greater than 5 * 10
8Ω is for tentatively qualified;
Damp and hot---temperature: 50 ℃, relative humidity: under 90% the condition, after four days, add 500V, direct current test voltage again at the interface of described test lead, the insulation resistance that records pcb board should be greater than 1 * 10
8Ω is for qualified.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010289619.0A CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201010289619.0A CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
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| Publication Number | Publication Date |
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| CN101983004A true CN101983004A (en) | 2011-03-02 |
| CN101983004B CN101983004B (en) | 2016-12-07 |
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| CN201010289619.0A Expired - Fee Related CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102313842A (en) * | 2011-03-29 | 2012-01-11 | 上海华碧检测技术有限公司 | Method for detecting resistance reduction and failure phenomena of PCB (printed circuit board) |
| CN103163447A (en) * | 2013-03-28 | 2013-06-19 | 苏州瀚瑞微电子有限公司 | Method for detecting flexible printed circuit (FPC) finished product |
| CN106324349A (en) * | 2016-08-25 | 2017-01-11 | 浪潮电子信息产业股份有限公司 | Electrical resistance test method and system |
| CN110398680A (en) * | 2019-08-14 | 2019-11-01 | 华芯电子(天津)有限责任公司 | A kind of PCB method for testing reliability |
| CN110708867A (en) * | 2019-11-15 | 2020-01-17 | 广州兴森快捷电路科技有限公司 | PCB (printed Circuit Board) voltage-resistant test module and test method |
| CN110839315A (en) * | 2019-10-22 | 2020-02-25 | 江门崇达电路技术有限公司 | Design method of immersion gold process test board |
| CN111707928A (en) * | 2020-06-29 | 2020-09-25 | 广东浪潮大数据研究有限公司 | Method and device for testing PCB wiring processing capacity |
| CN111913072A (en) * | 2020-07-24 | 2020-11-10 | 胜宏科技（惠州）股份有限公司 | Method for identifying waste coil plate reporting |
| CN113419190A (en) * | 2021-06-15 | 2021-09-21 | 安捷利（番禺）电子实业有限公司 | Method for detecting micro short circuit after laser cutting and application thereof |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102313842A (en) * | 2011-03-29 | 2012-01-11 | 上海华碧检测技术有限公司 | Method for detecting resistance reduction and failure phenomena of PCB (printed circuit board) |
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| CN106324349B (en) * | 2016-08-25 | 2019-01-11 | 浪潮电子信息产业股份有限公司 | A kind of electric durability energy test method and system |
| CN110398680A (en) * | 2019-08-14 | 2019-11-01 | 华芯电子(天津)有限责任公司 | A kind of PCB method for testing reliability |
| CN110398680B (en) * | 2019-08-14 | 2021-07-20 | 华芯电子(天津)有限责任公司 | PCB reliability test method |
| CN110839315A (en) * | 2019-10-22 | 2020-02-25 | 江门崇达电路技术有限公司 | Design method of immersion gold process test board |
| CN110839315B (en) * | 2019-10-22 | 2020-12-15 | 江门崇达电路技术有限公司 | Design method of immersion gold process test board |
| CN110708867A (en) * | 2019-11-15 | 2020-01-17 | 广州兴森快捷电路科技有限公司 | PCB (printed Circuit Board) voltage-resistant test module and test method |
| CN111707928A (en) * | 2020-06-29 | 2020-09-25 | 广东浪潮大数据研究有限公司 | Method and device for testing PCB wiring processing capacity |
| CN111913072A (en) * | 2020-07-24 | 2020-11-10 | 胜宏科技（惠州）股份有限公司 | Method for identifying waste coil plate reporting |
| CN113419190A (en) * | 2021-06-15 | 2021-09-21 | 安捷利（番禺）电子实业有限公司 | Method for detecting micro short circuit after laser cutting and application thereof |
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| CN101983004B (en) | 2016-12-07 |
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Address after: 518057 Guangdong city of Shenzhen province Nanshan District Gao Xin Road SKYWORTH building A14 Applicant after: Shenzhen Skyworth Digital Technology Co., Ltd. Address before: 518057 Guangdong city of Shenzhen province Nanshan District Gao Xin Road SKYWORTH building A14 Applicant before: Shenzhen Skyworth Digital Technology Co., Ltd. |
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