CN101983004B - The graphic structure of pcb board finished product insulating reliability test and method thereof - Google Patents
The graphic structure of pcb board finished product insulating reliability test and method thereof Download PDFInfo
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- CN101983004B CN101983004B CN201010289619.0A CN201010289619A CN101983004B CN 101983004 B CN101983004 B CN 101983004B CN 201010289619 A CN201010289619 A CN 201010289619A CN 101983004 B CN101983004 B CN 101983004B
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Abstract
The invention discloses the graphic structure of a kind of pcb board finished product insulating reliability test, including pcb board (1), the technique edges (2) of being located at this pcb board side.This technique edges (2) is provided with multiple rows of via and pad, and via and the pad of each row connect into a network by a wire, and are provided with a network pad in one end of this network conductors.Slip lid of the present invention discloses the method for pcb board finished product insulating reliability test.Whether the present invention design of batch testing every piece PCB, sheet material and technological process the most accurately can meet the requirement of electrical property, the insulating properties of accurate evaluation difference pcb board, so that stopping to occur PCB micro-short circuit to cause the phenomenon of product failure after substandard product comes into the market.The small-lot testing of sampling can also be realized, use this method of testing in PCB design, batch production early stage, PCB micro-short circuit similar phenomenon can be avoided.
Description
Technical field
The present invention relates to pcb board finished product insulating reliability measuring technology, particularly relate to one and utilize existing technique
The Position Design resolution chart on limit, the most permissible for accurate evaluation PCB design, sheet material, technological process
Meet graphic structure and the method thereof of the pcb board finished product insulating reliability test of requirement on electric performance.
Background technology
Existing pcb board, before producer's shipment, typically carries out the electrical testing of path or open circuit to pcb board, and nothing
Method directly detects its insulation resistance, can only be with reference to the test data of the insulation resistance of pcb board material.But PCB
Sheet material is after by a series of machinery, wet processing etc., and the dielectric insulation resistance between each conductor of pcb board is sent out
(intensive, pore size, the spacing difference in aperture such as lines all can cause its opposing insulation to have given birth to change
Resistance is different), and Reflow Soldering below, wave-soldering all will change the electrical property of pcb board material.
The insulation resistance height of PCB insulating barrier is to weigh product important indicator the most reliably and with long-term, such as insulation resistance
On the low side, in use for some time, the resistance value of its insulating barrier will reduce, and it is existing to form PCB micro-short circuit
As, ultimately result in product failure.Therefore after completing PCB design and manufacturing, the insulation resistance of this pcb board is surveyed
Examination is just particularly important.Generally PCB producer makes some figures and via on sheet material, is used for testing this
The insulation resistance of sheet material, removes to assess the electrical property of all pcb boards, and this method is with the method for a capping,
It it not the method for testing of more a PCB of an accurate evaluation insulation resistance.The method be not the most used in into
Row large batch of test, generally pcb board are entered after complete design first and manufacture or to new PCB producer
Line sampling is assessed, and a kind of experiment test carried out, mainly for assessment of PCB design, sheet material, technique stream
Whether journey can meet requirement on electric performance.
Therefore, how high-volume, the most comprehensively the insulating properties parameter of detection pcb board be industry urgently
Solve the technical problem that.
Summary of the invention
The present invention is to solve that prior art can not batch, the most comprehensive insulating properties detecting pcb board
The technical problem of parameter, proposes a kind of Position Design resolution chart utilizing existing technique edges, for accurately
Whether assessment PCB design, sheet material, technological process can meet the pcb board finished product insulation of requirement on electric performance
The graphic structure of reliability testing and method thereof.
For solving above-mentioned technical problem, the figure of the pcb board finished product insulating reliability test that the present invention proposes
Structure, including pcb board, the technique edges of being located at this pcb board side.Described technique edges is provided with and is drained through more
Hole and pad, via and the pad of each row connect into a network by a wire, and in this network conductors
One end be provided with a network pad.
Preferred version, described via be four in two rows arrangement, described pad be a pair in arranging up and down
Row；First row via and the first pad connect into first network by the first wire, the one of this network conductors
End is provided with first network pad；Second row via and the second pad connect into the second network by the second wire,
One end of this network conductors is provided with the second network pad.
Wherein, preferred via aperture be 0.35mm, hole back gauge 0.4mm of via；Described pad
Length and width a size of 2mm × 0.2mm, the spacing of pad are 0.2mm；The length and width of described network pad are a size of
3mm×3mm。
The method of the pcb board finished product insulating reliability test that the present invention proposes, its step is as follows:
Actual minimum-value aperture and minimum spacing, the practical minimum wire width of wire and line with reference to pcb board to be measured
Actual minimum pad away from, pad and minimum spacing, make reliability testing figure knot on pcb board to be measured
Structure；
The first network pad in described resolution chart structure and the weldering of the second network is connected respectively with two copper cash
Dish, as the interface of test lead；
Measurement scope is used to be not less than 1015Ohm gauge, the normal assays atmospheric condition that Ω, error are less than 10%
Under, the interface at described test lead adds 500V (DC) test voltage, records the insulated electro of pcb board
Resistance is more than 5 × 108Ω, for the most qualified；
At moisture heat temperature: 50 DEG C, relative humidity: under conditions of 90%, after four days, described
The interface of test lead adds 500V (DC) test voltage again, records the insulation resistance of pcb board more than 1 × 108Ω,
For qualified.
Compared with prior art, the invention have the benefit that
Can the design of batch testing every piece PCB, sheet material and technological process the most accurately whether can expire
The requirement of foot electrical property, the insulating properties of accurate evaluation difference pcb board, so that stopping substandard product stream
PCB micro-short circuit is occurred to cause the phenomenon of product failure after entering market.The small lot of sampling can also be realized
Test, uses this method of testing in PCB design, batch production early stage, can avoid PCB micro-short circuit class
Like phenomenon.
Accompanying drawing explanation
The present invention is described further with embodiment below in conjunction with the accompanying drawings, wherein:
Fig. 1 is the graphic structure schematic diagram of the reliability testing of present pre-ferred embodiments.
Detailed description of the invention
As it is shown in figure 1, be the graphic structure figure of the reliability testing of presently preferred embodiments of the present invention, described
The graphic structure of pcb board finished product insulating reliability test, it includes pcb board 1, is located at this pcb board side
Technique edges 2.This technique edges 2 is provided with multiple rows of via and pad, the via of each row and pad by one
Wire connects into a network, and is provided with a network pad in one end of this network conductors.In the present embodiment,
The thickness of pcb board 1 is 1.6mm, length and width a size of 100mm × 200mm.Technique edges is located at the upper of pcb board
End, generally higher than 5mm.Wherein via is four pairs of octals 3,4,5,6,7,8,9,10, in up and down
Two row's arrangements.Pad 11,12 be a pair in being arranged above and below.First row via 3,5,7,9 and first welds
Dish 11 connects into first network by the first wire 13, and the right-hand member of this network conductors is provided with first network pad
14.Second row via the 4,6,8,10 and second pad 12 connects into the second network by the second wire 15,
The left end of this network conductors is provided with the second network pad 16.The graphic structure of reliability testing is in order to analog PCB
The insulation distance that plate is actual, wherein via, wire, number of pads can also increase as required, e.g.,
Can increase to four rows, six be drained through hole, respective wire increases to four, six, and pad is increasing to
Two pairs, three equities.Via minimum-value aperture is 0.35mm, hole back gauge 0.4mm of via；Wire is long
100mm, the minimum a width of 0.15mm of wire, line-spacing are 0.15mm；The minimum length and width of pad are a size of
2mm × 0.2mm, the minimum spacing of pad are 0.2mm；The minimum length and width of network pad are a size of
3mm×3mm.For different size of pcb board, its via aperture, the hole back gauge of via, pad
Length and width size, the spacing of pad, the length and width size of network pad, be referred to the reality of pcb board to be measured
Small-bore and minimum spacing, the practical minimum wire width of wire and line-spacing, the actual minimum pad of pad and
Small Distance determines.
The present invention propose pcb board finished product insulating reliability test method, its step (please be joined as follows
Examine Fig. 1):
Step 1: with reference to actual minimum-value aperture and minimum spacing, the practical minimum wire of wire of pcb board to be measured
Width and line-spacing, the actual minimum pad of pad and minimum spacing, make reliability testing on pcb board to be measured
Graphic structure-via be four pairs of octals 3,4,5,6,7,8,9,10, in two rows arrange.
Pad 11,12 be a pair in being arranged above and below.First row via the 3,5,7,9 and first pad 11 is by the
One wire 13 connects into first network, and the right-hand member of this network conductors is provided with first network pad 14.Second row
Via the 4,6,8,10 and second pad 12 connects into the second network by the second wire 15, this network conductors
Left end be provided with the second network pad 16.Via aperture is 0.35mm, hole back gauge 0.4mm of via；
The long 100mm of wire, a width of 0.15mm of wire, line-spacing are 0.15mm；The length and width of pad are a size of
2mm × 0.2mm, the minimum spacing of pad are 0.2mm；The length and width of network pad a size of 3mm × 3mm.
Step 2: with first network pad 14 and in two copper cash 17,18 respectively connecting test graphic structure
Second network pad 16, as the interface of test lead；
Step 3: use measurement scope to be not less than 1015Ohm gauge, the normal assays that Ω, error are less than 10%
Under atmospheric condition, the interface at test lead adds 500V (DC) test voltage, records the insulation of pcb board
Resistance have to be larger than 5 × 108Ω, for the most qualified；
Step 4: at moisture heat temperature: 50 DEG C, relative humidity: under conditions of 90%, after four days,
The interface of test lead adds 500V (DC) test voltage again, and the insulation resistance recording pcb board should be greater than
1×108Ω, for qualified.
The present invention can the design of batch testing every piece PCB, sheet material and technological process the most accurately whether
Can meet the requirement of electrical property, the insulating properties of accurate evaluation difference pcb board, so that stopping defective
Product occurs PCB micro-short circuit to cause the phenomenon of product failure after coming into the market.Sampling can also be realized
Small-lot testing, uses this method of testing in PCB design, batch production early stage, PCB can be avoided micro-
Short circuit similar phenomenon.
Claims (4)
1. a method of testing for the graphic structure of pcb board finished product insulating reliability test, its
Step is as follows:
Actual minimum-value aperture and minimum spacing, the actual minimum of wire with reference to pcb board to be measured
Live width and line-spacing, the actual minimum dimension of pad and minimum spacing, make on pcb board to be measured
Make the graphic structure of reliability testing；
With the first network pad in two copper cash respectively connecting test graphic structure and the second net
Network pad, as the interface of test lead；
Use measurement scope more than or equal to 1015Ohm gauge less than 10% of Ω, error, normal
Under test atmosphere, the interface at described test lead adds 500V, unidirectional current test voltage,
The insulation resistance recording pcb board have to be larger than 5 × 108Ω, for the most qualified；
In temperature: 50 DEG C, relative humidity: under conditions of 90%, after four days, in described survey
The interface of examination end adds 500V, unidirectional current test voltage again, and the insulation resistance recording pcb board should
More than 1 × 108Ω, for qualified.
The figure of a kind of pcb board finished product insulating reliability the most as described in claim 1 test
The method of testing of shape structure, it is characterised in that described graphic structure includes pcb board (1), sets
In the technique edges (2) of this pcb board side, described technique edges (2) is provided with multiple rows of via and pad,
Via and the pad of each row connect into a network by a wire, and in the one of this network conductors
End is provided with a network pad.
The figure of a kind of pcb board finished product insulating reliability the most as claimed in claim 2 test
The method of testing of structure, it is characterised in that described via be four to (3,4,5,6,7,
8,9,10) in two row's arrangements, described pad is that a pair (11,12) are in being arranged above and below；First
It is drained through hole (3,5,7,9) and the first pad (11) and connects into first network by the first wire (13),
One end of this network conductors is provided with first network pad (14)；Second row via (4,6,8,10)
The second network is connected into by the second wire (15), the one of this network conductors with the second pad (12)
End is provided with the second network pad (16).
The figure of a kind of pcb board finished product insulating reliability the most as claimed in claim 3 test
The method of testing of structure, it is characterised in that described via minimum-value aperture is 0.35mm, mistake
Hole back gauge 0.4mm in hole；The long 100mm of described wire, the minimum a width of 0.15mm of wire,
Line-spacing is 0.15mm；The minimum length and width a size of 2mm × 0.2mm of described pad, pad
Minimum spacing is 0.2mm；The minimum length and width a size of 3mm × 3mm of described network pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010289619.0A CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010289619.0A CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
Publications (2)
| Publication Number | Publication Date |
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| CN101983004A CN101983004A (en) | 2011-03-02 |
| CN101983004B true CN101983004B (en) | 2016-12-07 |
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| CN201010289619.0A Expired - Fee Related CN101983004B (en) | 2010-09-21 | 2010-09-21 | The graphic structure of pcb board finished product insulating reliability test and method thereof |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102313842A (en) * | 2011-03-29 | 2012-01-11 | 上海华碧检测技术有限公司 | Method for detecting resistance reduction and failure phenomena of PCB (printed circuit board) |
| CN103163447A (en) * | 2013-03-28 | 2013-06-19 | 苏州瀚瑞微电子有限公司 | Method for detecting flexible printed circuit (FPC) finished product |
| CN106324349B (en) * | 2016-08-25 | 2019-01-11 | 浪潮电子信息产业股份有限公司 | A kind of electric durability energy test method and system |
| CN110398680B (en) * | 2019-08-14 | 2021-07-20 | 华芯电子(天津)有限责任公司 | PCB reliability test method |
| CN110839315B (en) * | 2019-10-22 | 2020-12-15 | 江门崇达电路技术有限公司 | Design method of immersion gold process test board |
| CN110708867A (en) * | 2019-11-15 | 2020-01-17 | 广州兴森快捷电路科技有限公司 | PCB (printed Circuit Board) voltage-resistant test module and test method |
| CN111707928A (en) * | 2020-06-29 | 2020-09-25 | 广东浪潮大数据研究有限公司 | Method and device for testing PCB wiring processing capacity |
| CN111913072B (en) * | 2020-07-24 | 2023-01-03 | 胜宏科技（惠州）股份有限公司 | Method for identifying waste coil plate reporting |
| CN113419190B (en) * | 2021-06-15 | 2023-03-17 | 广州安博新能源科技有限公司 | Method for detecting micro short circuit after laser cutting and application thereof |
Citations (1)
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| CN101006352A (en) * | 2004-06-28 | 2007-07-25 | Sv探针私人有限公司 | Substrate with patterned conductive layer |
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| US6118286A (en) * | 1995-10-10 | 2000-09-12 | Xilinx, Inc. | Semiconductor device tester-to-handler Interface board with large test area |
| JP3459765B2 (en) * | 1997-07-16 | 2003-10-27 | シャープ株式会社 | Mounting inspection system |
| JP2000326495A (en) * | 1999-05-24 | 2000-11-28 | Matsushita Electric Ind Co Ltd | Method for inspecting cream solder print |
| JP2002198661A (en) * | 2000-12-25 | 2002-07-12 | Hitachi Telecom Technol Ltd | Multilayer printed wiring board |
| US8130005B2 (en) * | 2006-12-14 | 2012-03-06 | Formfactor, Inc. | Electrical guard structures for protecting a signal trace from electrical interference |
| US20090002002A1 (en) * | 2007-06-30 | 2009-01-01 | Wen-Bi Hsu | Electrical Testing System |
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2010
- 2010-09-21 CN CN201010289619.0A patent/CN101983004B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101006352A (en) * | 2004-06-28 | 2007-07-25 | Sv探针私人有限公司 | Substrate with patterned conductive layer |
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| CN101983004A (en) | 2011-03-02 |
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Address after: 518057 Guangdong city of Shenzhen province Nanshan District Gao Xin Road SKYWORTH building A14 Applicant after: Shenzhen Skyworth Digital Technology Co., Ltd. Address before: 518057 Guangdong city of Shenzhen province Nanshan District Gao Xin Road SKYWORTH building A14 Applicant before: Shenzhen Skyworth Digital Technology Co., Ltd. |
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