CN101965635B - 将选择性钌沉积集成到半导体器件的制造中的方法 - Google Patents
将选择性钌沉积集成到半导体器件的制造中的方法 Download PDFInfo
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- CN101965635B CN101965635B CN200880106629.7A CN200880106629A CN101965635B CN 101965635 B CN101965635 B CN 101965635B CN 200880106629 A CN200880106629 A CN 200880106629A CN 101965635 B CN101965635 B CN 101965635B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/853,393 | 2007-09-11 | ||
| US11/853,393 US7829454B2 (en) | 2007-09-11 | 2007-09-11 | Method for integrating selective ruthenium deposition into manufacturing of a semiconductior device |
| PCT/IB2008/003805 WO2009060320A2 (en) | 2007-09-11 | 2008-09-09 | Method for integrating selective ruthenium deposition into manufacturing of a semiconductior device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101965635A CN101965635A (zh) | 2011-02-02 |
| CN101965635B true CN101965635B (zh) | 2014-02-12 |
Family
ID=40430967
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200880106629.7A Active CN101965635B (zh) | 2007-09-11 | 2008-09-09 | 将选择性钌沉积集成到半导体器件的制造中的方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7829454B2 (enExample) |
| JP (1) | JP5406191B2 (enExample) |
| KR (1) | KR101506755B1 (enExample) |
| CN (1) | CN101965635B (enExample) |
| TW (1) | TWI387051B (enExample) |
| WO (1) | WO2009060320A2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106158723A (zh) * | 2015-05-13 | 2016-11-23 | 格罗方德半导体公司 | 填充集成电路中的凹穴及其结果装置 |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US7737028B2 (en) * | 2007-09-28 | 2010-06-15 | Applied Materials, Inc. | Selective ruthenium deposition on copper materials |
| US20100081274A1 (en) * | 2008-09-29 | 2010-04-01 | Tokyo Electron Limited | Method for forming ruthenium metal cap layers |
| US7977235B2 (en) * | 2009-02-02 | 2011-07-12 | Tokyo Electron Limited | Method for manufacturing a semiconductor device with metal-containing cap layers |
| US8716132B2 (en) * | 2009-02-13 | 2014-05-06 | Tokyo Electron Limited | Radiation-assisted selective deposition of metal-containing cap layers |
| US8242019B2 (en) * | 2009-03-31 | 2012-08-14 | Tokyo Electron Limited | Selective deposition of metal-containing cap layers for semiconductor devices |
| DE102009021488A1 (de) * | 2009-05-15 | 2010-12-16 | Globalfoundries Dresden Module One Llc & Co. Kg | Verbessertes Elektromigrationsverhalten von Kupferleitungen in Metallisierungssystemen von Halbleiterbauelementen durch Legierung von Oberflächen |
| US8178439B2 (en) | 2010-03-30 | 2012-05-15 | Tokyo Electron Limited | Surface cleaning and selective deposition of metal-containing cap layers for semiconductor devices |
| US8232200B1 (en) * | 2011-03-18 | 2012-07-31 | International Business Machines Corporation | Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby |
| US8921228B2 (en) | 2011-10-04 | 2014-12-30 | Imec | Method for selectively depositing noble metals on metal/metal nitride substrates |
| EP2584588B1 (en) * | 2011-10-21 | 2017-10-04 | Imec | Method of forming MIM capacitor with Ru-comprising oxygen diffusion barrier |
| JP6257217B2 (ja) * | 2013-08-22 | 2018-01-10 | 東京エレクトロン株式会社 | Cu配線構造の形成方法 |
| KR102321209B1 (ko) * | 2014-11-03 | 2021-11-02 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| US10002834B2 (en) * | 2015-03-11 | 2018-06-19 | Applied Materials, Inc. | Method and apparatus for protecting metal interconnect from halogen based precursors |
| US9576894B2 (en) * | 2015-06-03 | 2017-02-21 | GlobalFoundries, Inc. | Integrated circuits including organic interlayer dielectric layers and methods for fabricating the same |
| CN107836034B (zh) | 2015-06-05 | 2022-07-19 | 东京毅力科创株式会社 | 用于互连的钌金属特征部填充 |
| US9768063B1 (en) * | 2016-06-30 | 2017-09-19 | Lam Research Corporation | Dual damascene fill |
| US9947590B1 (en) * | 2016-10-14 | 2018-04-17 | Globalfoundries Inc. | Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell |
| WO2018125052A1 (en) * | 2016-12-27 | 2018-07-05 | Intel Corporation | Selective area deposition of metal layers from hetero-pentadienyl metal complex precursors |
| TWI790320B (zh) * | 2017-12-16 | 2023-01-21 | 美商應用材料股份有限公司 | 釕的選擇性原子層沉積 |
| US10403564B2 (en) * | 2017-12-30 | 2019-09-03 | Intel Corporation | Dual-damascene zero-misalignment-via process for semiconductor packaging |
| US10818557B2 (en) | 2018-07-03 | 2020-10-27 | Globalfoundries Inc. | Integrated circuit structure to reduce soft-fail incidence and method of forming same |
| JP2020043139A (ja) * | 2018-09-06 | 2020-03-19 | 東京エレクトロン株式会社 | 埋め込み方法及び処理システム |
| US11164780B2 (en) * | 2019-06-07 | 2021-11-02 | Applied Materials, Inc. | Process integration approach for selective metal via fill |
| WO2020251696A1 (en) | 2019-06-10 | 2020-12-17 | Applied Materials, Inc. | Processing system for forming layers |
| US20240412981A1 (en) * | 2023-06-09 | 2024-12-12 | Entegris, Inc. | Selective ruthenium deposition and related systems and methods |
| US20250154643A1 (en) * | 2023-11-14 | 2025-05-15 | Tokyo Electron Limited | Area selective deposition of metals for electronic devices |
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| JP2004146516A (ja) * | 2002-10-23 | 2004-05-20 | Tokyo Electron Ltd | 成膜方法 |
| US20060121733A1 (en) * | 2004-10-26 | 2006-06-08 | Kilpela Olli V | Selective formation of metal layers in an integrated circuit |
| US20060220248A1 (en) * | 2005-03-31 | 2006-10-05 | Tokyo Electron Limited | Low-temperature chemical vapor deposition of low-resistivity ruthenium layers |
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-
2007
- 2007-09-11 US US11/853,393 patent/US7829454B2/en active Active
-
2008
- 2008-09-09 JP JP2010524601A patent/JP5406191B2/ja active Active
- 2008-09-09 WO PCT/IB2008/003805 patent/WO2009060320A2/en not_active Ceased
- 2008-09-09 CN CN200880106629.7A patent/CN101965635B/zh active Active
- 2008-09-09 KR KR1020107006378A patent/KR101506755B1/ko active Active
- 2008-09-11 TW TW097134872A patent/TWI387051B/zh active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004146516A (ja) * | 2002-10-23 | 2004-05-20 | Tokyo Electron Ltd | 成膜方法 |
| US20060121733A1 (en) * | 2004-10-26 | 2006-06-08 | Kilpela Olli V | Selective formation of metal layers in an integrated circuit |
| US20060220248A1 (en) * | 2005-03-31 | 2006-10-05 | Tokyo Electron Limited | Low-temperature chemical vapor deposition of low-resistivity ruthenium layers |
Non-Patent Citations (1)
| Title |
|---|
| Low-tempreture chemical vapor deposition and scaling limitofultrathin Ru film;Q.Wang, J.G.Ekerdt, D.Gay, Y.-M.Sun, J.M.White;《App.Phy.Lett.》;20040223;正文第1页左栏第1行至第3页左栏第26行 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106158723A (zh) * | 2015-05-13 | 2016-11-23 | 格罗方德半导体公司 | 填充集成电路中的凹穴及其结果装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2009060320A2 (en) | 2009-05-14 |
| JP5406191B2 (ja) | 2014-02-05 |
| TW200913146A (en) | 2009-03-16 |
| JP2010539698A (ja) | 2010-12-16 |
| KR20100113475A (ko) | 2010-10-21 |
| KR101506755B1 (ko) | 2015-03-27 |
| US7829454B2 (en) | 2010-11-09 |
| TWI387051B (zh) | 2013-02-21 |
| CN101965635A (zh) | 2011-02-02 |
| WO2009060320A3 (en) | 2009-08-06 |
| US20090065939A1 (en) | 2009-03-12 |
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