CN101958252B - 超小型微电子电路的平面型载体空腔气密性封装方法 - Google Patents
超小型微电子电路的平面型载体空腔气密性封装方法 Download PDFInfo
- Publication number
- CN101958252B CN101958252B CN2009100576212A CN200910057621A CN101958252B CN 101958252 B CN101958252 B CN 101958252B CN 2009100576212 A CN2009100576212 A CN 2009100576212A CN 200910057621 A CN200910057621 A CN 200910057621A CN 101958252 B CN101958252 B CN 101958252B
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- CN
- China
- Prior art keywords
- microelectronic circuit
- carrier
- flat carrier
- microminiature
- lid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000003466 welding Methods 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 14
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 4
- 239000010931 gold Substances 0.000 claims abstract description 4
- 229910052737 gold Inorganic materials 0.000 claims abstract description 4
- 239000012530 fluid Substances 0.000 claims description 28
- 239000000565 sealant Substances 0.000 claims description 28
- 238000005538 encapsulation Methods 0.000 claims description 17
- 238000013461 design Methods 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 6
- 230000000694 effects Effects 0.000 claims description 5
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical group C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 4
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 238000007789 sealing Methods 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000011248 coating agent Substances 0.000 abstract 2
- 238000000576 coating method Methods 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 1
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 9
- 239000004033 plastic Substances 0.000 description 6
- 239000003292 glue Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
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- 230000009977 dual effect Effects 0.000 description 1
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- 239000008187 granular material Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
Landscapes
- Micromachines (AREA)
Abstract
Description
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100576212A CN101958252B (zh) | 2009-07-21 | 2009-07-21 | 超小型微电子电路的平面型载体空腔气密性封装方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100576212A CN101958252B (zh) | 2009-07-21 | 2009-07-21 | 超小型微电子电路的平面型载体空腔气密性封装方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101958252A CN101958252A (zh) | 2011-01-26 |
CN101958252B true CN101958252B (zh) | 2012-07-04 |
Family
ID=43485517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009100576212A Active CN101958252B (zh) | 2009-07-21 | 2009-07-21 | 超小型微电子电路的平面型载体空腔气密性封装方法 |
Country Status (1)
Country | Link |
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CN (1) | CN101958252B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6947367B2 (ja) * | 2016-12-20 | 2021-10-13 | ローム株式会社 | センサモジュールおよびその製造方法 |
EP3385692A1 (en) * | 2017-04-03 | 2018-10-10 | Indigo Diabetes N.V. | Hermeticity testing of an optical assembly |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5998242A (en) * | 1997-10-27 | 1999-12-07 | Lsi Logic Corporation | Vacuum assisted underfill process and apparatus for semiconductor package fabrication |
CN1445831A (zh) * | 2002-03-18 | 2003-10-01 | 美新半导体(无锡)有限公司 | 微电子电路的空腔型封装方法 |
CN1638070A (zh) * | 2004-12-01 | 2005-07-13 | 美新半导体(无锡)有限公司 | 微电子电路的平面型载体空腔气密性封装方法 |
-
2009
- 2009-07-21 CN CN2009100576212A patent/CN101958252B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5998242A (en) * | 1997-10-27 | 1999-12-07 | Lsi Logic Corporation | Vacuum assisted underfill process and apparatus for semiconductor package fabrication |
CN1445831A (zh) * | 2002-03-18 | 2003-10-01 | 美新半导体(无锡)有限公司 | 微电子电路的空腔型封装方法 |
CN1638070A (zh) * | 2004-12-01 | 2005-07-13 | 美新半导体(无锡)有限公司 | 微电子电路的平面型载体空腔气密性封装方法 |
Also Published As
Publication number | Publication date |
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CN101958252A (zh) | 2011-01-26 |
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Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee | ||
CP02 | Change in the address of a patent holder |
Address after: 201203, room 306, building A, building 3000, 1 East Dragon Road, Shanghai, Pudong New Area Patentee after: Senodia Semiconductor (Shanghai) Co., Ltd. Address before: 201203 Shanghai City Chenhui Road, Zhangjiang hi tech Park No. 88 Building No. 1 room 307 Patentee before: Senodia Semiconductor (Shanghai) Co., Ltd. |
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PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: Cavity type air-tight packaging method of planar carrier of microminiature microelectronic circuit Effective date of registration: 20140108 Granted publication date: 20120704 Pledgee: Bank of Beijing, Limited by Share Ltd, Shanghai branch Pledgor: Senodia Semiconductor (Shanghai) Co., Ltd. Registration number: 2014310000001 |
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PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20140808 Granted publication date: 20120704 Pledgee: Bank of Beijing, Limited by Share Ltd, Shanghai branch Pledgor: Senodia Semiconductor (Shanghai) Co., Ltd. Registration number: 2014310000001 |
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PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: Cavity type air-tight packaging method of planar carrier of microminiature microelectronic circuit Effective date of registration: 20151228 Granted publication date: 20120704 Pledgee: Bank of Shanghai Limited by Share Ltd Pudong branch Pledgor: Senodia Semiconductor (Shanghai) Co., Ltd. Registration number: 2015310000052 |
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PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20210208 Granted publication date: 20120704 Pledgee: Bank of Shanghai Limited by Share Ltd. Pudong branch Pledgor: Senodia Technologies (Shanghai) Co.,Ltd. Registration number: 2015310000052 |
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CP03 | Change of name, title or address | ||
CP03 | Change of name, title or address |
Address after: 312030 Building 5, intelligent innovation center, 487 Kebei Avenue, Keqiao Economic and Technological Development Zone, Keqiao District, Shaoxing City, Zhejiang Province Patentee after: Shendi semiconductor (Shaoxing) Co.,Ltd. Address before: Room 306, building a, building 1, 3000 Longdong Avenue, Pudong New Area, Shanghai 201203 Patentee before: Senodia Technologies (Shanghai) Co.,Ltd. |