CN101916745A - Novel plate crimped dual-chip encapsulated ceramic package - Google Patents
Novel plate crimped dual-chip encapsulated ceramic package Download PDFInfo
- Publication number
- CN101916745A CN101916745A CN2010101899219A CN201010189921A CN101916745A CN 101916745 A CN101916745 A CN 101916745A CN 2010101899219 A CN2010101899219 A CN 2010101899219A CN 201010189921 A CN201010189921 A CN 201010189921A CN 101916745 A CN101916745 A CN 101916745A
- Authority
- CN
- China
- Prior art keywords
- cathode
- electrode
- dual
- gate lead
- anode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Die Bonding (AREA)
Abstract
The invention relates to a novel plate crimped dual-chip encapsulated ceramic package, which consists of a ceramic base, a transition electrode (7) and an upper cover, wherein the ceramic base mainly comprises an anodic flange (1), a ceramic ring (2), an anodic sealing ring (3), an anodic electrode (4), a first gate fairlead (5-1), a second gate fairlead (5-2), a cathodic fairlead (6-1), and a cathodic insert (6-2); the transition electrode (7) is arranged between the ceramic base and the upper cover; and the upper cover mainly comprises a cathodic electrode (8) and a cathodic flange (9) which is concentrically welded on the other edge of the cathodic electrode (8). The new plate crimped dual-chip encapsulated ceramic package of the invention can realize serial encapsulation of two chips.
Description
(1) technical field
The present invention relates to a kind of novel ceramic package, relate in particular to a kind of compression joint type ceramic package that in single flat device, can encapsulate two chips, belong to electric and electronic technical field.
(2) background technology
Large power semiconductor device generally is made up of chip, shell, radiator.For the plate device of ceramic structure, all be the packaged type that adopts single chip, that is to say in a device, only to encapsulate a chip that this single packaged type advantage is that simple in structure, good heat dissipation effect, technological requirement are low; Shortcoming is that device volume is big, consumptive material is high, external circuit is many.Because be subjected to the restriction of individual devices capacity, when using, reality generally to adopt the serial or parallel connection of a plurality of devices, the large power semiconductor device of 6 inches this present maximum specification of picture, the individual devices capacity can reach 8500V/3000A, all will adopt the connection in series-parallel of up to a hundred devices when using on the project of transmitting and converting electricity of Three Gorges, the new device of therefore developing two or more Chip Packaging seems particularly urgent.The module package mode of employing high performance plastics shell can realize the assembled package of a plurality of chips at present, but all multifactor influences such as module package is withstand voltage owing to being subjected to, sealing, heat radiation, how therefore the general application that only is adapted at the middle low power field make the flat ceramic structure with high insulation, high strength, high sealing can realize that the composition encapsulation of two even a plurality of chips has become one of current main direction in the industry.
(3) summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, a kind of novel plate crimped dual-chip encapsulated ceramic package that can realize two chip Series Packages is provided.
The object of the present invention is achieved like this: a kind of novel plate crimped dual-chip encapsulated ceramic package, and described shell is made up of ceramic base, transition electrode and loam cake three parts;
Described ceramic base is mainly by anode flange, the porcelain ring, the anode seal ring, anode electrode, gate lead pipe one, gate lead pipe two, the cathode leg pipe, the negative electrode inserted sheet is formed, described anode seal ring inner edge is welded on the outer rim of anode electrode with one heart, the outer rim of described anode seal ring is welded on the lower surface of porcelain ring with one heart, anode flange is welded on the upper surface of porcelain ring with one heart, gate lead pipe one and gate lead pipe two levels are connected to the shell wall central authorities of porcelain ring, described cathode leg pipe level is connected to the shell wall central authorities of porcelain ring, and described negative electrode inserted sheet level is connected in the middle of the cathode leg pipe;
Described transition electrode places between ceramic base and the loam cake;
Described loam cake mainly is made up of cathode electrode and cathode flange, and cathode flange is welded on the outer rim of cathode electrode with one heart.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, the trigger end of a chip of described gate lead Guan Yiwei, the trigger end of described another chip of gate lead Guan Erwei.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, described cathode leg pipe and negative electrode inserted sheet are the cathode end of a chip, and described cathode leg pipe is connected with transition electrode.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, described porcelain ring adopts 95% aluminium oxide ceramics, has very high insulating properties.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, described anode electrode, transition electrode, cathode electrode, anode flange, anode seal ring and cathode flange adopt the oxygenless copper material of high conduction.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, all metal surfaces are electroplate with nickel.
Novel plate crimped dual-chip encapsulated ceramic package of the present invention, described gate lead pipe one, gate lead pipe two, cathode leg pipe and negative electrode inserted sheet adopt the iron-nickel alloy material that is complementary with the ceramic coefficient of expansion.
The invention has the beneficial effects as follows:
(1) insulating properties height:, thereby have very high insulating properties because the porcelain ring adopts 95% aluminium oxide ceramics.
(2) perfect heat-dissipating: because the oxygenless copper material of described anode electrode, transition electrode, cathode electrode, anode flange, anode seal ring, the high conduction of cathode flange employing, be fit to high temperature vacuum brazing, and all electrodes all have super flat surface, can closely contact with chip, thereby increased area of dissipation, improve the ability of device radiating effect and thermal fatigue resistance.
(3) good airproof performance: because described gate lead pipe, cathode leg pipe, the negative electrode inserted sheet adopts the iron-nickel alloy material that is complementary with the ceramic coefficient of expansion, therefore after the welding can and pottery between form very high intensity and sealing.
(4) good in oxidation resistance:, thereby make it not only have high conduction and can have better antioxygenic property because all metal surfaces finally electroplate the thick semi-bright nickel of 3-7 μ.
(4) description of drawings
Fig. 1 is a general structure schematic diagram of the present invention.
Fig. 2 is a ceramic base vertical view of the present invention.
Fig. 3 is a upper cover top view of the present invention.
Among the figure:
Anode flange 1, porcelain ring 2, anode seal ring 3, anode electrode 4, gate lead pipe one 5-1, gate lead pipe two 5-2, cathode leg pipe 6-1, negative electrode inserted sheet 6-2, transition electrode 7, cathode electrode 8, cathode flange 9.
(5) embodiment
Referring to Fig. 1, the present invention relates to a kind of novel plate crimped dual-chip encapsulated ceramic package, form by ceramic base, transition electrode 7 and loam cake three parts;
Referring to Fig. 1～2, described ceramic base is mainly by anode flange 1, porcelain ring 2, anode seal ring 3, anode electrode 4, gate lead pipe one 5-1, gate lead pipe two 5-2, cathode leg pipe 6-1, negative electrode inserted sheet 6-2 forms, anode seal ring 3 inner edges are welded on the outer rim of anode electrode 4 with one heart, outer rim is welded on the lower surface of porcelain ring 2 with one heart, anode flange 1 is welded on the upper surface of porcelain ring 2 with one heart, anode flange 1, the superimposed from top to bottom concentric welding of porcelain ring 2 and anode seal ring 3, gate lead pipe one 5-1 and gate lead pipe two 5-2 levels are connected to the shell wall central authorities of porcelain ring 2, and be mutually 180 ° of directions, cathode leg pipe 6-1 level is connected to the shell wall central authorities of porcelain ring 2, and it is perpendicular to close the line of gate lead pipe two 5-2 in two gate lead pipes, one 5-1, and negative electrode inserted sheet 6-2 level is connected in the middle of the cathode leg pipe 6-1.
Referring to Fig. 1, described transition electrode 7 places between ceramic base and the loam cake, and the gap between transition electrode 7 and the anode electrode 4 can encapsulate a chip, and the gap between transition electrode 7 and the cathode electrode 8 can encapsulate another chip.
Referring to Fig. 1, Fig. 3, described loam cake mainly is made up of cathode electrode 8 and cathode flange 9.Cathode flange 9 is welded on the outer rim of cathode electrode 8 with one heart.
The upper surface of described transition electrode 7 is the anode of a chip, and the lower surface is the negative electrode of another chip.
Described gate lead pipe one 5-1 is the trigger end of a chip, and described gate lead pipe two 5-2 are the trigger end of another chip.
Described cathode leg pipe 6-1, negative electrode inserted sheet 6-2 is the cathode end of a chip, is connected with transition electrode during encapsulation.
Described porcelain ring 2 adopts 95% aluminium oxide ceramics, has very high insulating properties.
Described anode electrode 4, transition electrode 7, cathode electrode 8, anode flange 1, anode seal ring 3, cathode flange 9 adopt the oxygenless copper material of high conduction, be fit to high temperature vacuum brazing, all electrodes all have super flat surface, can closely contact with chip, satisfy compression joint type encapsulation requirement, improve the ability of device radiating effect and thermal fatigue resistance.
Described gate lead pipe one 5-1, gate lead pipe two 5-2, cathode leg pipe 6-1 and negative electrode inserted sheet 6-2 adopt the iron-nickel alloy material that is complementary with the ceramic coefficient of expansion, after the welding can and pottery between form very high intensity and sealing, the thick semi-bright nickel of 3-7 μ is finally electroplated in all metal surfaces, make it have high conduction, antioxygenic property, can satisfy the encapsulation requirement of twin-core sheet well.
Claims (8)
1. novel plate crimped dual-chip encapsulated ceramic package, it is characterized in that: described shell is made up of ceramic base, transition electrode (7) and loam cake three parts;
Described ceramic base is mainly by anode flange (1), porcelain ring (2), anode seal ring (3), anode electrode (4), gate lead pipe one (5-1), gate lead pipe two (5-2), cathode leg pipe (6-1), negative electrode inserted sheet (6-2) is formed, described anode seal ring (3) inner edge is welded on the outer rim of anode electrode (4) with one heart, the outer rim of described anode seal ring (3) is welded on the lower surface of porcelain ring (2) with one heart, anode flange (1) is welded on the upper surface of porcelain ring (2) with one heart, gate lead pipe one (5-1) and gate lead pipe two (5-2) level are connected to the shell wall central authorities of porcelain ring (2), described cathode leg pipe (6-1) level is connected to the shell wall central authorities of porcelain ring (2), and described negative electrode inserted sheet (6-2) level is connected in the middle of the cathode leg pipe (6-1);
Described transition electrode (7) places between ceramic base and the loam cake;
Described loam cake mainly is made up of cathode electrode (8) and cathode flange (9), and cathode flange (9) is welded on the outer rim of cathode electrode (8) with one heart.
2. a kind of according to claim 1 novel plate crimped dual-chip encapsulated ceramic package is characterized in that: described gate lead pipe one (5-1) is the trigger end of a chip, and described gate lead pipe two (5-2) is the trigger end of another chip.
3. a kind of according to claim 1 novel plate crimped dual-chip encapsulated ceramic package, it is characterized in that: described cathode leg pipe (6-1) and negative electrode inserted sheet (6-2) are the cathode end of a chip, and described cathode leg pipe (6-1) is connected with transition electrode (7).
4. a kind of according to claim 1 novel plate crimped dual-chip encapsulated ceramic package is characterized in that: described porcelain ring (2) adopts 95% aluminium oxide ceramics.
5. as a kind of novel plate crimped dual-chip encapsulated ceramic package as described in claim 1 or 4, it is characterized in that: described anode electrode (4), transition electrode (7), cathode electrode (8), anode flange (1), anode seal ring (3) and cathode flange (9) adopt the oxygenless copper material of high conduction.
6. a kind of according to claim 1 novel plate crimped dual-chip encapsulated ceramic package, it is characterized in that: all metal surfaces are electroplate with nickel.
7. as a kind of novel plate crimped dual-chip encapsulated ceramic package as described in claim 1 or 4 or 6, it is characterized in that: described gate lead pipe one (5-1), gate lead pipe two (5-2), cathode leg pipe (6-1) and negative electrode inserted sheet (6-2) adopt the iron-nickel alloy material that is complementary with the ceramic coefficient of expansion.
8. as a kind of novel plate crimped dual-chip encapsulated ceramic package as described in the claim 5, it is characterized in that: described gate lead pipe one (5-1), gate lead pipe two (5-2), cathode leg pipe (6-1) and negative electrode inserted sheet (6-2) adopt the iron-nickel alloy material that is complementary with the ceramic coefficient of expansion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101899219A CN101916745A (en) | 2010-05-31 | 2010-05-31 | Novel plate crimped dual-chip encapsulated ceramic package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101899219A CN101916745A (en) | 2010-05-31 | 2010-05-31 | Novel plate crimped dual-chip encapsulated ceramic package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101916745A true CN101916745A (en) | 2010-12-15 |
Family
ID=43324214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101899219A Pending CN101916745A (en) | 2010-05-31 | 2010-05-31 | Novel plate crimped dual-chip encapsulated ceramic package |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101916745A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102554561A (en) * | 2011-02-01 | 2012-07-11 | 郑维舟 | Method for manufacturing power semiconductor tube |
| CN106783749A (en) * | 2016-12-15 | 2017-05-31 | 江阴市赛英电子股份有限公司 | A kind of super large-scale ceramic package structure |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1136840A (en) * | 1967-07-03 | 1968-12-18 | Licentia Gmbh | Improvements relating to semiconductor devices |
| JPS60150670A (en) * | 1984-01-17 | 1985-08-08 | Mitsubishi Electric Corp | Semiconductor device |
| CN201146179Y (en) * | 2008-06-13 | 2008-11-05 | 江阴市赛英电子有限公司 | Complete-crimp-connection rapid heat radiation type ceramic casing |
| CN101552267A (en) * | 2009-03-24 | 2009-10-07 | 徐州奥尼克电气有限公司 | Single-arm bridge type auto rectifier diode |
| CN201725787U (en) * | 2010-05-31 | 2011-01-26 | 江阴市赛英电子有限公司 | Novel plate compression joint double chip ceramic package |
-
2010
- 2010-05-31 CN CN2010101899219A patent/CN101916745A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1136840A (en) * | 1967-07-03 | 1968-12-18 | Licentia Gmbh | Improvements relating to semiconductor devices |
| JPS60150670A (en) * | 1984-01-17 | 1985-08-08 | Mitsubishi Electric Corp | Semiconductor device |
| CN201146179Y (en) * | 2008-06-13 | 2008-11-05 | 江阴市赛英电子有限公司 | Complete-crimp-connection rapid heat radiation type ceramic casing |
| CN101552267A (en) * | 2009-03-24 | 2009-10-07 | 徐州奥尼克电气有限公司 | Single-arm bridge type auto rectifier diode |
| CN201725787U (en) * | 2010-05-31 | 2011-01-26 | 江阴市赛英电子有限公司 | Novel plate compression joint double chip ceramic package |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102554561A (en) * | 2011-02-01 | 2012-07-11 | 郑维舟 | Method for manufacturing power semiconductor tube |
| CN106783749A (en) * | 2016-12-15 | 2017-05-31 | 江阴市赛英电子股份有限公司 | A kind of super large-scale ceramic package structure |
| CN106783749B (en) * | 2016-12-15 | 2019-05-17 | 江阴市赛英电子股份有限公司 | A kind of super large-scale ceramic shell structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2018227655A1 (en) | Low parasitic inductance power module and double-sided heat-dissipation low parasitic inductance power module | |
| CN107195623B (en) | Double-sided heat dissipation high-reliability power module | |
| CN103579165B (en) | A kind of Full-pressure-weldinpower power device | |
| CN104966704B (en) | A kind of compression joint type power device package of low thermal resistance | |
| CN201412704Y (en) | Light source of integrated LED chip | |
| JP2013219267A (en) | Power module | |
| US20170154834A1 (en) | Semiconductor module that have multiple paths for heat dissipation | |
| CN201725787U (en) | Novel plate compression joint double chip ceramic package | |
| EP3188232B1 (en) | Power semiconductor device and power semiconductor device production method | |
| CN101266952B (en) | Novel full-press high-power IGBT multi-mode rack porcelain tube shell | |
| CN101877332B (en) | Novel plate pressure welding type multichip packaging ceramic package | |
| WO2015064231A1 (en) | Semiconductor module | |
| CN102693969A (en) | Insulated gate bipolar translator (IGBT) power module | |
| CN202189774U (en) | Super-power thyristor packaging structure | |
| CN104362141B (en) | A kind of high-power crimp type IGBT module | |
| CN101916745A (en) | Novel plate crimped dual-chip encapsulated ceramic package | |
| CN201134424Y (en) | Fully pressure welded high-power IGBT multi-formwork ceramic cartridge | |
| CN103779342A (en) | Power semiconductor module | |
| CN214705909U (en) | Power module of 3D double-sided heat dissipation packaging structure | |
| CN116072660A (en) | SiCNOSFET multi-chip parallel subunit crimping packaging structure | |
| CN105374806A (en) | Circular-group-arranged crimping power device packaging | |
| TW201242123A (en) | Structure of the LED package | |
| CN114256172A (en) | High-reliability packaging structure and packaging process of power MOSFET | |
| CN112687676B (en) | Crimping IGBT sub-module and crimping IGBT module | |
| CN111627864B (en) | High junction temperature SiC ceramic packaging silicon stack shell structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Open date: 20101215 |