CN101652021B - 积层印刷电路板 - Google Patents

积层印刷电路板 Download PDF

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CN101652021B
CN101652021B CN2009101609213A CN200910160921A CN101652021B CN 101652021 B CN101652021 B CN 101652021B CN 2009101609213 A CN2009101609213 A CN 2009101609213A CN 200910160921 A CN200910160921 A CN 200910160921A CN 101652021 B CN101652021 B CN 101652021B
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insulating barrier
circuit board
printed circuit
resin material
front surface
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CN101652021A (zh
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吉村英明
尾崎德一
饭田宪司
阿部知行
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Fujitsu Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/036—Multilayers with layers of different types
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
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    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/421—Blind plated via connections
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/51—Plural diverse manufacturing apparatus including means for metal shaping or assembling

Abstract

一种积层印刷电路板，包括：第一绝缘层，由其中嵌入有纤维布的树脂材料形成；第二绝缘层，由树脂材料形成，并且堆叠在已经执行了加热工艺的所述第一绝缘层的前表面上；导电焊盘，形成在所述第二绝缘层的前表面上；通路，设置在穿透所述第一绝缘层和所述第二绝缘层的通孔中。所述通孔被导电材料填充，并且所述通路连接至所述导电焊盘。本发明能够确保积层印刷电路板和器件之间接合处的刚度。

Description

积层印刷电路板
相关申请的交叉参考
本申请基于2008年7月28日提交的在先日本专利申请No.2008-193386并要求其优先权，通过参考将该申请的全部内容合并于此。
技术领域
本发明涉及一种包括绝缘层的积层印刷电路板(buildup printed circuitboard)。
背景技术
众所周知，积层印刷电路板是多层结构的印刷电路板(PCB)。积层印刷电路板包括顺序堆叠的导电布线层和树脂绝缘层(resinous insulationlayer)。通孔(through hole)形成在绝缘层中。通孔填充有导电材料以生成通路(via)。通路使得位于绝缘层的相对两侧的导电布线层电连接。例如，硅石(silica)作为低热膨胀的填充物混合到绝缘层中，从而使绝缘层的热膨胀系数与导电布线层的热膨胀系数相适应(例如，参见日本特开专利申请No.2005-268517)。
例如，将半导体芯片安装在具有焊接凸块(solder bump)的积层印刷电路板的前表面上。焊接凸块夹在位于积层印刷电路板上的导电垫(conductivepad)和半导体芯片的相应导电垫之间。然而，其中混合有填充物(例如硅石)的树脂绝缘层不保证有足够的刚度。由于铜的导电布线层和绝缘层是顺序堆叠的(虽然它们的热膨胀率不同)，因此除非充分保证绝缘层的刚度，否则积层印刷电路板可能会在焊接温度发生变形。结果，可能会在积层印刷电路板和半导体芯片之间不好地形成焊接接头(solder joint)。
发明内容
根据本发明的一个方案，积层印刷电路板包括：第一绝缘层，由其中嵌入有纤维布的树脂材料形成；第二绝缘层，由树脂材料形成，该第二绝缘层堆叠在已经执行了加热工艺的第一绝缘层的前表面上；导电焊盘(conductiveland)形成在第二绝缘层的前表面上；以及通路，设置在通孔中，穿透第一绝缘层和第二绝缘层，通孔填充有导电材料，并且通路连接至导电焊盘。
本发明能够确保积层印刷电路板和器件之间接合处的刚度。
应该理解的是，前述的一般性描述和下文的详细描述都是示例性的，并不对所要求保护的本发明进行限制。
附图说明
通过下文结合附图对优选实施例的描述，本发明的上述目标、特征和优点以及其它目标、特征和优点将是显而易见的，其中：
图1示出了根据本发明一个实施例的积层印刷电路板的剖视图；
图2示出了积层印刷电路板的局部放大剖视图；
图3是示出了在第一树脂片的后表面上堆叠导电布线层的步骤的示意图；
图4是示出了在第一树脂片的前表面上堆叠第二树脂片的步骤的示意图；
图5是示出了在层叠的树脂片中形成通孔的步骤的示意图；
图6是示出了在层叠的树脂片的前表面上涂敷光致抗蚀剂的步骤的示意图；
图7是示出了在层叠的树脂片的前表面上执行电解电镀(electrolyticplate)的步骤的示意图；以及
图8是示出了从层叠的树脂片的前表面去除光致抗蚀剂的步骤的示意图。
具体实施方式
下文将参考附图陈述本发明的一个实施例。
图1示出了根据本发明的一个实施例的积层印刷电路板11的剖视图。积层印刷电路板11可以是多个绝缘层12和多个导电布线层13按顺序堆叠的层叠体。在图1的实例中，四个绝缘层12和五个导电布线层13交替叠置(interlaminate)。如下文所述的，例如，将玻璃纤维布嵌入在绝缘层12中。玻璃纤维布可以是由玻璃纤维线形成的纺织布(woven cloth)或无纺布(unwoven cloth)。根据实施例的绝缘层12具有足够的刚度以保持独立形状。也可采用芳族聚酸胺纤维布(aramid fiber cloth)来代替玻璃纤维布。
导电布线层13包括在绝缘层12上延伸的导电图案14。类似地，导电布线层13包括可以形成在绝缘层12的前表面上的导电焊盘(conductive land)15。导电图案14连接至导电焊盘15。导电焊盘15之间夹有绝缘层12，所述导电焊盘通过通路16电连接。在形成通路16的过程中，在绝缘层12中，在导电焊盘15之间形成通孔。通孔填充有导电材料。导电布线层13和通路16可以由导电材料如Cu(铜)形成。
多个导电垫17可在积层印刷电路板11的前表面露出。导电垫17连接至导电焊盘15。导电垫17由导电材料如铜(Cu)形成。覆盖层18堆叠在积层印刷电路板11前表面除导电垫17之外的区域上。例如，将树脂材料用于覆盖层18。位于积层印刷电路板11的前表面处的导电垫17电连接至位于此积层印刷电路板11的后表面处的导电布线层13。
图2示出了积层印刷电路板的局部放大剖视图。每个绝缘层12均包括第一绝缘层21和堆叠在第一绝缘层21的前表面上的第二绝缘层22。玻璃纤维布23嵌入在第一绝缘层21中。在此实施例中，玻璃纤维布23由纺织布形成。玻璃纤维布23的纤维沿着第一绝缘层21的前表面和后表面延伸。在第一绝缘层21的形成过程中，玻璃纤维布23被树脂材料浸渍。第二绝缘层22中不包括任何纤维，而是由树脂材料形成。可以采用热固性树脂(如环氧树脂)作为树脂材料。将第一绝缘层21的厚度设置为大于第二绝缘层22的厚度。例如，在此实施例中，将第一绝缘层21的厚度设置为40μm。例如，将第二绝缘层22的厚度设置为10μm。
然后，描述积层印刷电路板11的制造方法。图3是示出了在第一树脂片31的后表面上堆叠导电布线层32的步骤的示意图。在第一树脂片31中，将玻璃纤维布嵌入在树脂材料中。玻璃纤维布的纤维沿着第一树脂片31的前表面和后表面延伸。在第一树脂片31的形成过程中，玻璃纤维布被环氧树脂浸渍。导电布线层32粘贴在第一树脂片31的后表面上。在第一树脂片31上执行加热工艺。此时，将加热工艺的温度设置为使得环氧树脂没有被完全硬化。结果，环氧树脂在第一树脂片31中被半硬化(semi-hardened)。第一树脂片31的形状与导电布线层32的形状一致。第一树脂片31可认为是第一绝缘层21。导电布线层32可认为是导电布线层13。
图4是示出了在第一树脂片31的前表面上堆叠第二树脂片33的步骤的示意图。第二树脂片33由环氧树脂形成。玻璃纤维布通常不嵌入到第二树脂片33中。在第二树脂片33堆叠于第一树脂片31的前表面上的状态下，执行加热工艺。将加热工艺的温度设置为使得第一树脂片31和第二树脂片33的环氧树脂完全硬化。当第一树脂片31和第二树脂片33的环氧树脂被完全硬化时，第一树脂片31和第二树脂片33之间的界面保持紧密接触，并且形成层叠体34，因为第一树脂片31中的环氧树脂由于之前的加热工艺已经处于半硬化状态。第一树脂片31可认为是第二绝缘层22。层叠体34可认为是绝缘层12。
图5是示出了在树脂片的层叠体34中形成通孔35的步骤的示意图。层叠体34在预定位置处设置有通孔35。可通过例如激光钻孔方法形成通孔35。通孔35穿透第一树脂片31和第二树脂片33。通孔35在导电布线层32上限定一空间。在形成通孔35之后，在层叠体34的前表面上执行去钻污工艺(desmear process)，从而去除通孔35中的污迹(smear)。在去钻污工艺中，可以使用高锰酸钠或高锰酸钾。附带地，粗糙化工艺使第一树脂片31的前表面和第二树脂片33的前表面不齐平。在通孔35中，由于树脂材料融化，露出第一树脂片31的玻璃纤维布。
然后，在层叠体34的前表面上执行非电解(electroless)沉积以产生导电材料的籽晶层36。籽晶层36延伸至通孔35中。此后，如图6中所示，在籽晶层36上形成具有预定图案的光致刻蚀剂37。光致刻蚀剂37在层叠体34的前表面上以预定图案限定出的空隙(void)38。通孔35设置在空隙38内。如图7中所示，在层叠体34的前表面上执行导电材料的电解电镀。此后，去除光致刻蚀剂37。在去除光致刻蚀剂37之后，通过蚀刻层叠体34的前表面，还去除了在光致刻蚀剂37的去除区域内露出的籽晶层36。这样，在层压体34的前表面上形成导电图案14。在通孔35中形成通路16。在通孔35上形成导电焊盘15。
在去除光致刻蚀剂37之后，在层叠体34的前表面上堆叠另一第一树脂片31。将导电布线层13夹在层叠体34和第一树脂片31之间。第一树脂片31受加热工艺的处理，并进一步粘贴在层叠体34的前表面上。如上文所述，第一树脂片31的形状与导电布线层13的形状相一致。此后，类似地重复第二树脂片33的堆叠和加热工艺、通孔35的形成、非电解电镀、光致刻蚀剂37的沉积、电解电镀以及光致刻蚀剂37的去除。这样，形成规定数量的绝缘层12和导电布线层13的堆叠层。层叠体34的最上面一层设置有导电垫17和覆盖层18。这样，完成积层印刷电路板11的制造。
根据积层印刷电路板11的一实施例，将玻璃纤维布23嵌入在绝缘层12中。结果，绝缘层12的热膨胀系数被抑制为低。绝缘层12的热膨胀系数与导电布线层13的热膨胀系数相适应，从而可抑制在积层印刷电路板11中出现的应力。另外，由于玻璃纤维布23，绝缘层12的刚度增加。因此，即使器件(如半导体芯片)安装在积层印刷电路板11的前表面上，也可以确保积层印刷电路板11和器件之间接合处的刚度。
作为比较实例，在玻璃纤维布23相邻地嵌入到绝缘层12的前表面的情况下，玻璃纤维布可相对于绝缘层12露出。在这种情况下，当用于籽晶层36的电镀溶液流入通孔35时，电镀溶液可沿树脂材料和玻璃纤维布的纤维之间的界面浸透到绝缘层12中。由此，通路16可经由电镀溶液连接至形成在第二树脂片33的前表面上的导电布线层13。结果，通路16可电连接至导电图案14，并且导电图案中可出现异常。这种积层印刷电路板是不可使用的。
根据前述的实施例，当形成籽晶层36时，电镀溶液流入通孔35。当玻璃纤维布在通孔35中露出时，电解溶液也可沿着树脂材料和玻璃纤维布的纤维之间的界面浸透到第一树脂片31中。然而，根据积层印刷布线板11的实施例，可在第一树脂片31上堆叠第二树脂片33。结果，可以可靠地防止玻璃纤维布从绝缘层12的前表面(即第二树脂片33的前表面)露出。因此，即使电镀溶液沿着树脂材料和纤维之间的界面浸透，也可防止电镀溶液到达第二树脂片33的前表面。因此，可防止通路16电连接至导电图案14。
这里记载的所有实例和条件性语言旨在用作教导性目的，以帮助读者理解本发明和发明人对现有技术改进提出的概念。应将本文记载的所有实例和条件性语言解读为不受到这些具体记载的实例和条件的限制，说明书中这些实例的构成也不涉及显示本发明的优势和不足。尽管已经详细描述了本发明的实施例，但应理解的是，可对本发明进行各种改变、替代和变化，而不偏离本发明的精神和范围。

Claims (6)

1.一种印刷电路板，包括：
第一绝缘层，包括其中嵌入有纤维布的热固性树脂材料；
第二绝缘层，包括树脂材料，所述第二绝缘层堆叠在所述第一绝缘层的前表面上并且受到加热工艺的处理；
导电焊盘，设置在所述第二绝缘层的前表面上；以及
通路，包括穿透所述第一绝缘层和所述第二绝缘层的通孔，所述通孔填充有导电材料，所述通路连接至所述导电焊盘，
其中所述第二绝缘层中没有嵌入纤维布。
2.根据权利要求1所述的印刷电路板，其中：
所述第一绝缘层的所述树脂材料包括热固性树脂材料；以及
执行所述加热工艺直到所述第一绝缘层的所述热固性树脂材料达到半硬化状态为止。
3.根据权利要求1所述的印刷电路板，其中所述纤维布包括玻璃纤维和芳族聚酸胺纤维至少其中之一。
4.根据权利要求1所述的印刷电路板，其中所述纤维包括纺织布和无纺布其中之一。
5.一种印刷电路板的制造方法，包括：
将纤维布嵌入在树脂材料中以形成第一绝缘层；
在所述第一绝缘层上执行第一加热工艺；
在已经执行了所述第一加热工艺的所述第一绝缘层的前表面上堆叠树脂材料的第二绝缘层；
在所述第一绝缘层和所述第二绝缘层上执行第二加热工艺；
形成穿透所述第二绝缘层和所述第一绝缘层的通孔；
将导电材料填充在所述通孔中以形成通路；以及
在所述第二绝缘层的前表面上形成导电焊盘，以将所述导电焊盘连接至所述通路，
其中所述第二绝缘层中没有嵌入纤维布。
6.根据权利要求5所述的印刷电路板的制造方法，其中：
所述第一绝缘层的所述树脂材料为热固性树脂材料；以及
执行所述第一加热工艺直到所述第一绝缘层的所述热固性树脂材料达到半硬化状态为止。
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