CN101542293B - 微芯片衬底的接合方法以及微芯片 - Google Patents

微芯片衬底的接合方法以及微芯片 Download PDF

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CN101542293B
CN101542293B CN2007800434314A CN200780043431A CN101542293B CN 101542293 B CN101542293 B CN 101542293B CN 2007800434314 A CN2007800434314 A CN 2007800434314A CN 200780043431 A CN200780043431 A CN 200780043431A CN 101542293 B CN101542293 B CN 101542293B
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film
sio
mentioned
microchip substrate
microchip
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CN101542293A (zh
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平山博士
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Konica Minolta Opto Inc
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Konica Minolta Opto Inc
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00—Assembling of devices or systems from individually processed components
    • B81C3/001—Bonding of two components
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
    • B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
    • B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
    • B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
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Abstract

提供一种接合方法，能够在微细流路的内表面上形成亲水性的膜，简单地把衬底相互接合起来而制造微芯片。对于在表面上形成了微细流路(11)的微芯片衬底(10)，在形成了微细流路(11)的面上形成SiO2膜(12)。此时，在微细流路(11)的内表面上和与微芯片衬底(20)接合的面(接合面)上形成SiO2膜。对于板状的微芯片衬底(20)也是，在与微芯片衬底(10)接合的面(接合面)上形成SiO2膜(21)。然后，通过激活SiO2膜(12、21)的表面，把微芯片衬底(10)和微芯片衬底(20)接合起来。

Description

微芯片衬底的接合方法以及微芯片
技术领域
本发明涉及把形成有流路用槽的微芯片衬底接合起来的方法、以及用该方法制造的微芯片。
背景技术
利用微细加工技术在硅或玻璃衬底上形成微细流路和电路，在微小空间上进行核酸、蛋白质、血液等液体试样的化学反应、分离和分析等的被称为微分析芯片或μTAS(Micro Total Analysis Systems，微总分析系统)的装置正在实用化。作为这样的微芯片的优点，有减少样品和试剂的使用量或废液排出量、能实现节省空间且可携带移动的廉价系统。
通过把对至少一个部件进行了微细加工的两个部件粘合起来制造微芯片。在现有技术中，微芯片中使用玻璃衬底，提出了各种各样的微细加工方法。但是，由于玻璃衬底不适合大量生产、成本非常高，所以希望开发廉价且可一次性使用的树脂制微芯片。
另外，在这样的向微芯片那样的微细流路中通液进行检查的元件中，对流路表面进行赋予亲水性的性质的处理，以使得蛋白质等的液体试样不会附着在流路上。
作为对流路表面进行赋予亲水性的性质的处理，有涂敷有机物/无机物、等离子体处理、通过在流路内流过溶液进行表面修饰等的方法。其中，SiO2膜的涂层的亲水性很好，而且由于是无机物所以作为材料有稳定且具有高透明度等特长。
另外，作为把微芯片衬底接合起来的方法，有用粘接剂接合的方法、用有机溶剂溶解树脂衬底的表面而进行接合的方法(例如专利文献1)、利用超声波熔接进行接合的方法(例如专利文献2)、利用热熔接进行接合的方法(例如专利文献3)、利用激光熔接的方法(例如专利文献4)等。
<专利文献1>日本特开2005-80569号公报
<专利文献2>日本特开2005-77239号公报
<专利文献3>日本特开2005-771218号公报
<专利文献4>日本特开2005-74796号公报
发明内容
(发明要解决的问题)
在微芯片衬底上未形成具有亲水性的膜时，能够用上述那样的方法把树脂制的微芯片衬底相互接合起来。另外，在超声波熔接、热熔接和激光熔接中，由于都是通过使衬底的树脂表面熔化后再次固化而把树脂制的微芯片衬底相互接合起来，所以在微细流路的内表面上形成亲水性的膜且在接合面上也形成亲水性的膜时，难以把微芯片衬底相互接合起来。
尤其是作为亲水性的膜利用无机物SiO2膜时，由于通常在微芯片衬底相互间的接合面上也形成SiO2膜，所以一般在微芯片衬底相互的接合中用粘接剂。
但是，用粘接剂把微芯片衬底相互接合时有图3所示的问题。图3是用来说明根据现有技术的微芯片衬底的接合方法的微芯片衬底的剖面图。例如，如图3(a)所示，在表面上形成有微细流路102的微芯片衬底101上形成SiO2膜103。此时，不仅在微细流路102的内表面上，而且在与相对应的衬底接合的面(接合面)上也形成SiO2膜103。然后，考虑在用来覆盖微细流路102的平板状微芯片衬底104上形成SiO2膜105，用粘接剂106把两衬底接合起来的方式。象这样用粘接剂106把衬底相互接合起来时，恐怕会如虚线的圆所示那样，粘接剂106渗出到微细流路102内而堵塞微细流路102。另外，由于粘接剂106硬化后的主要成分为树脂，显示疏水性，所以恐怕会妨碍SiO2膜带来的亲水性功能。
另外，还考虑了如图3(b)所示，只在微细流路102的内表面上形成SiO2膜103，在微芯片衬底104上的与该微细流路102对应的位置上形成SiO2膜105，用粘接剂106把衬底相互接合起来的方式。但是，这样的情况下，由于粘接剂106比SiO2膜105厚，所以恐怕粘接剂106会渗出到微细流路102内。
另外，还考虑了如图3(c)所示，只在微细流路102的内表面上形成SiO2膜103，在微芯片衬底104上的与该微细流路102对应的位置上形成SiO2膜105，用热熔接、激光熔接或超声波熔接把衬底相互接合起来的方式。但是，这样的情况下，必须在微芯片衬底101和微芯片衬底104两者中都进行SiO2膜的构图。而且，如果不能高精度地确定在微芯片衬底104上形成SiO2膜105的位置，则如虚线的圆所示，在微细流路102中露出微芯片衬底104的表面(树脂)，不能只用具有亲水性功能的SiO2膜覆盖微细流路102。其结果，恐怕不能保证微细流路102中的亲水性功能。
如上所述，用粘接剂时存在粘接剂会渗出到微细流路内的问题，而不用粘接剂时还存在必须高精度地确定形成SiO2膜的位置而该位置对准难以实现的问题。不管用哪种方法都存在难以在微细流路内确保SiO2膜带来的亲水性功能的问题。另外，现有的方法中，从成本上看也不适合批量生产。
本发明正是为了解决上述问题而提出的，其目的在于提供在微细流路的内表面上形成亲水性的膜，不用粘接剂就能够把微细芯片衬底相互接合起来而制造微芯片的接合方法以及该微芯片。
(用来解决问题的手段)
本发明的方式1是一种微芯片衬底的接合方法，在两个树脂制部件中的至少一个树脂制部件上形成流路用槽，以形成有上述流路用槽的面为内侧把上述两个树脂制部件接合起来，其特征在于：通过对上述两个树脂制部件的每一个，在要接合的面的表面上形成以SiO2为主要成分的SiO2膜，并激活上述SiO2膜，从而把上述两个树脂制部件接合起来。
另外，本发明的方式2是如方式1所述的微芯片衬底的接合方法，其特征在于：通过紫外线照射进行上述激活。
另外，本发明的方式3是如方式2所述的微芯片衬底的接合方法，其特征在于：上述紫外线照射中用的紫外线的波长为170nm～180nm。
另外，本发明的方式4是如方式1所述的微芯片衬底的接合方法，其特征在于：通过等离子体照射进行上述激活。
另外，本发明的方式5是如方式1所述的微芯片衬底的接合方法，其特征在于：通过离子束照射进行上述激活。
另外，本发明的方式6是如方式1～5中任一项所述的微芯片衬底的接合方法，其特征在于：上述SiO2膜的表面粗糙度Ra为Ra≤2nm。
另外，本发明的方式7是如方式1～6中任一项所述的微芯片衬底的接合方法，其特征在于：上述两个树脂制部件的表面即形成有上述SiO2膜的面的表面粗糙度Ra为Ra≤2nm。
另外，本发明的方式8是如方式1～5中任一项所述的微芯片衬底的接合方法，其特征在于：上述两个树脂制部件中的形成有上述流路用槽的树脂制部件是板状部件，未形成上述流路用槽的树脂制部件是膜状部件。
另外，本发明的方式9是一种微芯片，其特征在于，该微芯片是利用如方式1～8中任一项所述的微芯片衬底的接合方法接合而成的。
另外，本发明的方式10是一种微芯片，该微芯片是在两个树脂制部件中的至少一个树脂制部件上形成流路用槽，以形成有上述流路用槽的面为内侧把上述两个树脂制部件接合而成的，其特征在于：在上述两个树脂制部件之间形成两层以上的SiO2膜，利用上述两层以上的SiO2膜把上述两个树脂制部件接合起来。
另外，本发明的方式11是如方式10所述的微芯片，其特征在于：上述两层以上的SiO2膜的边界处的表面粗糙度Ra为Ra≤2nm。
另外，本发明的方式12是如方式10或11所述的微芯片，其特征在于：上述两个树脂制部件的表面即形成有上述SiO2膜的面的表面粗糙度Ra为Ra≤2nm。
另外，本发明的方式13是如方式10～12中任一项所述的微芯片，其特征在于：上述两个树脂制部件中的形成有上述流路用槽的树脂制部件是板状部件，未形成上述流路用槽的树脂制部件是膜状部件。
(发明的效果)
根据本发明，能够不用粘接剂而制造在流路用槽的内表面上形成有SiO2膜的微芯片。
附图说明
图1是用来说明根据本发明的实施方式1的微芯片衬底的接合方法的微芯片衬底的剖面图。
图2是用来说明根据本发明的实施方式2的微芯片衬底的接合方法的微芯片衬底的剖面图。
图3是用来说明根据现有技术的微芯片衬底的接合方法的微芯片衬底的剖面图。
(附图标记说明)
10、20、30：微芯片衬底
11、31、40：微细流路
12、13、21、22、32、33：SiO2膜
具体实施方式
[实施方式1]
参照图1说明根据本发明的实施方式1的微芯片衬底的接合方法、以及用该方法制造的微芯片。图1是用来说明根据本发明的实施方式1的微芯片衬底的接合方法的微芯片衬底的剖面图。
如图1(a)所示，在微芯片衬底10的表面上形成槽状的微细流路11。作为与微芯片衬底10接合的相对应方的微芯片衬底20是平板状的衬底。通过把形成微细流路11的面作为内侧而接合微芯片衬底10和微芯片衬底20，微芯片衬底20用作微细流路11的盖，制成微芯片。另外，微芯片衬底10、20相当于本发明的“树脂制部件”的一例。
微芯片衬底10、20使用树脂。作为该树脂的条件，可举出成形性(转印性、脱模性)良好、透明性高、针对紫外线和可见光的自荧光性低等，但没有特别限制。例如，聚碳酸酯、聚甲基丙烯酸甲酯、聚苯乙烯、聚丙烯腈、聚氯乙烯、聚对苯二甲酸乙二酯、尼龙6、尼龙66、聚醋酸乙烯、聚偏氯乙烯、聚丙烯、聚异戊二烯、聚乙烯、聚二甲基硅氧烷、环状聚烯烃等是优选的。尤其，聚甲基丙烯酸甲酯、环状聚烯烃等是优选的。微芯片衬底10和微芯片衬底20可以用相同的材料，也可以用不同的材料。
至于微芯片衬底10、20的形状，只要是容易取放和分析的形状，则什么样的形状都行。例如，大约10mm见方～200mm见方的大小是优选的，10mm见方～100mm见方的大小是更优选的。微芯片衬底10、20的形状只要适合分析方法和分析装置即可，正方形、长方形、圆形等的形状是优选的。
微细流路11的形状优选是能够减少分析试样、试剂的使用量的形状。另外，考虑到成型模具的制作精度、转印性、脱模性等，宽度和深度都是10μm～200μm的范围内的值是优选的，但没有特别的限制。另外，长宽比(槽的深度/槽的宽度)为0.1～3左右是优选的，为0.2～2左右是更优选的。另外，微细流路11的宽度和深度可以根据微芯片的用途确定。另外，为了便于说明，图1所示的微细流路11的剖面形状为矩形形状，但该形状仅是微细流路11的一例，也可以是曲面形状。
另外，形成了微细流路11的微芯片衬底10的板厚，考虑到成形性，0.2mm～5mm左右是优选的，0.5mm～2mm是更优选的。考虑到成形性，用作用来覆盖微细流路11的盖的微芯片衬底20的板厚优选是大约0.2mm～5mm，更优选是0.5mm～2mm。另外，在用作盖的微芯片衬底20上未形成微细流路时，也可以不是板状部件，而是用膜(片状部件)。此时，膜的厚度优选是30μm～300μm，更优选是50μm～150μm。
然后，如图1(b)所示，在微芯片衬底10的表面上形成SiO2膜12，在微芯片衬底20的表面上形成SiO2膜21。对于形成有微细流路11的微芯片衬底10，在形成有微细流路11的面上形成SiO2膜12。此时，在微细流路11的内表面上形成SiO2膜，且在与微芯片衬底20接合的面(接合面)上也形成SiO2膜。SiO2膜12、21是以SiO2为主要成分的膜，只要是能保证SiO2膜的亲水性功能的程度，即使含有SiO2膜以外的杂质也没关系。
(SiO2膜的形成方法)
SiO2膜12、21可以通过例如蒸镀、溅射、CVD或涂敷形成，但对其形成方法没有特别限制。另外，SiO2膜12和SiO2膜21的形成方法也可以不同。由于利用涂敷、溅射或CVD的形成方法能够在微细流路11的内表面尤其是微细流路11的垂直壁面上形成紧密结合性良好的SiO2膜，所以是更优选的方法。
(利用涂敷形成SiO2膜的例子)
例如，利用涂敷形成SiO2膜12、21时，通过在微芯片衬底10、20的表面上涂敷在硬化后要成为SiO2膜的涂敷溶液，然后使涂敷溶液硬化，能够在微芯片衬底10、20的表面上形成SiO2膜12、21。
作为涂敷溶液，例如，使用把硅氧烷加水分解、缩聚得到的聚硅烷低聚物溶解到乙醇溶剂中得到的溶液。此时，加热涂敷溶液使乙醇溶剂挥发而形成SiO2膜。具体地，可以举出JSR公司制的“グラスカ7003(GLASCA7003)”和コルコ一ト(COLCOAT)公司制的“硅酸甲酯51”等。
另外，涂敷溶液使用把全氢化聚硅氧烷溶解到二甲苯、二丁醚溶剂中得到的溶液。此时，在加热涂敷溶液而使溶剂挥发的同时与水反应，形成SiO2膜。具体地，可以举出AZ电子材料公司(AZ ElectronicMaterials)制的“アクアミカ(AQUAMICA)”等。
另外，涂敷溶液使用把含有烷氧基甲硅烷基(alkoxysilyl)的聚合物和烷氧基硅烷加水分解、共聚得到的无机-有机混合聚合物溶解到乙醇溶剂中得到的溶液。此时，加热使乙醇溶剂挥发而形成以SiO2为主要成分的混合膜。具体地，可以举出JSR公司制的“グラスカ7506(GLASCA7506)”等。
(涂敷溶液的涂敷方法)
把涂敷溶液均匀地涂敷到微芯片衬底10、20上是重要的。考虑涂敷溶液的物理性质(粘度、挥发性)而适当选择涂敷方法。例如，可举出浸涂、喷涂、旋涂、缝涂、丝网印刷、移印(pad printing)、喷墨印刷等。
然后，通过使涂敷溶液硬化而形成SiO2膜12、21。例如，使用热硬化性的涂敷溶液时，通过实施热处理使涂敷溶液硬化，形成SiO2膜12、21。
(涂敷溶液的硬化方法)
使涂敷溶液硬化而形成SiO2膜时，希望使涂敷溶液的溶剂充分挥发，能够形成SiO2的强固的网络结构。考虑涂敷溶液的物理性质(粘度、挥发性、催化剂)而适当选择硬化方法。例如，可以在常温下放置涂敷溶液而硬化，也可以通过把涂敷溶液加热到60℃～100℃的温度而硬化，也可以在高温高湿(温度60℃、湿度90％，温度80℃、湿度90％等)下使涂敷溶液硬化。另外，也可以利用紫外线硬化、可见光硬化等使涂敷溶液硬化。
(利用溅射形成SiO2膜的例子)
另外，利用溅射形成SiO2膜12、21时，例如，使用シンクロン(SHINCRON)公司制的溅射装置(装置名：RAS-1100C)形成了SiO2膜12、21。分成硅的金属膜形成室和氧化室，旋转贴附有基材的鼓而形成SiO2膜12、21。例如，在氩气流量为250sccm、氧气流量为120sccm、RF输出为4.5kW、膜形成速度为/秒的条件下，形成了200nm的SiO2膜12、21。
(利用CVD形成SiO2膜的例子)
另外，利用CVD形成SiO2膜12、21时，例如，使用SAMCO株式会社制的CVD装置(装置名：PD-270ST)形成了SiO2膜12、21。通过使TEOS(四乙氧基硅烷)、TMOS(四甲氧基硅烷)等含硅的液体源气化，在等离子体空间中分解、氧化，形成SiO2膜12、21。例如，在TEOS流量为12sccm、氧气流量为400sccm、RF输出为300W、压力为50Pa、膜形成速度为
Figure G2007800434314D00082
/秒的条件下，形成了200nm的SiO2膜12、21。
(SiO2膜的膜厚)
考虑完全用SiO2膜覆盖微细流路11的内表面、能确保与微细流路11的紧密结合性、不堵塞微细流路11等因素，确定SiO2膜12、21的膜厚。利用涂敷形成SiO2膜时根据涂敷溶液的特性、种类调整膜厚。例如，10nm～3μm范围内的值是优选的，10nm～2μm范围内的值是更优选的。而利用溅射或CVD形成SiO2膜时，即形成致密的SiO2膜时，由于SiO2膜的内部应力有增加的倾向，所以10nm～1μm范围内的值是优选的，10nm～200nm范围内的值是更优选的。
(SiO2膜的表面粗糙度)
象本实施方式这样，不用粘接剂，通过SiO2膜把微芯片衬底10和微芯片衬底20接合起来时，SiO2膜的表面状态对接合强度有很大影响，所以SiO2膜的表面粗糙度Ra(JIS-B0601)是重要的。由于在SiO2膜的表面上生成的OH基的结合键是以分子级别结合，所以衬底相互间的接触面平坦且接触面积大的情况是优选的。
例如，已经确认，只要SiO2膜12、21的表面粗糙度Ra为Ra≤2nm，在向微细流路11内部压送液体和电泳等时不会发生液体泄漏、衬底剥离。因此，SiO2膜12、21的表面粗糙度Ra优选是Ra≤2nm，更优选是Ra≤1nm。
而且，关于平面性，以微米级别增加而不是以纳米级别增加接触面积的意义重大。在形成树脂制的微芯片衬底时，有时难以确保孔穴和槽的附近的平面性。此时，通过使用板状部件作为形成了微细流路的微芯片衬底，使用膜作为未形成微细流路的微芯片衬底，即使在得不到形成了微细流路的微芯片衬底的平面性时，也能确保衬底相互间的良好的紧密结合性。
另外，在微芯片衬底的均匀平面上形成SiO2膜时，该SiO2膜的表面粗糙度与微芯片衬底的表面粗糙度大致相等。用蒸镀、溅射或CVD形成SiO2膜时，该倾向尤其强。因此，把SiO2膜的表面粗糙度抑制到很小时，不管是使用板状部件时还是使用膜时，都希望减小成形的微芯片衬底的表面粗糙度。例如，微芯片衬底的表面即形成有SiO2膜的面的表面粗糙度Ra优选是Ra≤2nm，更优选是Ra≤1nm。这样，在难以减小微芯片衬底的表面粗糙度时，可以在微芯片衬底上形成稍厚(例如1μm以上)的SiO2膜，通过抛光加工(lapping)、镜面加工、CMP加工等实现超精密平面(Ra≤1nm)。
接着，激活SiO2膜的表面，然后如图1(c)所示，使形成了SiO2膜的面作为内侧，把微芯片衬底10和微芯片衬底20重叠起来。由此，能够利用表面被激活的SiO2膜13、22把微芯片衬底10和微芯片衬底20接合起来，制造微芯片。在微芯片衬底10和微芯片衬底20之间只夹着两层SiO2膜13、22，而不是象现有技术那样夹着粘接剂等物质。
(激活的方法)
激活指使原子和分子获得光、热等能量而成为高能量状态。在本实施方式中激活SiO2膜12、21是指通过照射光、热等的高能量来分解、除去在SiO2膜12、21的表面上附着的有机物等，由此在SiO2膜12、21的表面上形成OH基的结合键，成为容易发生化学反应的状态。作为SiO2膜12、21的激活方法，可举出紫外线照射、等离子体照射、离子束照射、超声波清洗、酸碱清洗、加热等，但并不特别限于这些方法。在此，作为激活的一例，详细说明紫外线照射、离子束照射和等离子体照射。
(紫外线照射的例子)
利用紫外线照射激活SiO2膜12、21时，向SiO2膜12、21照射波长为170nm～180nm的紫外线而激活是优选的。例如，使用牛尾(USHIO)电机株式会社制的激态光照射装置(UER20-172C型)，在波长为172nm、放射强度为10mW/cm2的条件下照射激态光，激活SiO2膜12、21的表面。通过向SiO2膜12、21的表面照射激态光而分解除去微量的有机物。另外，通过使激态光直接作用于空间中存在的氧，产生高浓度的激励氧原子、臭氧等活性氧种，分解除去微量的有机物，形成OH基的结合键，从而激活SiO2膜12、21的表面。
例如，波长为172nm的激态光的光能量为166.6kcal/mol，比几乎所有的分子结合能还高，所以在激活SiO2膜12、21的表面时是有效的。
(离子照射的例子)
另外，利用离子照射激活SiO2膜12、21时，例如，使用光驰(OPTORUN)株式会社制的RF离子源(OIS-two型)，在氧气流量为50sccm、氩气流量为8sccm、离子束电压为500V、离子束电流为400mA、真空度为1.5×10-2Pa的条件下照射离子，激活SiO2膜12、21的表面。通过向SiO2膜12、21的表面照射氧离子、氩离子，分解除去微量的有机物，形成OH基的结合键，从而激活SiO2膜12、21的表面。
(等离子体照射的例子)
另外，利用等离子体照射激活SiO2膜12、21时，例如，使用SAMCO株式会社制的等离子体干洗机(PC-1000型)，在氧气流量为200sccm、RF输出为400W、真空度为50Pa的条件下照射等离子体，激活SiO2膜12、21的表面。通过向SiO2膜12、21的表面照射等离子体，分解除去微量的有机物，形成OH基的结合键，激活SiO2膜12、21的表面。等离子体中存在气体、电子、激励种、离子、基团，它们作用在SiO2膜12、21的表面上而被激活。
如上所述，通过在微芯片衬底10、20的接合面上形成SiO2膜12、21，把微芯片衬底10、20重叠后激活SiO2膜12、21，可以不使用有可能妨碍亲水性功能的粘接剂而把微芯片衬底10和微芯片衬底20接合起来。而且，由于在微细流路11的内表面上也形成SiO2膜，所以可以在微细流路11的内表面上具有亲水性功能。
由于SiO2膜具有亲水性功能，所以可以抑制蛋白质等的低分子和高分子附着在微细流路11的内表面上。微芯片衬底10、20由于用树脂构成而通常是疏水性的，蛋白质等的低分子和高分子容易附着在微细流路11上，但通过形成SiO2膜可以抑制其附着。
另外，SiO2膜由于化学性质稳定，所以能够稳定地保持亲水性功能。虽然通过等离子体处理能对树脂制的微芯片衬底10、20的表面进行亲水化处理，但效果随时间减小，多数情况下几天后亲水性功能就消失了。另外，通过在微芯片衬底10、20的表面上浸涂低聚乙二醇和2-甲基丙烯酰羟乙基磷酰胆碱(2-methacryloyl-oxyethyl-phosphorylcholine)等的高分子等进行表面修饰也可以进行亲水化处理，但表面修饰基的吸附力弱，成为产生不均匀等的原因，有时无法得到均匀的亲水性的表面。
与此相对，通过在形成有微细流路11的微芯片衬底10和用作盖的微芯片衬底20上形成SiO2膜，即使在微芯片衬底10和微芯片衬底20的树脂材料不同时也可以形成相同的表面状态。由此可以增加分析的正确性和可靠性。如果衬底的表面状态不同，会有被分析的液体的流速和反应中产生波动、分析芯片的检测灵敏度低的问题。通过在微细流路11的内表面上形成SiO2膜，可以抑制波动的产生，提高分析芯片的检测灵敏度。
[实施方式2]
下面，参照图2说明根据本发明的实施方式2的微芯片衬底的接合方法、以及用该方法制造的微芯片。图2是用来说明根据本发明的实施方式2的微芯片衬底的接合方法的微芯片衬底的剖面图。在上述实施方式1中只在一个微芯片衬底上形成了微细流路，而在实施方式2中在两个微芯片衬底上都形成了微细流路。
如图2(a)所示，准备在表面上形成有微细流路11的微芯片衬底10和同样地在表面上形成有微细流路31的微芯片衬底30。通过以微细流路11、微细流路31为内侧把微芯片衬底10和微芯片衬底30接合起来，形成更深的微细流路。
然后，如图2(b)所示，在微芯片衬底10的表面上形成SiO2膜12，在微芯片衬底30的表面上形成SiO2膜32。在两个衬底中也是，在形成有微细流路11、31的面上形成SiO2膜12、32。此时，在微细流路11、31的内表面上形成SiO2膜，且在与相对应方的衬底接合的面(接合面)上也形成SiO2膜12、32。
SiO2膜12、32，与实施方式1同样地，可以通过例如蒸镀、溅射、CVD或涂敷形成，另外，SiO2膜12、32的膜厚、表面粗糙度Ra也与实施方式1中的膜厚、表面粗糙度Ra相同。
接着，与实施方式1同样地，激活SiO2膜的表面，然后如图2(c)所示，使形成了SiO2膜的面作为内侧，把微芯片衬底10和微芯片衬底30重叠起来。此时，进行微细流路11、31的位置对准，使微细流路11和微细流路31在相同的位置上重叠。由此，能够利用表面被激活了的SiO2膜13、33把微芯片衬底10和微芯片衬底30接合起来，制造微芯片。利用该接合可以形成槽的长宽比大的微细流路40。在微芯片衬底10和微芯片衬底30之间只夹着SiO2膜13、33，而不是象现有技术那样夹着粘接剂等的物质。
作为SiO2膜的激活方法，与实施方式1相同，可以利用紫外线照射、等离子体照射、离子束照射、超声波清洗、酸碱清洗或加热等方法激活SiO2膜。
如上所述，通过在微芯片衬底10、30的接合面上形成SiO2膜12、32，把微芯片衬底10、30重叠后激活SiO2膜12、32，可以不使用有可能妨碍亲水性功能的粘接剂而把微芯片衬底10和微芯片衬底30接合起来。而且，由于在微细流路11、31的内表面上也形成SiO2膜，所以可以在微细流路40的内表面上具有亲水性功能。
[实施例]
下面，说明具体的实施例。
(实施例1)
(微芯片衬底)
用射出成形机把透明树脂材料即环状聚烯烃树脂(日本ZEON公司制，ZEONOR)成形，在外形尺寸为50mm×50mm×1mm的板状部件上制作了由宽50μm、深50μm的多个微细流路和内径为2mm的多个贯通孔构成的流路侧微芯片衬底。该流路侧微芯片衬底相当于上述实施方式1中的形成有微细流路11的微芯片衬底10。另外，盖侧微芯片衬底使用切割成与流路侧微芯片衬底相同的大小的透明树脂膜(日本ZEON公司制，ZEONOR膜)。膜的厚度为100μm。该膜状的盖侧微芯片衬底相当于实施方式1中的用作盖的微芯片衬底20。
(SiO2膜的形成)
在实施例1中利用CVD形成了SiO2膜。使用SAMCO公司制的CVD装置(装置名：PD-270ST)在上述流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了SiO2膜。在TEOS流量为12sccm、氧气流量为400sccm、RF输出为300W、压力为50Pa、膜形成速度为
Figure G2007800434314D00141
/秒的条件下，在流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了200nm的SiO2膜。通过使用CVD膜形成装置，在宽50μm、深50μm的微细流路的内表面上也形成了均匀的SiO2膜。另外，微细流路内的SiO2膜的厚度为130nm。
(接合)
在实施例1中，利用紫外线照射激活了SiO2膜。使用牛尾电机公司制的激态光照射装置(UER20-172C型)，在波长为172nm、放射强度为10mV/cm2的条件下向SiO2膜照射30秒紫外线，激活了流路侧微芯片衬底和盖侧微芯片衬底的SiO2膜。然后，为了不丧失表面的活性状态，在1分钟以内，以微细流路为内侧，用0.2kgf/cm2的力把流路侧微芯片衬底和盖侧微芯片衬底压合从而接合起来。由此制成了微芯片。
(评价)
把上述微芯片连接到注射泵上，压送水后，未从微细流路泄漏液体，显示出足够的密封性，水的浸润性也很好，显示出足够的亲水性。另外，送液压力为0.13MPa。
(实施例2)
(微芯片衬底)
用射出成形机把透明树脂材料即环状聚烯烃树脂(日本ZEON公司制，ZEONOR)成形，制作了在外形尺寸为50mm×50mm×1mm的板状部件上由宽50μm、深50μm的多个微细流路和内径为2mm的多个贯通孔构成的流路侧微芯片衬底。该流路侧微芯片衬底相当于上述实施方式1中的形成有微细流路11的微芯片衬底10。另外，盖侧微芯片衬底使用了切割成与流路侧微芯片衬底相同大小的透明树脂膜(日本ZEON公司制，ZEONOR膜)。膜的厚度为100μm。该膜状的盖侧微芯片衬底相当于实施方式1中的用作盖的微芯片衬底20。
(SiO2膜的形成)
在实施例1中利用CVD形成了SiO2膜。使用SAMCO公司制的CVD装置(装置名：PD-270ST)在上述流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了SiO2膜。在TEOS流量为12sccm、氧气流量为400sccm、RF输出为300W、压力为50Pa、膜形成速度为
Figure G2007800434314D00151
/秒的条件下，在流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了200nm的SiO2膜。通过使用CVD膜形成装置，在宽50μm、深50μm的微细流路的内表面上也形成了均匀的SiO2膜。另外，微细流路内的SiO2膜的厚度为130nm。
(接合)
在实施例2中，利用离子照射激活了SiO2膜。使用光驰株式会社制的RF离子源(OIS-two型)，在氧气流量为50sccm、氩气流量为8sccm、离子束电压为500V、离子束电流为400mA、真空度为1.5×10-2Pa的条件下向SiO2膜照射30秒离子束，激活了流路侧微芯片衬底和盖侧微芯片衬底的SiO2膜。然后，为了不丧失表面的活性状态，在从大气开放起5分钟以内，以微细流路为内侧，用0.2kgf/cm2的力把流路侧微芯片衬底和盖侧微芯片衬底压合从而接合起来。由此制成了微芯片。另外，在实施例2中，在对大气开放了的状态下把衬底相互压合起来，但如果在照射离子束后不进行大气开放而在真空中压合，则能够更强固地把衬底相互接合。
(评价)
把上述微芯片连接到注射泵上，压送水后，未从微细流路泄漏液体，显示出足够的密封性，水的浸润性也很好，显示出足够的亲水性。另外，送液压力为0.13MPa。
(实施例3)
(微芯片衬底)
用射出成形机把透明树脂材料即环状聚烯烃树脂(日本ZEON公司制，ZEONOR)成形，制作了在外形尺寸为50mm×50mm×1mm的板状部件上由宽50μm、深50μm的多个微细流路和内径为2mm的多个贯通孔构成的流路侧微芯片衬底。该流路侧微芯片衬底相当于上述实施方式1中的形成有微细流路11的微芯片衬底10。另外，盖侧微芯片衬底使用切割成与流路侧微芯片衬底相同大小的透明树脂膜(日本ZEON公司制，ZEONOR膜)。膜的厚度为100μm。该膜状的盖侧微芯片衬底相当于实施方式1中的用作盖的微芯片衬底20。
(SiO2膜的形成)
在实施例3中利用CVD形成了SiO2膜。使用SAMCO公司制的CVD装置(装置名：PD-270ST)在上述流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了SiO2膜。在TEOS流量为12sccm、氧气流量为400sccm、RF输出为300W、压力为50Pa、膜形成速度为/秒的条件下，在流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了200nm的SiO2膜。通过使用CVD膜形成装置在宽50μm、深50μm的微细流路的内表面上也形成了均匀的SiO2膜。另外，微细流路内的SiO2膜的厚度为130nm。
(接合)
在实施例3中，利用等离子体照射激活了SiO2膜。使用SAMCO株式会社制的等离子体干洗机(PC-1000型)，在氧气流量为200sccm、RF输出为400W、真空度为50Pa的条件下向SiO2膜照射5分钟等离子体，激活了流路侧微芯片衬底和盖侧微芯片衬底的SiO2膜。然后，为了不丧失表面的活性状态，在从大气开放起5分钟以内，以微细流路为内侧，用0.2kgf/cm2的力把流路侧微芯片衬底和盖侧微芯片衬底压合从而接合起来。由此制成了微芯片。另外，在实施例3中，是在对大气开放了的状态下把微芯片衬底相互压合起来，但如果在照射等离子体后不进行大气开放而在真空中进行压合，则能够更强固地把衬底相互接合。
(评价)
把上述微芯片连接到注射泵上，压送水后，未从微细流路泄漏液体，显示出足够的密封性，水的浸润性也很好，显示出足够的亲水性。另外，送液压力为0.13MPa。
(实施例4)
(微芯片衬底)
用射出成形机把透明树脂材料即聚甲基丙烯酸甲酯树脂(三菱丽阳公司制，ACRYPET VH)成形，制作了在外形尺寸为50mm×50mm×1mm的板状部件上由宽50μm、深50μm的多个微细流路和内径为2mm的多个贯通孔构成的流路侧微芯片衬底。该流路侧微芯片衬底相当于上述实施方式1中的形成有微细流路11的微芯片衬底10。另外，盖侧微芯片衬底使用切割成与流路侧微芯片衬底相同大小的透明树脂膜(三菱丽阳公司制，ACRYPLEN)。膜的厚度为100μm。该膜状的盖侧微芯片衬底相当于实施方式1中的用作盖的微芯片衬底20。
(SiO2膜的形成)
在实施例4中利用CVD形成了SiO2膜。使用SAMCO公司制的CVD装置(装置名：PD-270ST)在上述流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了SiO2膜。在TEOS流量为12sccm、氧气流量为400sccm、RF输出为300W、压力为50Pa、膜形成速度为
Figure G2007800434314D00171
/秒的条件下，在流路侧微芯片衬底和盖侧微芯片衬底的接合面侧形成了1000nm的SiO2膜。通过使用CVD膜形成装置在宽50μm、深50μm的微细流路的内表面上也形成了均匀的SiO2膜。另外，微细流路内的SiO2膜的厚度为700nm。由于SiO2膜的表面粗糙度Ra为Ra≤20nm，用CMP装置研磨了SiO2膜的表面直到Ra≤1nm。
(接合)
在实施例4中，利用离子照射激活了SiO2膜。使用光驰株式会社制的RF离子源(OIS-two型)，在氧气流量为50sccm、氩气流量为8sccm、离子束电压为500V、离子束电流为400mA、真空度为1.5×10-2Pa的条件下向SiO2膜照射30秒离子束，激活了流路侧微芯片衬底和盖侧微芯片衬底的SiO2膜。然后，为了不丧失表面的活性状态，在从大气开放起5分钟以内，以微细流路为内侧，用0.2kgf/cm2的力把流路侧微芯片衬底和盖侧微芯片衬底压合从而接合起来。由此制成了微芯片。另外，在实施例4中，在将微芯片衬底对大气开放了的状态下把衬底相互压合起来，但如果在照射离子束后不进行大气开放而在真空中进行压合，则能够更强固地把衬底相互接合。
(评价)
把上述微芯片连接到注射泵上，压送水后，未从微细流路泄漏液体，显示出足够的密封性，水的浸润性也很好，显示出足够的亲水性。另外，送液压力为0.13MPa。
如上所述，根据实施例1～实施例4，通过对于树脂制的微芯片衬底，在形成了微细流路的面上形成SiO2膜，并激活该SiO2膜，可以不用粘接剂就把微芯片衬底相互接合起来，制造在微细流路的内表面上形成了SiO2膜的微芯片。另外，实施例1～实施例4中所示的微芯片衬底的材料和SiO2膜的形成方法等是一个例子，本发明并不仅限于此。

Claims (13)

1.一种微芯片衬底的接合方法，在两个树脂制部件中的至少一个树脂制部件上形成流路用槽，以形成有上述流路用槽的面为内侧把上述两个树脂制部件接合起来，其特征在于：
对上述两个树脂制部件的每一个，在要接合的面的整个表面上形成以SiO2为主要成分的SiO2膜；
通过激活上述SiO2膜，把上述两个树脂制部件接合起来。
2.如权利要求1所述的微芯片衬底的接合方法，其特征在于：通过紫外线照射进行上述激活。
3.如权利要求2所述的微芯片衬底的接合方法，其特征在于：上述紫外线照射中使用的紫外线的波长为170nm～180nm。
4.如权利要求1所述的微芯片衬底的接合方法，其特征在于：通过等离子体照射进行上述激活。
5.如权利要求1所述的微芯片衬底的接合方法，其特征在于：通过离子束照射进行上述激活。
6.如权利要求1～5中任一项所述的微芯片衬底的接合方法，其特征在于：上述SiO2膜的表面粗糙度Ra为Ra≤2nm。
7.如权利要求1～5中任一项所述的微芯片衬底的接合方法，其特征在于：上述两个树脂制部件的表面即形成有上述SiO2膜的面的表面粗糙度Ra为Ra≤2nm。
8.如权利要求1～5中任一项所述的微芯片衬底的接合方法，其特征在于：上述两个树脂制部件中的形成有上述流路用槽的树脂制部件是板状部件，未形成上述流路用槽的树脂制部件是膜状部件。
9.一种微芯片，其特征在于：该微芯片是利用如权利要求1～8中任一项所述的微芯片衬底的接合方法接合而成的。
10.一种微芯片，该微芯片是在两个树脂制部件中的至少一个树脂制部件上形成流路用槽，以形成有上述流路用槽的面为内侧把上述两个树脂制部件接合起来而成的，其特征在于：
在上述两个树脂制部件之间形成两层以上的SiO2膜，利用上述两层以上的SiO2膜把上述两个树脂制部件接合起来，
对上述两个树脂制部件的每一个，在要接合的面的整个表面上形成SiO2膜。
11.如权利要求10所述的微芯片，其特征在于：上述两层以上的SiO2膜的边界上的表面粗糙度Ra为Ra≤2nm。
12.如权利要求10或11所述的微芯片，其特征在于：上述两个树脂制部件的表面即形成有上述SiO2膜的面的表面粗糙度Ra为Ra≤2nm。
13.如权利要求10或11所述的微芯片，其特征在于：上述两个树脂制部件中的形成有上述流路用槽的树脂制部件是板状部件，未形成上述流路用槽的树脂制部件是膜状部件。
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